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A double-gate FinFET device Doublegate FinFET.PNG
A double-gate FinFET device

A Fin Field-effect transistor (FinFET) is a MOSFET built on a substrate where the gate is placed on two, three, or four sides of the channel or wrapped around the channel, forming a double gate structure. These devices have been given the generic name "finfets" because the source/drain region forms fins on the silicon surface. The FinFET devices have significantly faster switching times and higher current density than the mainstream CMOS technology.

MOSFET transistor used for amplifying or switching electronic signals

The metal-oxide-semiconductor field-effect transistor is a type of field-effect transistor (FET), most commonly fabricated by the controlled oxidation of silicon. It has an insulated gate, whose voltage determines the conductivity of the device. This ability to change conductivity with the amount of applied voltage can be used for amplifying or switching electronic signals. A metal-insulator-semiconductor field-effect transistor or MISFET is a term almost synonymous with MOSFET. Another synonym is IGFET for insulated-gate field-effect transistor.

Wafer (electronics) thin slice of semiconductor material used in the fabrication of integrated circuits

A wafer, also called a slice or substrate, is a thin slice of semiconductor material, such as a crystalline silicon, used in electronics for the fabrication of integrated circuits and in photovoltaics for conventional, wafer-based solar cells. The wafer serves as the substrate for microelectronic devices built in and over the wafer and undergoes many microfabrication process steps such as doping or ion implantation, etching, deposition of various materials, and photolithographic patterning. Finally, the individual microcircuits are separated (dicing) and packaged.

CMOS technology for constructing integrated circuits

Complementary metal–oxide–semiconductor (CMOS) is a technology for constructing integrated circuits. CMOS technology is used in microprocessors, microcontrollers, static RAM, and other digital logic circuits. CMOS technology is also used for several analog circuits such as image sensors, data converters, and highly integrated transceivers for many types of communication. Frank Wanlass patented CMOS in 1963 while working for Fairchild Semiconductor.

The term FinFET (fin field-effect transistor) was coined in 2001 by University of California, Berkeley, researchers (Profs. Chenming Hu, Tsu-Jae King-Liu and Jeffrey Bokor) to describe a nonplanar, double-gate transistor built on an SOI substrate, [1] based on the earlier DELTA (single-gate) transistor design. [2] [3] [4]

Chenming Calvin Hu is an electronic engineer who specializes in microelectronics. He is TSMC Distinguished Professor Emeritus in the electronic engineering and computer science department of the University of California, Berkeley, in the United States. In 2009, the Institute of Electrical and Electronics Engineers described him as a “microelectronics visionary … whose seminal work on metal-oxide semiconductor MOS reliability and device modeling has had enormous impact on the continued scaling of electronic devices”.

The FinFET transistors can have gate thickness of 5 nanometres and gate width under 50 nm, are supposed to find application in sub-28 nanometer chips. FinFET technology is being pursued by AMD, NVidia [5] , IBM, ARM and Motorola and in academia.

The nanometre or nanometer is a unit of length in the metric system, equal to one billionth of a metre. The name combines the SI prefix nano- with the parent unit name metre. It can be written in scientific notation as 1×10−9 m, in engineering notation as 1 E−9 m, and as simply 1/1000000000 metres. One nanometre equals ten ångströms. When used as a prefix for something other than a unit of measure, nano refers to nanotechnology, or phenomena typically occurring on a scale of nanometres.

IBM American multinational technology and consulting corporation

International Business Machines Corporation (IBM) is an American multinational information technology company headquartered in Armonk, New York, with operations in over 170 countries. The company began in 1911, founded in Endicott, New York, as the Computing-Tabulating-Recording Company (CTR) and was renamed "International Business Machines" in 1924.

Arm Holdings British multinational semiconductor and software design company

Arm Holdings is a British multinational semiconductor and software design company, owned by SoftBank Group and its Vision Fund. With its headquarters in Cambridgeshire, within the United Kingdom, its primary business is in the design of ARM processors (CPUs), although it also designs software development tools under the DS-5, RealView and Keil brands, as well as systems and platforms, system-on-a-chip (SoC) infrastructure and software. As a "Holding" company, it also holds shares of other companies. It is considered to be market dominant for processors in mobile phones and tablet computers. The company is one of the best-known "Silicon Fen" companies.

The industry's first 25 nanometer transistor operating on just 0.7 volt was demonstrated in December 2002 by TSMC. The "Omega FinFET" design, named after the similarity between the Greek letter "Omega" and the shape in which the gate wraps around the source/drain structure, has a gate delay of just 0.39 picosecond (ps) for the N-type transistor and 0.88 ps for the P-type.

Volt SI derived unit of voltage

The volt is the derived unit for electric potential, electric potential difference (voltage), and electromotive force. It is named after the Italian physicist Alessandro Volta (1745–1827).

Omega is the 24th and last letter of the Greek alphabet. In the Greek numeric system/Isopsephy (Gematria), it has a value of 800. The word literally means "great O", as opposed to omicron, which means "little O".

A picosecond is an SI unit of time equal to 10−12 or 1/1,000,000,000,000 of a second. That is one trillionth, or one millionth of one millionth of a second, or 0.000 000 000 001 seconds. A picosecond is to one second as one second is to approximately 31,689 years. Multiple technical approaches achieve imaging within single-digit picoseconds: for example, the streak camera or intensified CCD (ICCD) cameras are able to picture the motion of light.

Intel's tri-gate transistors, where the gate surrounds the channel on three sides, allow for increased energy efficiency and lower gate delay—and thus greater performance—over planar transistors. [6] [7]

Intel American multinational corporation that manufactures semiconductor chips

Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, in the Silicon Valley. It is the world's second largest and second highest valued semiconductor chip maker based on revenue after being overtaken by Samsung, and is the inventor of the x86 series of microprocessors, the processors found in most personal computers (PCs). Intel ranked No. 46 in the 2018 Fortune 500 list of the largest United States corporations by total revenue.

The first finfet transistor type was known under the name of fully Depleted Lean-channel TrAnsistor or DELTA transistor. Articles covering the DELTA transistor were first published in the beginning of the 1990s. The gate of the transistor can cover and electrically contact the semiconductor channel fin on both the top and the sides or only on the sides. The former is called a tri-gate transistor and the latter a double-gate transistor. A double-gate transistor optionally can have each side connected to two different terminal or contacts. This variant is called split transistor. This enables more refined control of the operation of the transistor.


  1. Xuejue Huang; Wen-Chin Lee; Kuo, C.; et al. (May 2001). "Sub-50 nm P-channel FinFET" (PDF). IEEE Transactions on Electron Devices. 48 (5): 880–886. doi:10.1109/16.918235.
  2. Hisamoto, D.; Kaga, T.; Takeda, E. (June 1991). "Impact of the vertical SOI 'DELTA' structure on planar device technology" (PDF). IEEE Transactions on Electron Devices. 38 (6): 1419–1424. doi:10.1109/16.81634. Archived from the original (PDF) on 2016-12-01.
  3. Hisamoto, D. et al. (1991) "Impact of the vertical SOI 'Delta' Structure on Planar Device Technology" IEEE Trans. Electron. Dev. 41 p. 745.
  4. Chenming Hu; Bokor, J.; et al. (December 2000). "FinFET-a self-aligned double-gate MOSFET scalable to 20 nm". IEEE Transactions on Electron Devices. 47 (12): 2320–2325. CiteSeerX . doi:10.1109/16.887014.
  5. NVidia Pascal Microarchitecture
  6. Bohr, Mark; Mistry, Kaizad (May 2011). "Intel's Revolutionary 22 nm Transistor Technology" (PDF). Retrieved April 18, 2018.
  7. Grabham, Dan (May 6, 2011). "Intel's Tri-Gate transistors: everything you need to know". TechRadar. Retrieved April 19, 2018.

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EEPROM nonvolatile memory comprising arrays of floating-gate transistors used in computers, microcontrollers &c. to store relatively small amounts of data but allowing individual bytes to be erased/reprogrammed in-circuit through special programming signals

EEPROM (also E2PROM) stands for Electrically Erasable Programmable Read-Only Memory and is a type of non-volatile memory used in computers, integrated in microcontrollers for smart cards and remote keyless systems, and other electronic devices to store relatively small amounts of data but allowing individual bytes to be erased and reprogrammed.

Silicon on insulator (SOI) technology refers to the use of a layered silicon–insulator–silicon substrate in place of conventional silicon substrates in semiconductor manufacturing, especially microelectronics, to reduce parasitic device capacitance, thereby improving performance. SOI-based devices differ from conventional silicon-built devices in that the silicon junction is above an electrical insulator, typically silicon dioxide or sapphire. The choice of insulator depends largely on intended application, with sapphire being used for high-performance radio frequency (RF) and radiation-sensitive applications, and silicon dioxide for diminished short channel effects in microelectronics devices. The insulating layer and topmost silicon layer also vary widely with application.

A MESFET is a field-effect transistor semiconductor device similar to a JFET with a Schottky (metal-semiconductor) junction instead of a p-n junction for a gate.

Threshold voltage

The threshold voltage, commonly abbreviated as Vth, of a field-effect transistor (FET) is the minimum gate-to-source voltage VGS (th) that is needed to create a conducting path between the source and drain terminals. It is an important scaling factor to maintain power efficiency.

Charge Trap Flash (CTF) is a semiconductor memory technology used in creating non-volatile NOR and NAND flash memory. The technology differs from the more conventional floating-gate MOSFET technology in that it uses a silicon nitride film to store electrons rather than the doped polycrystalline silicon typical of a floating gate structure. This approach allows memory manufacturers to reduce manufacturing costs five ways:

  1. Fewer process steps are required to form a charge storage node
  2. Smaller process geometries can be used
  3. Multiple bits can be stored on a single flash memory cell.
  4. Improved reliability
  5. Higher yield since the charge trap is less susceptible to point defects in the tunnel oxide layer

SONOS, short for "silicon–oxide–nitride–oxide–silicon", more precisely, "polycrystalline silicon"—"silicon dioxide"—"silicon nitride"—"siicon dioxide"—"silicon", is a cross sectional structure of MOSFET, realized in late 70's. This structure is often used for non-volatile memories, such as EEPROM and flash memories. It is sometimes used for TFT LCD displays. It is one of CTF (charge trap flash) variants. It is distinguished from traditional non-volatile memory structures by the use of silicon nitride (Si3N4 or Si9N10) instead of "polysilicon-based FG (floating-gate)" for the charge storage material. A further variant is "SHINOS" ("silicon"—"hi-k"—"nitride"—"oxide"—"silicon"), which is substituted top oxide layer with high-κ material. Another advanced variant is "MONOS" ("metal–oxide–nitride–oxide–silicon"). Companies offering SONOS-based products include Cypress Semiconductor, Macronix, Toshiba, United Microelectronics Corporation and Floadia.

The 22 nanometer (22 nm) node is the process step following the 32 nm in CMOS semiconductor device fabrication. The typical half-pitch for a memory cell using the process is around 22 nm. It was first introduced by semiconductor companies in 2008 for use in memory products, while first consumer-level CPU deliveries started in April 2012.

The 14 nanometer technology node is the successor to the 22 nm/(20 nm) node. The 14 nm was so named by the International Technology Roadmap for Semiconductors (ITRS). One nanometer (nm) is one billionth of a meter. Until about 2011, the node following 22 nm was expected to be 16 nm. The first 14 nm scale devices were shipped to consumers by Intel in 2014.

Multigate device

A multigate device or multiple-gate field-effect transistor (MuGFET) refers to a MOSFET that incorporates more than one gate into a single device. The multiple gates may be controlled by a single gate electrode, wherein the multiple gate surfaces act electrically as a single gate, or by independent gate electrodes. A multigate device employing independent gate electrodes is sometimes called a multiple-independent-gate field-effect transistor (MIGFET).

Advanced-Random Access Memory (A-RAM) is a type of dynamic random-access memory (DRAM) based on single-transistor capacitor-less cells. A-RAM was invented in 2009 at the University of Granada (UGR), in Spain, in collaboration with the Centre National de la Recherche Scientifique (CNRS), in France. It was conceived by Noel Rodriguez (UGR), Francisco Gamiz (UGR) and Sorin Cristoloveanu (CNRS). A-RAM is compatible with single-gate silicon on insulator (SOI), double-gate, FinFETs and multiple-gate field-effect transistors (MuFETs).

In semiconductor manufacturing, the International Roadmap for Devices and Systems defines the 5 nanometer (5 nm) node as the technology node following the 7 nm node.

Polysilicon depletion effect is the phenomenon in which unwanted variation of threshold voltage of the MOSFET devices using polysilicon as gate material is observed, leading to unpredicted behaviour of the electronic circuit. Polycrystalline silicon, also called polysilicon, is a material consisting of small silicon crystals. It differs from single-crystal silicon, used for electronics and solar cells, and from amorphous silicon, used for thin film devices and solar cells.

Adrian (Mihai) Ionescu is a full Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL).
He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He has held staff and/or visiting positions at LETI-CEA, Grenoble, France, LPCS-ENSERG, Grenoble, France and Stanford University, USA, in 1998 and 1999. He was a visiting professor with Tokyo Institute of Technology in 2012 and 2016.

The IEEE International Electron Devices Meeting (IEDM) is an annual micro- and nanoelectronics conference held each December that serves as a forum for reporting technological breakthroughs in the areas of semiconductor and related device technologies, design, manufacturing, physics, modeling and circuit-device interaction.

The field-effect transistor (FET) is an electronic device which uses an electric field to control the flow of current. This is achieved by the application of a voltage to the gate terminal, which in turn alters the conductivity between the drain and source terminals.

Beyond CMOS

Beyond CMOS refers to the possible future digital logic technologies beyond the CMOS scaling limits which limits device density and speeds due to heating effects.

Suman Datta is the Fellow of the Institute of Electrical and Electronics Engineers and Frank M. Freimann Chair Professor of Engineering at the University of Notre Dame from 2016.