# Floating-gate MOSFET

Last updated

The floating-gate MOSFET (FGMOS), also known as a floating-gate transistor, is a type of MOSFET (metal-oxide-semiconductor field-effect transistor) where the gate is electrically isolated, creating a floating node in DC, and a number of secondary gates or inputs are deposited above the floating gate (FG) and are electrically isolated from it. These inputs are only capacitively connected to the FG. Since the FG is completely surrounded by highly resistive material, the charge contained in it remains unchanged for long periods of time. Usually Fowler-Nordheim tunneling and hot-carrier injection mechanisms are used to modify the amount of charge stored in the FG.

## Contents

The FGMOS is commonly used as a floating-gate memory cell, the digital storage element in EPROM, EEPROM and flash memory technologies. Other uses of the FGMOS include a neuronal computational element in neural networks, [1] [2] analog storage element, [1] digital potentiometers and single-transistor DACs.

## History

The first MOSFET was invented by Mohamed Atalla and Dawon Kahng at Bell Labs in 1959, and presented in 1960. [3] The first report of a floating-gate MOSFET (FGMOS) was later made by Dawon Kahng and Simon Min Sze at Bell Labs, and dates from 1967. [4] The earliest practical application of FGMOS was floating-gate memory cells, which Kahng and Sze proposed could be used to produce reprogrammable ROM (read-only memory). [5] The first application of FGMOS was digital semiconductor memory, to store nonvolatile data in EPROM, EEPROM and flash memory. [6]

In 1989, Intel employed the FGMOS as an analog nonvolatile memory element in its electrically trainable artificial neural network (ETANN) chip, [2] demonstrating the potential of using FGMOS devices for applications other than digital memory.

Three research accomplishments laid the groundwork for much of the current FGMOS circuit development:

1. Thomsen and Brooke's demonstration and use of electron tunneling in a standard CMOS double-poly process [7] allowed many researchers to investigate FGMOS circuits concepts without requiring access to specialized fabrication processes.
2. The νMOS, or neuron-MOS, circuit approach by Shibata and Ohmi [8] provided the initial inspiration and framework to use capacitors for linear computations. These researchers concentrated on the FG circuit properties instead of the device properties, and used either UV light to equalize charge, or simulated FG elements by opening and closing MOSFET switches.
3. Carver Mead's adaptive retina [1] gave the first example of using continuously-operating FG programming/erasing techniques, in this case UV light, as the backbone of an adaptive circuit technology.

## Structure

An FGMOS can be fabricated by electrically isolating the gate of a standard MOS transistor, so that there are no resistive connections to its gate. A number of secondary gates or inputs are then deposited above the floating gate (FG) and are electrically isolated from it. These inputs are only capacitively connected to the FG, since the FG is completely surrounded by highly resistive material. So, in terms of its DC operating point, the FG is a floating node.

For applications where the charge of the FG needs to be modified, a pair of small extra transistors are added to each FGMOS transistor to conduct the injection and tunneling operations. The gates of every transistor are connected together; the tunneling transistor has its source, drain and bulk terminals interconnected to create a capacitive tunneling structure. The injection transistor is connected normally and specific voltages are applied to create hot carriers that are then injected via an electric field into the floating gate.

FGMOS transistor for purely capacitive use can be fabricated on N or P versions. [9] For charge modification applications, the tunneling transistor (and therefore the operating FGMOS) needs to be embedded into a well, hence the technology dictates the type of FGMOS that can be fabricated.

## Modeling

### Large signal DC

The equations modeling the DC operation of the FGMOS can be derived from the equations that describe the operation of the MOS transistor used to build the FGMOS. If it is possible to determine the voltage at the FG of an FGMOS device, it is then possible to express its drain to source current using standard MOS transistor models. Therefore, to derive a set of equations that model the large signal operation of an FGMOS device, it is necessary to find the relationship between its effective input voltages and the voltage at its FG.

### Small signal

An N-input FGMOS device has N−1 more terminals than a MOS transistor, and therefore, N+2 small signal parameters can be defined: N effective input transconductances, an output transconductance and a bulk transconductance. Respectively:

${\displaystyle g_{mi}={\frac {C_{i}}{C_{T}}}g_{m}\quad {\mbox{for}}\quad i=[1,N]}$
${\displaystyle g_{dsF}=g_{ds}+{\frac {C_{GD}}{C_{T}}}g_{m}}$
${\displaystyle g_{mbF}=g_{mb}+{\frac {C_{GB}}{C_{T}}}g_{m}}$

where ${\displaystyle C_{T}}$ is the total capacitance seen by the floating gate. These equations show two drawbacks of the FGMOS compared with the MOS transistor:

• Reduction of the input transconductance
• Reduction of the output resistance

## Simulation

Under normal conditions, a floating node in a circuit represents an error because its initial condition is unknown unless it is somehow fixed. This generates two problems: first, it is not easy to simulate these circuits; and second, an unknown amount of charge might stay trapped at the floating gate during the fabrication process which will result in an unknown initial condition for the FG voltage.

Among the many solutions proposed for the computer simulation, one of the most promising methods is an Initial Transient Analysis (ITA) proposed by Rodriguez-Villegas, [10] where the FGs are set to zero volts or a previously known voltage based on the measurement of the charge trapped in the FG after the fabrication process. A transient analysis is then run with the supply voltages set to their final values, letting the outputs evolve normally. The values of the FGs can then be extracted and used for posterior small-signal simulations, connecting a voltage supply with the initial FG value to the floating gate using a very-high-value inductor.

## Applications

The usage and applications of the FGMOS can be broadly classified in two cases. If the charge in the floating gate is not modified during the circuit usage, the operation is capacitively coupled.

In the capacitively coupled regime of operation, the net charge in the floating gate is not modified. Examples of application for this regime are single transistor adders, DACs, multipliers and logic functions, variable threshold inverters,

Using the FGMOS as a programmable charge element, it is commonly used for non-volatile storage such as flash, EPROM and EEPROM memory. In this context, floating-gate MOSFETs are useful because of their ability to store an electrical charge for extended periods of time without a connection to a power supply. Other applications of the FGMOS are neuronal computational element in neural networks, analog storage element and e-pots.

## Related Research Articles

Electronics comprises the physics, engineering, technology and applications that deal with the emission, flow and control of electrons in vacuum and matter.

A transistor is a semiconductor device used to amplify or switch electronic signals and electrical power. It is composed of semiconductor material usually with at least three terminals for connection to an external circuit. A voltage or current applied to one pair of the transistor's terminals controls the current through another pair of terminals. Because the controlled (output) power can be higher than the controlling (input) power, a transistor can amplify a signal. Today, some transistors are packaged individually, but many more are found embedded in integrated circuits.

A semiconductor device is an electronic component that relies on the electronic properties of a semiconductor material for its function. Semiconductor devices have replaced vacuum tubes in most applications. They use electrical conduction in the solid state rather than the gaseous state or thermionic emission in a vacuum.

The metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET), also known as the metal–oxide–silicon transistor (MOS transistor, or MOS), is a type of insulated-gate field-effect transistor (IGFET) that is fabricated by the controlled oxidation of a semiconductor, typically silicon. The voltage of the covered gate determines the electrical conductivity of the device; this ability to change conductivity with the amount of applied voltage can be used for amplifying or switching electronic signals. The MOSFET was invented by Egyptian engineer Mohamed M. Atalla and Korean engineer Dawon Kahng at Bell Labs in November 1959. It is the basic building block of modern electronics, and the most frequently manufactured device in history, with an estimated total of 13 sextillion (1.3 × 1022) MOSFETs manufactured between 1960 and 2018.

N-type metal-oxide-semiconductor logic uses n-type (-) MOSFETs to implement logic gates and other digital circuits. These nMOS transistors operate by creating an inversion layer in a p-type transistor body. This inversion layer, called the n-channel, can conduct electrons between n-type "source" and "drain" terminals. The n-channel is created by applying voltage to the third terminal, called the gate. Like other MOSFETs, nMOS transistors have four modes of operation: cut-off, triode, saturation, and velocity saturation.

Complementary metal–oxide–semiconductor (CMOS), also known as complementary-symmetry metal–oxide–semiconductor (COS-MOS), is a type of MOSFET fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips, and other digital logic circuits. CMOS technology is also used for analog circuits such as image sensors, data converters, RF circuits, and highly integrated transceivers for many types of communication.

EEPROM (also E2PROM) stands for electrically erasable programmable read-only memory and is a type of non-volatile memory used in computers, integrated in microcontrollers for smart cards and remote keyless systems, and other electronic devices to store relatively small amounts of data but allowing individual bytes to be erased and reprogrammed.

The analogueswitch, also called the bilateral switch, is an electronic component that behaves in a similar way to a relay, but has no moving parts. The switching element is normally a pair of MOSFET transistors, one an N-channel device, the other a P-channel device. The device can conduct analog or digital signals in either direction when on and isolates the switched terminals when off. Analogue switches are usually manufactured as integrated circuits in packages containing multiple switches. These include the 4016 and 4066 from the 4000 series.

Transconductance, also infrequently called mutual conductance, is the electrical characteristic relating the current through the output of a device to the voltage across the input of a device. Conductance is the reciprocal of resistance.

In computer engineering, a logic family may refer to one of two related concepts. A logic family of monolithic digital integrated circuit devices is a group of electronic logic gates constructed using one of several different designs, usually with compatible logic levels and power supply characteristics within a family. Many logic families were produced as individual components, each containing one or a few related basic logical functions, which could be used as "building-blocks" to create systems or as so-called "glue" to interconnect more complex integrated circuits. A "logic family" may also refer to a set of techniques used to implement logic within VLSI integrated circuits such as central processors, memories, or other complex functions. Some such logic families use static techniques to minimize design complexity. Other such logic families, such as domino logic, use clocked dynamic techniques to minimize size, power consumption and delay.

Charge trap flash (CTF) is a semiconductor memory technology used in creating non-volatile NOR and NAND flash memory. It is a type of floating-gate MOSFET memory technology, but differs from the conventional floating-gate technology in that it uses a silicon nitride film to store electrons rather than the doped polycrystalline silicon typical of a floating-gate structure. This approach allows memory manufacturers to reduce manufacturing costs five ways:

1. Fewer process steps are required to form a charge storage node
2. Smaller process geometries can be used
3. Multiple bits can be stored on a single flash memory cell.
4. Improved reliability
5. Higher yield since the charge trap is less susceptible to point defects in the tunnel oxide layer

SONOS, short for "silicon–oxide–nitride–oxide–silicon", more precisely, "polycrystalline silicon"—"silicon dioxide"—"silicon nitride"—"silicon dioxide"—"silicon", is a cross sectional structure of MOSFET (metal-oxide-semiconductor field-effect transistor), realized by P.C.Y. Chen of Fairchild Camera and Instrument in 1977. This structure is often used for non-volatile memories, such as EEPROM and flash memories. It is sometimes used for TFT LCD displays. It is one of CTF (charge trap flash) variants. It is distinguished from traditional non-volatile memory structures by the use of silicon nitride (Si3N4 or Si9N10) instead of "polysilicon-based FG (floating-gate)" for the charge storage material. A further variant is "SHINOS" ("silicon"—"hi-k"—"nitride"—"oxide"—"silicon"), which is substituted top oxide layer with high-κ material. Another advanced variant is "MONOS" ("metal–oxide–nitride–oxide–silicon"). Companies offering SONOS-based products include Cypress Semiconductor, Macronix, Toshiba, United Microelectronics Corporation and Floadia.

P-type metal-oxide-semiconductor logic uses p-channel (+) metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other digital circuits. PMOS transistors operate by creating an inversion layer in an n-type transistor body. This inversion layer, called the p-channel, can conduct holes between p-type "source" and "drain" terminals.

A transistor is a semiconductor device with at least three terminals for connection to an electric circuit. The vacuum-tube triode, also called a (thermionic) valve, was the transistor's precursor, introduced in 1907. The principle of a field-effect transistor was proposed by Julius Edgar Lilienfeld in 1925.

In electronics, a native transistor is a variety of the MOS field-effect transistor that is intermediate between enhancement and depletion modes. Most common is the n-channel native transistor.

A FET amplifier is an amplifier that uses one or more field-effect transistors (FETs). The most common type of FET amplifier is the MOSFET amplifier, which uses metal–oxide–semiconductor FETs (MOSFETs). The main advantage of a FET used for amplification is that it has very high input impedance and low output impedance.

Dawon Kahng was a Korean-American electrical engineer and inventor, known for his work in solid-state electronics. He is best known for inventing the MOSFET, also known as the MOS transistor, with Mohamed Atalla in 1959. Atalla and Kahng developed both the PMOS and NMOS processes for MOSFET semiconductor device fabrication. The MOSFET is the most widely used type of transistor, and the basic element in most modern electronic equipment.

The field-effect transistor (FET) is a type of transistor which uses an electric field to control the flow of current. FETs are devices with three terminals: source, gate, and drain. FETs control the flow of current by the application of a voltage to the gate, which in turn alters the conductivity between the drain and source.

The memory cell is the fundamental building block of computer memory. The memory cell is an electronic circuit that stores one bit of binary information and it must be set to store a logic 1 and reset to store a logic 0. Its value is maintained/stored until it is changed by the set/reset process. The value in the memory cell can be accessed by reading it.

The metal–nitride–oxide–semiconductor or metal–nitride–oxide–silicon (MNOS) transistor is a type of MOSFET in which the oxide layer is replaced by a double layer of nitride and oxide. It is an alternative and supplement to the existing standard MOS technology, wherein the insulation employed is a nitride-oxide layer. It is used in non-volatile computer memory.

## References

1. Mead, Carver A.; Ismail, Mohammed, eds. (May 8, 1989). Analog VLSI Implementation of Neural Systems (PDF). The Kluwer International Series in Engineering and Computer Science. 80. Norwell, MA: Kluwer Academic Publishers. doi:10.1007/978-1-4613-1639-8. ISBN   978-1-4613-1639-8.
2. M. Holler, S. Tam, H. Castro, and R. Benson, "An electrically trainable artificial neural network with 10240 'floating gate' synapses", Proceedings of the International Joint Conference on Neural Networks, Washington, D.C., vol. II, 1989, pp. 191–196
3. "1960 - Metal Oxide Semiconductor (MOS) Transistor Demonstrated". The Silicon Engine. Computer History Museum.
4. Kahng, Dawon; Sze, Simon Min (1967). "A floating gate and its application to memory devices". The Bell System Technical Journal . 46 (6): 1288–1295. doi:10.1002/j.1538-7305.1967.tb01738.x.
5. "1971: Reusable semiconductor ROM introduced". Computer History Museum . Retrieved 19 June 2019.
6. Bez, R.; Pirovano, A. (2019). Advances in Non-Volatile Memory and Storage Technology. Woodhead Publishing. ISBN   9780081025857.
7. A. Thomsen and M.A. Brooke, "A floating-gate MOSFET with tunneling injector fabricated using a standard double-polysilicon CMOS process," IEEE Electron Device Letters, vol. 12, 1991, pp. 111-113
8. T. Shibata and T. Ohmi, "A functional MOS transistor featuring gate-level weighted sum and threshold operations", IEEE Transactions on Electron Devices, vol. 39, no. 6, 1992, pp. 1444–1455
9. Janwadkar, Sudhanshu (2017-10-24). "Fabrication of Floating Gate MOS (FLOTOX)". www.slideshare.net.
10. Rodriguez-Villegas, Esther. Low Power and Low Voltage Circuit Design with the FGMOS Transistor