Last updated
Two power MOSFETs in the surface-mount package D2PAK. Each of these components can sustain a blocking voltage of 120 volts and a continuous current of 30 amperes with appropriate heatsinking. D2PAK.JPG
Two power MOSFETs in the surface-mount package D2PAK. Each of these components can sustain a blocking voltage of 120  volts and a continuous current of 30  amperes with appropriate heatsinking.
IRLZ24N Power MOSFET in a TO-220AB through-hole package. Pins from left to right are: 1 is gate (logic-level), 2 is drain, 3 is source, 4 (top metal tab) is drain (same as pin 2). Nedap ESD1 - power supply board 2 - International Rectifier IRLZ24N-91538.jpg
IRLZ24N Power MOSFET in a TO-220AB through-hole package. Pins from left to right are: 1 is gate (logic-level), 2 is drain, 3 is source, 4 (top metal tab) is drain (same as pin 2).

A power MOSFET is a specific type of metal–oxide–semiconductor field-effect transistor (MOSFET) designed to handle significant power levels. Compared to the other power semiconductor devices, such as an insulated-gate bipolar transistor (IGBT) or a thyristor, its main advantages are high switching speed and good efficiency at low voltages. It shares with the IGBT an isolated gate that makes it easy to drive. They can be subject to low gain, sometimes to a degree that the gate voltage needs to be higher than the voltage under control.


The design of power MOSFETs was made possible by the evolution of MOSFET and CMOS technology, used for manufacturing integrated circuits since the 1960s. The power MOSFET shares its operating principle with its low-power counterpart, the lateral MOSFET. The power MOSFET, which is commonly used in power electronics, was adapted from the standard MOSFET and commercially introduced in the 1970s. [2]

The power MOSFET is the most common power semiconductor device in the world, due to its low gate drive power, fast switching speed, [3] easy advanced paralleling capability, [3] [4] wide bandwidth, ruggedness, easy drive, simple biasing, ease of application, and ease of repair. [4] In particular, it is the most widely used low-voltage (that is, less than 200 V) switch. It can be found in a wide range of applications, such as most power supplies, DC-to-DC converters, low-voltage motor controllers, and many other applications.


The MOSFET was invented by Mohamed Atalla and Dawon Kahng at Bell Labs in 1959. It was a breakthrough in power electronics. Generations of MOSFETs enabled power designers to achieve performance and density levels not possible with bipolar transistors. [5]

In 1969, Hitachi introduced the first vertical power MOSFET, [6] which would later be known as the VMOS (V-groove MOSFET). [7] The same year, the DMOS (double-diffused MOSFET) with self-aligned gate was first reported by Y. Tarui, Y. Hayashi and Toshihiro Sekigawa of the Electrotechnical Laboratory (ETL). [8] [9] In 1974, Jun-ichi Nishizawa at Tohoku University invented a power MOSFET for audio, which was soon manufactured by Yamaha Corporation for their high fidelity audio amplifiers. JVC, Pioneer Corporation, Sony and Toshiba also began manufacturing amplifiers with power MOSFETs in 1974. [10] Siliconix commercially introduced a VMOS in 1975. [7]

The VMOS and DMOS developed into what has become known as VDMOS (vertical DMOS). [10] John Moll's research team at HP Labs fabricated DMOS prototypes in 1977, and demonstrated advantages over the VMOS, including lower on-resistance and higher breakdown voltage. [7] The same year, Hitachi introduced the LDMOS (lateral DMOS), a planar type of DMOS. Hitachi was the only LDMOS manufacturer between 1977 and 1983, during which time LDMOS was used in audio power amplifiers from manufacturers such as HH Electronics (V-series) and Ashly Audio, and were used for music and public address systems. [10] With the introduction of the 2G digital mobile network in 1995, the LDMOS became the most widely used RF power amplifier in mobile networks such as 2G, 3G, [11] and 4G. [12]

Alex Lidow co-invented the HexFET, a hexagonal type of Power MOSFET, at Stanford University in 1977, [13] along with Tom Herman. [14] The HexFET was commercialized by International Rectifier in 1978. [7] [14] The insulated-gate bipolar transistor (IGBT), which combines elements of both the power MOSFET and the bipolar junction transistor (BJT), was developed by Jayant Baliga at General Electric between 1977 and 1979. [15]

The superjunction MOSFET is a type of power MOSFET that uses P+ columns that penetrate the N- epitaxial layer. The idea of stacking P and N layers was first proposed by Shozo Shirota and Shigeo Kaneda at Osaka University in 1978. [16] Chen Xingbi invented the superjunction device, for which he was granted a United States patent in 1993. [17] [18] [19]


The power MOSFET is the most widely used power semiconductor device in the world. [3] As of 2010, the power MOSFET accounts for 53% of the power transistor market, ahead of the insulated-gate bipolar transistor (27%), RF power amplifier (11%) and bipolar junction transistor (9%). [20] As of 2018, over 50 billion power MOSFETs are shipped annually. [21] These include the trench power MOSFET, which sold over 100 billion units up until February 2017, [22] and STMicroelectronics' MDmesh (superjunction MOSFET) which has sold 5 billion units as of 2019. [16]

Power MOSFETs are commonly used for a wide range of consumer electronics. [23] [24]

RF DMOS, also known as RF power MOSFET, is a type of DMOS power transistor designed for radio-frequency (RF) applications. It is used in various radio and RF applications. [25] [26]

Power MOSFETs are widely used in transportation technology, [27] [28] [29] which include a wide range of vehicles.

In the automotive industry, [30] [31] [32] power MOSFETs are widely used in automotive electronics. [33] [34] [23]

Power MOSFETs (including DMOS, LDMOS and VMOS) are commonly used for a wide range of other applications.

Basic structure

Fig. 1: Cross section of a VDMOS, showing an elementary cell. Note that a cell is very small (some micrometres to some tens of micrometres wide), and that a power MOSFET is composed of several thousand of them. Vdmos cross section en.svg
Fig. 1: Cross section of a VDMOS, showing an elementary cell. Note that a cell is very small (some micrometres to some tens of micrometres wide), and that a power MOSFET is composed of several thousand of them.

Several structures had been explored in the 1970s, when the first commercial power MOSFETs were introduced. However, most of them have been abandoned (at least until recently) in favour of the Vertical Diffused MOS (VDMOS) structure (also called Double-Diffused MOS or simply DMOS) and the LDMOS (laterally diffused MOS) structure.

The cross section of a VDMOS (see figure 1) shows the "verticality" of the device: it can be seen that the source electrode is placed over the drain, resulting in a current mainly vertical when the transistor is in the on-state. The "diffusion" in VDMOS refers to the manufacturing process: the P wells (see figure 1) are obtained by a diffusion process (actually a double diffusion process to get the P and N+ regions, hence the name double diffused).

Power MOSFETs have a different structure from the lateral MOSFET: as with most power devices, their structure is vertical and not planar. In a planar structure, the current and breakdown voltage ratings are both functions of the channel dimensions (respectively width and length of the channel), resulting in inefficient use of the "silicon real estate". With a vertical structure, the voltage rating of the transistor is a function of the doping and thickness of the N epitaxial layer (see cross section), while the current rating is a function of the channel width. This makes it possible for the transistor to sustain both high blocking voltage and high current within a compact piece of silicon.

LDMOS are power MOSFETs with a lateral structure. They are mainly used in high-end audio power amplifiers, [10] and RF power amplifiers in wireless cellular networks, such as 2G, 3G, [11] and 4G. [12] Their advantage is a better behaviour in the saturated region (corresponding to the linear region of a bipolar junction transistor) than the vertical MOSFETs. Vertical MOSFETs are designed for switching applications, so they are only used in On or Off states.

On-state resistance

Fig.2: Contribution of the different parts of the MOSFET to the on-state resistance. Mosfet resistances.svg
Fig.2: Contribution of the different parts of the MOSFET to the on-state resistance.

When the power MOSFET is in the on-state (see MOSFET for a discussion on operation modes), it exhibits a resistive behaviour between the drain and source terminals. It can be seen in figure 2 that this resistance (called RDSon for "drain to source resistance in on-state") is the sum of many elementary contributions:

Breakdown voltage/on-state resistance trade-off

Fig. 3: The RDSon of the MOSFETs increase with their voltage rating. Bv rdson.png
Fig. 3: The RDSon of the MOSFETs increase with their voltage rating.

When in the OFF-state, the power MOSFET is equivalent to a PIN diode (constituted by the P+ diffusion, the N epitaxial layer and the N+ substrate). When this highly non-symmetrical structure is reverse-biased, the space-charge region extends principally on the light-doped side, i.e., over the N layer. This means that this layer has to withstand most of the MOSFET's OFF-state drain-to-source voltage.

However, when the MOSFET is in the ON-state, this N layer has no function. Furthermore, as it is a lightly doped region, its intrinsic resistivity is non-negligible and adds to the MOSFET's ON-state Drain-to-Source Resistance (RDSon) (this is the Rn resistance in figure 2).

Two main parameters govern both the breakdown voltage and the RDSon of the transistor: the doping level and the thickness of the N epitaxial layer. The thicker the layer and the lower its doping level, the higher the breakdown voltage. On the contrary, the thinner the layer and the higher the doping level, the lower the RDSon (and therefore the lower the conduction losses of the MOSFET). Therefore, it can be seen that there is a trade-off in the design of a MOSFET, between its voltage rating and its ON-state resistance.[ citation needed ] This is demonstrated by the plot in figure 3.

Body diode

It can be seen in figure 1 that the source metallization connects both the N+ and P+ implantations, although the operating principle of the MOSFET only requires the source to be connected to the N+ zone. However, if it were, this would result in a floating P zone between the N-doped source and drain, which is equivalent to a NPN transistor with a non-connected base. Under certain conditions (under high drain current, when the on-state drain to source voltage is in the order of some volts), this parasitic NPN transistor would be triggered, making the MOSFET uncontrollable. The connection of the P implantation to the source metallization shorts the base of the parasitic transistor to its emitter (the source of the MOSFET) and thus prevents spurious latching.

This solution, however, creates a diode between the drain (cathode) and the source (anode) of the MOSFET, making it able to block current in only one direction.

Body diodes may be utilized as freewheeling diodes for inductive loads in configurations such as H bridge or half bridge. While these diodes usually have rather high forward voltage drop, they can handle large currents and are sufficient in many applications, reducing part count, and thus, device cost and board space.

Switching operation

Fig. 4: Location of the intrinsic capacitances of a power MOSFET. Mosfet capacitances.svg
Fig. 4: Location of the intrinsic capacitances of a power MOSFET.

Because of their unipolar nature, the power MOSFET can switch at very high speed. Indeed, there is no need to remove minority carriers as with bipolar devices. The only intrinsic limitation in commutation speed is due to the internal capacitances of the MOSFET (see figure 4). These capacitances must be charged or discharged when the transistor switches. This can be a relatively slow process because the current that flows through the gate capacitances is limited by the external driver circuit. This circuit will actually dictate the commutation speed of the transistor (assuming the power circuit has sufficiently low inductance).


In the MOSFET datasheets, the capacitances are often named Ciss (input capacitance, drain and source terminal shorted), Coss (output capacitance, gate and source shorted), and Crss (reverse transfer capacitance, source connected to ground). The relationship between these capacitances and those described below is:

Where CGS, CGD and CDS are respectively the gate-to-source, gate-to-drain and drain-to-source capacitances (see below). Manufacturers prefer to quote Ciss, Coss and Crss because they can be directly measured on the transistor. However, as CGS, CGD and CDS are closer to the physical meaning, they will be used in the remaining of this article.

Gate to source capacitance

The CGS capacitance is constituted by the parallel connection of CoxN+, CoxP and Coxm (see figure 4). As the N+ and P regions are highly doped, the two former capacitances can be considered as constant. Coxm is the capacitance between the (polysilicon) gate and the (metal) source electrode, so it is also constant. Therefore, it is common practice to consider CGS as a constant capacitance, i.e. its value does not depend on the transistor state.

Gate to drain capacitance

The CGD capacitance can be seen as the connection in series of two elementary capacitances. The first one is the oxide capacitance (CoxD), constituted by the gate electrode, the silicon dioxide and the top of the N epitaxial layer. It has a constant value. The second capacitance (CGDj) is caused by the extension of the space-charge zone when the MOSFET is in off-state. Therefore, it is dependent upon the drain to source voltage. From this, the value of CGD is:

The width of the space-charge region is given by [35]

where is the permittivity of the Silicon, q is the electron charge, and N is the doping level. The value of CGDj can be approximated using the expression of the plane capacitor:

Where AGD is the surface area of the gate-drain overlap. Therefore, it comes:

It can be seen that CGDj (and thus CGD) is a capacitance which value is dependent upon the gate to drain voltage. As this voltage increases, the capacitance decreases. When the MOSFET is in on-state, CGDj is shunted, so the gate to drain capacitance remains equal to CoxD, a constant value.

Drain to source capacitance

As the source metallization overlaps the P-wells (see figure 1), the drain and source terminals are separated by a P-N junction. Therefore, CDS is the junction capacitance. This is a non-linear capacitance, and its value can be calculated using the same equation as for CGDj.

Other dynamic elements

Equivalent circuit of a power MOSFET, including the dynamic elements (capacitors, inductors), the parasitic resistors, the body diode. Mosfet equivalent circuit.svg
Equivalent circuit of a power MOSFET, including the dynamic elements (capacitors, inductors), the parasitic resistors, the body diode.

Packaging inductances

To operate, the MOSFET must be connected to the external circuit, most of the time using wire bonding (although alternative techniques are investigated). These connections exhibit a parasitic inductance, which is in no way specific to the MOSFET technology, but has important effects because of the high commutation speeds. Parasitic inductances tend to maintain their current constant and generate overvoltage during the transistor turn off, resulting in increasing commutation losses.

A parasitic inductance can be associated with each terminal of the MOSFET. They have different effects:

  • the gate inductance has little influence (assuming it is lower than some hundreds of nanohenries), because the current gradients on the gate are relatively slow. In some cases, however, the gate inductance and the input capacitance of the transistor can constitute an oscillator. This must be avoided, as it results in very high commutation losses (up to the destruction of the device). On a typical design, parasitic inductances are kept low enough to prevent this phenomenon;
  • the drain inductance tends to reduce the drain voltage when the MOSFET turns on, so it reduces turn on losses. However, as it creates an overvoltage during turn-off, it increases turn-off losses;
  • the source parasitic inductance has the same behaviour as the drain inductance, plus a feedback effect that makes commutation last longer, thus increasing commutation losses.
    • at the beginning of a fast turn-on, due to the source inductance, the voltage at the source (on the die) will be able to jump up as well as the gate voltage; the internal VGS voltage will remain low for a longer time, therefore delaying turn-on.
    • at the beginning of a fast turn-off, as current through the source inductance decreases sharply, the resulting voltage across it goes negative (with respect to the lead outside the package) raising the internal VGS voltage, keeping the MOSFET on, and therefore delaying turn-off.

Limits of operation

Gate oxide breakdown

The gate oxide is very thin (100 nm or less), so it can only sustain a limited voltage. In the datasheets, manufacturers often state a maximum gate to source voltage, around 20 V, and exceeding this limit can result in destruction of the component. Furthermore, a high gate to source voltage reduces significantly the lifetime of the MOSFET, with little to no advantage on RDSon reduction.

To deal with this issue, a gate driver circuit is often used.

Maximum drain to source voltage

Power MOSFETs have a maximum specified drain to source voltage (when turned off), beyond which breakdown may occur. Exceeding the breakdown voltage causes the device to conduct, potentially damaging it and other circuit elements due to excessive power dissipation.

Maximum drain current

The drain current must generally stay below a certain specified value (maximum continuous drain current). It can reach higher values for very short durations of time (maximum pulsed drain current, sometimes specified for various pulse durations). The drain current is limited by heating due to resistive losses in internal components such as bond wires, and other phenomena such as electromigration in the metal layer.

Maximum temperature

The junction temperature (TJ) of the MOSFET must stay under a specified maximum value for the device to function reliably, determined by MOSFET die layout and packaging materials. The packaging often limits the maximum junction temperature, due to the molding compound and (where used) epoxy characteristics.

The maximum operating ambient temperature is determined by the power dissipation and thermal resistance. The junction-to-case thermal resistance is intrinsic to the device and package; the case-to-ambient thermal resistance is largely dependent on the board/mounting layout, heatsinking area and air/fluid flow.

The type of power dissipation, whether continuous or pulsed, affects the maximum operating temperature, due to thermal mass characteristics; in general, the lower the frequency of pulses for a given power dissipation, the higher maximum operating ambient temperature, due to allowing a longer interval for the device to cool down. Models, such as a Foster network, can be used to analyze temperature dynamics from power transients.

Safe operating area

The safe operating area defines the combined ranges of drain current and drain to source voltage the power MOSFET is able to handle without damage. It is represented graphically as an area in the plane defined by these two parameters. Both drain current and drain-to-source voltage must stay below their respective maximum values, but their product must also stay below the maximum power dissipation the device is able to handle. Thus, the device cannot be operated at its maximum current and maximum voltage simultaneously. [36]


The equivalent circuit for a power MOSFET consists of one MOSFET in parallel with a parasitic BJT. If the BJT turns ON, it cannot be turned off, since the gate has no control over it. This phenomenon is known as "latch-up", which can lead to device destruction. The BJT can be turned on due to a voltage drop across the p-type body region. To avoid latch-up, the body and the source are typically short-circuited within the device package.


This power MOSFET has a meshed gate, with square cells Power mos cell layout.svg
This power MOSFET has a meshed gate, with square cells
The gate layout of this MOSFET is constituted of parallel stripes. Power mos strip layout.svg
The gate layout of this MOSFET is constituted of parallel stripes.


Cellular structure

As described above, the current handling capability of a power MOSFET is determined by its gate channel width. The gate channel width is the third (Z-axis) dimension of the cross-sections pictured.

To minimize cost and size, it is valuable to keep the transistor's die area size as small as possible. Therefore, optimizations have been developed to increase the width of the channel surface area, i.e., increase the "channel density". They mainly consist of creating cellular structures repeated over the whole area of the MOSFET die. Several shapes have been proposed for these cells, the most famous being the hexagonal shape used in International Rectifier's HEXFET® devices.

Another way to increase the channel density is to reduce the size of the elementary structure. This allows for more cells in a given surface area, and therefore more channel width. However, as the cell size shrinks, it becomes more difficult to ensure proper contact of every cell. To overcome this, a "strip" structure is often used (see figure). It is less efficient than a cellular structure of equivalent resolution in terms of channel density, but can cope with smaller pitch. Another advantage of the planar stripe structure is that it is less susceptible to failure during avalanche breakdown events in which the parasitic bipolar transistor turns on from sufficient forward bias. In the cellular structure, if the source terminal of any one cell is poorly contacted, then it becomes much more likely that the parasitic bipolar transistor latches on during an avalanche breakdown event. Because of this, MOSFETs utilizing a planar stripe structure can only fail during avalanche breakdown due to extreme thermal stress. [37]


The VMOS structure has a V-groove at the gate region VMOS cross section en.png
The VMOS structure has a V-groove at the gate region
The UMOS has a trench gate. It is intended to increase the channel density by making the channel vertical Umos cross section en.svg
The UMOS has a trench gate. It is intended to increase the channel density by making the channel vertical

P-substrate power MOSFET

A P-substrate MOSFET (often called PMOS) is a MOSFET with opposite doping types (N instead of P and P instead of N in the cross-section in figure 1). This MOSFET is made using a P-type substrate, with a P epitaxy. As the channel sits in a N-region, this transistor is turned on by a negative gate to source voltage. This makes it desirable in a buck converter, where one of the terminals of the switch is connected to the high side of the input voltage: with a N-MOSFET, this configuration requires to apply to the gate a voltage equal to , whereas no voltage over is required with a P-MOSFET.

The main disadvantage of this type of MOSFET is the poor on-state performance, as it uses holes as charge carriers, which have a much lower mobility than electrons. As resistivity is directly related to mobility, a given PMOS device will have a three times higher than a N-MOSFET with the same dimensions.


The VMOS structure has a V-groove at the gate region and was used for the first commercial devices. [38]


In this power MOSFET structure, also called trench-MOS, the gate electrode is buried in a trench etched in the silicon. This results in a vertical channel. The main interest of the structure is the absence of the JFET effect. The name of the structure comes from the U-shape of the trench.

Super-junction deep-trench technology

Especially for voltages beyond 500 V, some manufacturers, including Infineon Technologies with its CoolMOS products, have begun to use a charge compensation principle. With this technology, the resistance of the epitaxial layer, which is the biggest contributor (more than 95%) to the device resistance of high-voltage MOSFETs, can be reduced by a factor of greater than 5.

Seeking to improve the manufacturing efficiency and reliability of super-junction MOSFETs, Renesas Electronics developed a super-junction structure with a deep-trench process technique. This technology entails etching trenches in the low-impurity N-type material to form P-type regions. This process overcomes problems inherent to the multi-level epitaxial growth approach and results in extremely low on-resistance and reduced internal capacitance.

Due to the increased p-n junction area, a super-junction structure has a smaller reverse recovery time but larger reverse recovery current compared to a conventional planar power MOSFET.

See also

Related Research Articles

Transistor Basic electronics component

A transistor is a semiconductor device used to amplify or switch electronic signals and electrical power. It is composed of semiconductor material usually with at least three terminals for connection to an external circuit. A voltage or current applied to one pair of the transistor's terminals controls the current through another pair of terminals. Because the controlled (output) power can be higher than the controlling (input) power, a transistor can amplify a signal. Today, some transistors are packaged individually, but many more are found embedded in integrated circuits.

MOSFET Transistor used for amplifying or switching electronic signals.

The metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET), also known as the metal–oxide–silicon transistor (MOS transistor, or MOS), is a type of insulated-gate field-effect transistor (IGFET) that is fabricated by the controlled oxidation of a semiconductor, typically silicon. The voltage of the covered gate determines the electrical conductivity of the device; this ability to change conductivity with the amount of applied voltage can be used for amplifying or switching electronic signals. The MOSFET was invented by Egyptian engineer Mohamed M. Atalla and Korean engineer Dawon Kahng at Bell Labs in November 1959. It is the basic building block of modern electronics, and the most frequently manufactured device in history, with an estimated total of 13 sextillion (1.3 × 1022) MOSFETs manufactured between 1960 and 2018.

JFET type of field-effect transistor

The junction gate field-effect transistor is one of the simplest types of field-effect transistor. JFETs are three-terminal semiconductor devices that can be used as electronically-controlled switches, amplifiers, or voltage-controlled resistors.

CMOS Technology for constructing integrated circuits

Complementary metal–oxide–semiconductor (CMOS), also known as complementary-symmetry metal–oxide–semiconductor (COS-MOS), is a type of MOSFET fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips, and other digital logic circuits. CMOS technology is also used for analog circuits such as image sensors, data converters, RF circuits, and highly integrated transceivers for many types of communication.

Insulated-gate bipolar transistor three-terminal power semiconductor device

An insulated-gate bipolar transistor (IGBT) is a three-terminal power semiconductor device primarily used as an electronic switch which, as it was developed, came to combine high efficiency and fast switching. It consists of four alternating layers (P-N-P-N) that are controlled by a metal–oxide–semiconductor (MOS) gate structure without regenerative action. Although the structure of the IGBT is topologically the same as a thyristor with a 'MOS' gate, the thyristor action is completely suppressed and only the transistor action is permitted in the entire device operation range. It is used in switching power supplies in high power applications: variable-frequency drives (VFDs), electric cars, trains, variable speed refrigerators, lamp ballasts, and air-conditioners.

Bipolar CMOS (BiCMOS) is a semiconductor technology that integrates two formerly separate semiconductor technologies, those of the bipolar junction transistor and the CMOS gate, in a single integrated circuit device.

A power semiconductor device is a semiconductor device used as a switch or rectifier in power electronics. Such a device is also called a power device or, when used in an integrated circuit, a power IC.

High-electron-mobility transistor

A high-electron-mobility transistor (HEMT), also known as heterostructure FET (HFET) or modulation-doped FET (MODFET), is a field-effect transistor incorporating a junction between two materials with different band gaps as the channel instead of a doped region. A commonly used material combination is GaAs with AlGaAs, though there is wide variation, dependent on the application of the device. Devices incorporating more indium generally show better high-frequency performance, while in recent years, gallium nitride HEMTs have attracted attention due to their high-power performance. Like other FETs, HEMTs are used in integrated circuits as digital on-off switches. FETs can also be used as amplifiers for large amounts of current using a small voltage as a control signal. Both of these uses are made possible by the FET’s unique current–voltage characteristics. HEMT transistors are able to operate at higher frequencies than ordinary transistors, up to millimeter wave frequencies, and are used in high-frequency products such as cell phones, satellite television receivers, voltage converters, and radar equipment. They are widely used in satellite receivers, in low power amplifiers and in the defense industry.

Threshold voltage Minimum source-to-gate voltage for a field effect transistor to be conducting from source to drain

The threshold voltage, commonly abbreviated as Vth, of a field-effect transistor (FET) is the minimum gate-to-source voltage VGS (th) that is needed to create a conducting path between the source and drain terminals. It is an important scaling factor to maintain power efficiency.

Common source

In electronics, a common-source amplifier is one of three basic single-stage field-effect transistor (FET) amplifier topologies, typically used as a voltage or transconductance amplifier. The easiest way to tell if a FET is common source, common drain, or common gate is to examine where the signal enters and leaves. The remaining terminal is what is known as "common". In this example, the signal enters the gate, and exits the drain. The only terminal remaining is the source. This is a common-source FET circuit. The analogous bipolar junction transistor circuit may be viewed as a transconductance amplifier or as a voltage amplifier.. As a transconductance amplifier, the input voltage is seen as modulating the current going to the load. As a voltage amplifier, input voltage modulates the current flowing through the FET, changing the voltage across the output resistance according to Ohm's law. However, the FET device's output resistance typically is not high enough for a reasonable transconductance amplifier, nor low enough for a decent voltage amplifier. Another major drawback is the amplifier's limited high-frequency response. Therefore, in practice the output often is routed through either a voltage follower, or a current follower, to obtain more favorable output and frequency characteristics. The CS–CG combination is called a cascode amplifier.


A latch-up is a type of short circuit which can occur in an integrated circuit (IC). More specifically it is the inadvertent creation of a low-impedance path between the power supply rails of a MOSFET circuit, triggering a parasitic structure which disrupts proper functioning of the part, possibly even leading to its destruction due to overcurrent. A power cycle is required to correct this situation.

The cascode is a two-stage amplifier that consists of a common-emitter stage feeding into a common-base stage.

Capacitance–voltage profiling is a technique for characterizing semiconductor materials and devices. The applied voltage is varied, and the capacitance is measured and plotted as a function of voltage. The technique uses a metal–semiconductor junction or a p–n junction or a MOSFET to create a depletion region, a region which is empty of conducting electrons and holes, but may contain ionized donors and electrically active defects or traps. The depletion region with its ionized charges inside behaves like a capacitor. By varying the voltage applied to the junction it is possible to vary the depletion width. The dependence of the depletion width upon the applied voltage provides information on the semiconductor's internal characteristics, such as its doping profile and electrically active defect densities., Measurements may be done at DC, or using both DC and a small-signal AC signal, or using a large-signal transient voltage.

In electronics, a self-aligned gate is a transistor manufacturing feature whereby a refractory gate electrode region of a MOSFET is used as a mask for the doping of the source and drain regions. This technique ensures that the gate will slightly overlap the edges of the source and drain.

The mercury probe is an electrical probing device to make rapid, non-destructive contact to a sample for electrical characterization. Its primary application is semiconductor measurements where otherwise time-consuming metallizations or photolithographic processing are required to make contact to a sample. These processing steps usually take hours and have to be avoided where possible to reduce device processing times.

PMOS logic p-type MOSFETs to implement logic gates

P-type metal-oxide-semiconductor logic uses p-channel (+) metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other digital circuits. PMOS transistors operate by creating an inversion layer in an n-type transistor body. This inversion layer, called the p-channel, can conduct holes between p-type "source" and "drain" terminals.

LDMOS is a planar double-diffused MOSFET used in amplifiers, including microwave power amplifiers, RF power amplifiers and audio power amplifiers. These transistors are often fabricated on p/p+ silicon epitaxial layers. The fabrication of LDMOS devices mostly involves various ion-implantation and subsequent annealing cycles. As an example, The drift region of this power MOSFET is fabricated using up to three ion implantation sequences in order to achieve the appropriate doping profile needed to withstand high electric fields.

A carbon nanotube field-effect transistor (CNTFET) refers to a field-effect transistor that utilizes a single carbon nanotube or an array of carbon nanotubes as the channel material instead of bulk silicon in the traditional MOSFET structure. First demonstrated in 1998, there have been major developments in CNTFETs since.

A gate driver is a power amplifier that accepts a low-power input from a controller IC and produces a high-current drive input for the gate of a high-power transistor such as an IGBT or power MOSFET. Gate drivers can be provided either on-chip or as a discrete module. In essence, a gate driver consists of a level shifter in combination with an amplifier. A gate driver IC serves as the interface between control signals and power switches. An integrated gate-driver solution reduces design complexity, development time, bill of materials (BOM), and board space while improving reliability over discretely-implemented gate-drive solutions.

Field-effect transistor transistor that uses an electric field to control its electrical behaviour

The field-effect transistor (FET) is a type of transistor which uses an electric field to control the flow of current. FETs are devices with three terminals: source, gate, and drain. FETs control the flow of current by the application of a voltage to the gate, which in turn alters the conductivity between the drain and source.


  1. IRLZ24N, 55V N-Channel Power MOSFET, TO-220AB package; Infineon.
  2. Irwin, J. David (1997). The Industrial Electronics Handbook. CRC Press. p. 218. ISBN   9780849383434.
  3. 1 2 3 "Power MOSFET Basics" (PDF). Alpha & Omega Semiconductor. Retrieved 29 July 2019.
  4. 1 2 Duncan, Ben (1996). High Performance Audio Power Amplifiers (PDF). Elsevier. pp. 178–81. ISBN   9780080508047.
  5. "Rethink Power Density with GaN". Electronic Design . 21 April 2017. Retrieved 23 July 2019.
  6. Oxner, E. S. (1988). Fet Technology and Application. CRC Press. p. 18. ISBN   9780824780500.
  7. 1 2 3 4 "Advances in Discrete Semiconductors March On". Power Electronics Technology. Informa: 52–6. September 2005. Archived (PDF) from the original on 22 March 2006. Retrieved 31 July 2019.
  8. Tarui, Y.; Hayashi, Y.; Sekigawa, Toshihiro (September 1969). "Diffusion Self-Aligned MOST; A New Approach for High Speed Device". Proceedings of the 1st Conference on Solid State Devices. doi:10.7567/SSDM.1969.4-1.
  9. McLintock, G. A.; Thomas, R. E. (December 1972). "Modelling of the double-diffused MOST's with self-aligned gates". 1972 International Electron Devices Meeting: 24–26. doi:10.1109/IEDM.1972.249241.
  10. 1 2 3 4 Duncan, Ben (1996). High Performance Audio Power Amplifiers (PDF). Elsevier. pp. 177–8, 406. ISBN   9780080508047.
  11. 1 2 Baliga, B. Jayant (2005). Silicon RF Power MOSFETS. World Scientific. ISBN   9789812561213.
  12. 1 2 Asif, Saad (2018). 5G Mobile Communications: Concepts and Technologies. CRC Press. p. 134. ISBN   9780429881343.
  13. "SEMI Award for North America". SEMI . Retrieved 5 August 2016.
  14. 1 2 "International Rectifier's Alex Lidow and Tom Herman Inducted Into Engineering Hall of Fame". Business Wire . 14 September 2004. Retrieved 31 July 2019.
  15. Baliga, B. Jayant (2015). The IGBT Device: Physics, Design and Applications of the Insulated Gate Bipolar Transistor. William Andrew. pp. xxviii, 5–11. ISBN   9781455731534.
  16. 1 2 "MDmesh: 20 Years of Superjunction STPOWER™ MOSFETs, A Story About Innovation". STMicroelectronics . 11 September 2019. Retrieved 2 November 2019.
  17. U.S. Patent 5,216,275
  18. ,"Process for high voltage superjunction termination",issued 2008-04-16
  19. ,"Methods for manufacturing superjunction semiconductor device having a dielectric termination",issued 2012-03-28
  20. "Power Transistor Market Will Cross $13.0 Billion in 2011". IC Insights. June 21, 2011. Retrieved 15 October 2019.
  21. Carbone, James (September–October 2018). "Buyers can expect 30-week lead times and higher tags to continue for MOSFETs" (PDF). Electronics Sourcing: 18–19.
  22. Williams, Richard K.; Darwish, Mohamed N.; Blanchard, Richard A.; Siemieniec, Ralf; Rutter, Phil; Kawaguchi, Yusuke (23 February 2017). "The Trench Power MOSFET: Part I—History, Technology, and Prospects". IEEE Transactions on Electron Devices. 64 (3): 674–691. Bibcode:2017ITED...64..674W. doi:10.1109/TED.2017.2653239.
  23. 1 2 "MOSFET". Infineon Technologies . Retrieved 24 December 2019.
  24. "Infineon EiceDRIVER™ gate driver ICs" (PDF). Infineon . August 2019. Retrieved 26 December 2019.
  25. "RF DMOS Transistors". STMicroelectronics . Retrieved 22 December 2019.
  26. "AN1256: Application note – High-power RF MOSFET targets VHF applications" (PDF). ST Microelectronics . July 2007. Retrieved 22 December 2019.
  27. Emadi, Ali (2017). Handbook of Automotive Power Electronics and Motor Drives. CRC Press. p. 117. ISBN   9781420028157.
  28. "Infineon Solutions for Transportation" (PDF). Infineon . June 2013. Retrieved 23 December 2019.
  29. "HITFETs: Smart, Protected MOSFETs" (PDF). Infineon . Retrieved 23 December 2019.
  30. "CMOS Sensors Enable Phone Cameras, HD Video". NASA Spinoff. NASA . Retrieved 6 November 2019.
  31. Veendrick, Harry J. M. (2017). Nanometer CMOS ICs: From Basics to ASICs. Springer. p. 245. ISBN   9783319475974.
  32. Korec, Jacek (2011). Low Voltage Power MOSFETs: Design, Performance and Applications. Springer Science+Business Media. pp. 9–14. ISBN   978-1-4419-9320-5.
  33. "Automotive Power MOSFETs" (PDF). Fuji Electric . Retrieved 10 August 2019.
  34. Williams, R. K.; Darwish, M. N.; Blanchard, R. A.; Siemieniec, R.; Rutter, P.; Kawaguchi, Y. (2017). "The Trench Power MOSFET—Part II: Application Specific VDMOS, LDMOS, Packaging, Reliability". IEEE Transactions on Electron Devices. 64 (3): 692–712. Bibcode:2017ITED...64..692W. doi:10.1109/TED.2017.2655149. ISSN   0018-9383.
  35. Simon M. Sze, Modern semiconductor device physics, John Wiley and Sons, Inc 1998 ISBN   0-471-15237-4
  36. Pierre Aloïsi, Les transistors MOS de puissance in Interrupteurs électroniques de puissance, traite EGEM, under the direction of Robert Perret, Lavoisier, Paris, 2003 [in French] ISBN   2-7462-0671-4
  37. http://www.irf.com/technical-info/whitepaper/pcim2000.pdf
  38. Duncan A. Grant, John Gowar POWER MOSFETS: Theory and Applications John Wiley and Sons, Inc ISBN   0-471-82867-X , 1989

Further reading