IBM AS/400

Last updated
IBM AS/400
IBM AS-400 9406-730.jpg
IBM AS/400e model 730
Also known asAS/400e, eServer iSeries, eServer i5, System i
ManufacturerIBM
Type Midrange computer
Release dateJune 1988 (Announced)
August 1988 (Release)
DiscontinuedSep 30, 2013
Operating system OS/400 (later known as i5/OS and IBM i)
CPU IMPI, IBM RS64, POWER
Predecessor IBM System/38,
Successor IBM Power Systems running IBM i
Related IBM System p

The IBM AS/400 (Application System/400) is a family of midrange computers from IBM announced in June 1988 and released in August 1988. It was the successor to the System/36 and System/38 platforms, and ran the OS/400 operating system. Lower-cost but more powerful than its predecessors, the AS/400 was extremely successful at launch, with an estimated 111,000 installed by the end of 1990 and annual revenue reaching $14 billion that year, [1] increasing to 250,000 systems by 1994, [2] and about 500,000 shipped by 1997. [3]

Contents

A key concept in the AS/400 platform is Technology Independent Machine Interface [lower-alpha 1] (TIMI), a platform-independent instruction set architecture (ISA) that is translated to native machine language instructions. The platform has used this capability to change the underlying processor architecture without breaking application compatibility. Early systems were based on a 48-bit CISC instruction set architecture known as the Internal Microprogrammed Interface (IMPI), originally developed for the System/38. [4] In 1991, the company introduced a new version of the system running on a series of 64-bit PowerPC-derived CPUs, the IBM RS64 family. [5] Due to the use of TIMI, applications for the original CISC-based programs continued to run on the new systems without modification, as the TIMI code can be re-translated to the new systems' PowerPC Power ISA native machine code. The RS64 was replaced with POWER4 processors in 2001, which was followed by POWER5 and POWER6 in later upgrades.

The AS/400 went through multiple re-branding exercises, finally becoming the System i in 2006. In 2008, IBM consolidated the separate System i and System p product lines (which had mostly identical hardware by that point) [6] into a single product line named IBM Power Systems. [7] [8] The name "AS/400" is sometimes used informally to refer to the IBM i operating system running on modern Power Systems hardware. [9]

History

Fort Knox

IBM AS/400 9404-B10 with a 5281 terminal IBM AS-400 9404-B10.jpg
IBM AS/400 9404-B10 with a 5281 terminal

In the early 1980s, IBM management became concerned that IBM's large number of incompatible midrange computer systems was hurting the company's competitiveness, particularly against Digital Equipment Corporation's VAX. [10] In 1982, a project named Fort Knox commenced, which was intended to consolidate the System/36, the System/38, the IBM 8100, the Series/1 and the IBM 4300 series into a single product line based around an IBM 801-based processor codenamed Iliad, while retaining backwards compatibility with all the systems it was intended to replace. [11] A new operating system would be created for Fort Knox, but the operating systems of each platform which Fort Knox was intended to replace would also be ported to the Iliad processor to allow customers to migrate their software to the new platform.

The Fort Knox project proved to be overly ambitious, and ran into multiple delays and changes of scope. As the project advanced, the requirement to support IBM 8100 and Series/1 software was dropped. [12] When IBM's engineers attempted to port the operating systems and software of their existing platforms, they discovered that it would be impossible without making extensive changes to the Iliad processor for each individual operating system – changes which the Iliad's architects were unwilling to make. [11] The proposed solution to this was to augment Iliad with operating system-specific co-processors which provided hardware support for a single operating system. However, the amount of logic needed in each co-processor grew until the co-processors became the main processor, and the Iliad was relegated to the role of a support processor – thus failing the goal of consolidating on a single processor architecture. The Fort Knox project was ultimately cancelled in 1985.

IBM AS/400 IBM AS-400 9406-720.jpg
IBM AS/400
IBM System i 570 server (as of 2006) IBM eServer i5 570.jpg
IBM System i 570 server (as of 2006)

Silverlake

During the Fort Knox project, a skunkworks project was started at IBM Rochester by engineers who believed that Fort Knox's failure was inevitable. These engineers developed code which allowed System/36 applications to run on top of the System/38, [12] and when Fort Knox was cancelled, this skunkworks project evolved into an official project to replace both the System/36 and System/38 with a single new hardware platform. [13] The project became known as Silverlake (named for Silver Lake in Rochester, Minnesota) and officially began in December 1985. [14] The Silverlake hardware was essentially an evolution of the System/38 which reused some of the technology developed for the Fort Knox project. [12] [15]

Silverlake's goal was to deliver a replacement for the System/36 and System/38 in as short of a timeframe as possible, as the Fort Knox project had stalled new product development at Rochester, leaving IBM without a competitive midrange system. [16] On its launch in 1986, the System/370-compatible IBM 9370 was positioned as IBM's preferred midrange platform, but failed to achieve the commercial success IBM hoped it would have. [11] [17] Much like Silverlake, the 9370 also reused the co-processor developed during the Fort Knox project as its main processor, and the same SPD I/O bus which was derived from the Series/1 bus. [11]

AS/400

On June 21, 1988, IBM officially announced the Silverlake system as the Application System/400 (AS/400). The announcement included more than 1,000 software packages written for it by IBM and IBM Business Partners. [18] The AS/400 operating system was named Operating System/400 (OS/400). [12]

The creators of the AS/400 originally planned to use the name System/40, but IBM had adopted a new product nomenclature around the same time, which led to the Application System/400 name. [13] Firstly, IBM began prefixing "System" in product names with words to indicate the intended use or target market of the system (e.g. Personal System/2 and Enterprise System/9000). Secondly, IBM decided to reserve one and two digit model numbers for personal systems (e.g. PS/2 and PS/55), three digit numbers for midrange systems (e.g. AS/400) and four digit numbers for mainframes (e.g. ES/9000). The reassignment of two digit model numbers from midrange systems to personal systems was to prevent the personal systems from running out of single-digit numbers for new products.

The move to PowerPC

In 1990, IBM Rochester began work to replace the AS/400's original System/38-derived 48-bit CISC processors with a 96-bit architecture known as C-RISC (Commercial RISC). [11] Rather than being a clean-slate design, C-RISC would have added RISC-style and VLIW-style instructions to the AS/400's processor, while maintaining backwards compatibility with the System/370-style Internal Microprogrammed Interface (IMPI) instruction set and the microcode used to implement it.

In 1991, at the request of IBM president Jack Kuehler, a team under the leadership of Frank Soltis delivered a proposal to adapt the 64-bit PowerPC architecture to support the needs of the AS/400 platform. [19] Their extensions to the PowerPC architecture, known as Amazon (and later as PowerPC AS), were approved by IBM management instead of the C-RISC design for development into the next AS/400 processor architecture. [20] These extensions include support for tagged memory, [21] as well as assistance for decimal arithmetic. [22]

IBM initially attempted to create a single PowerPC implementation for both AS/400 and high-end RS/6000 systems known as Belatrix. [11] The Belatrix project proved to be too ambitious, and was cancelled when it became apparent that it would not deliver on schedule. Instead, a pair of AS/400-specific processors were designed at IBM Endicott and IBM Rochester, known as Cobra (for low end systems) and Muskie (for high end systems) respectively. These became the initial implementations of the IBM RS64 processor line. The RS64 series continued to be developed as a separate product line at IBM until the POWER4 merged both the RS64 and POWER product lines together. [13]

Despite the move from IMPI to an entirely different processor architecture, the AS/400's Technology Independent Machine Interface (TIMI) mostly hid the changes from users and applications, and transparently recompiled applications for the new processor architecture. [23] The port of OS/400 to the PowerPC AS architecture required a rewrite of most of the code below the TIMI due to the use of IMPI microcode to implement significant quantities of the operating system's low level code. [13] This led to the creation of the System Licensed Internal Code (SLIC) - a new implementation of the lower levels of the operating system mostly written in C++.

Rebranding

The AS/400 family line was rebranded several times in the 1990s and 2000s as IBM introduced newer generations of hardware and operating system. [23]

In 1994, the AS/400 Advanced Series name was used for new models, followed by the rebranding of the product line to AS/400e (the e standing for e-business) in 1997. [13]

In 2000, eServer iSeries was introduced as part of its eServer branding initiative. [24] The eServer iSeries was built on the POWER4 processor from the RS64 processors used by previous generations, meaning that the same processors were used in both the iSeries and pSeries platforms, the latter of which ran AIX.

In 2004, eServer i5 (along with OS/400 becoming i5/OS) the 5 signifying the use of POWER5 processors, was introduced, replacing the eServer iSeries brand. [25] Successive generations of iSeries and pSeries hardware converged until they were essentially the same hardware sold under different names and with different operating systems. [6] Some i5 servers were still using the AS/400-specific IBM Machine Type (MT/M 9406-520), and were able to run AIX in an LPar along i5/OS, while the p5 servers were able to run i5/OS respectively. The licensing for AIX and i5/OS was controlled in the firmware by the POWER hypervisor.

The final rebranding occurred in 2006, when IBM rebranded the eServer i5 to System i. [26]

In April 2008, IBM introduced the IBM Power Systems line, which was a convergence of System i and System p product lines. [7] The first Power Systems machines used the POWER6 processors; i5/OS was renamed as IBM i, in order to remove the association with POWER5 processors. [27] IBM i is sold as one of the operating system options for Power Systems (along with AIX and Linux) instead of being tied to its own hardware platform.

Legacy

Although announced in 1988, the AS/400 remains IBM's most recent major architectural shift that was developed wholly internally[ citation needed ]. After the departure of CEO John Akers in 1993, when IBM looked likely to be split up, Bill Gates commented that the only part of IBM that Microsoft would be interested in was the AS/400 division. (At the time, many of Microsoft's business and financial systems ran on the AS/400 platform, rumored as ended around 1999 with the introduction of Windows 2000. [28] [29] [30] )

System architecture

According to Frank Soltis, one of the architects of the AS/400 platform, the AS/400's architecture is defined by five architectural principles. Most of these principles are inherited from System/38. [31]

Technology Independence

IBM AS/400e Model 150 IBM AS-400e Model 150 (cropped).jpg
IBM AS/400e Model 150

The high-level instruction set (called TIMI for "Technology Independent Machine Interface" by IBM), allows application programs to take advantage of advances in hardware and software without recompilation. TIMI is a virtual instruction set independent of the underlying machine instruction set of the CPU. User-mode programs contain both TIMI instructions and the machine instructions of the CPU, thus ensuring hardware independence. This is conceptually somewhat similar to the virtual machine architecture of programming environments such as Java and .NET.

Unlike some other virtual-machine architectures in which the virtual instructions are interpreted at run time, TIMI instructions are never interpreted. They constitute an intermediate compile time step and are translated into the processor's instruction set as the final compilation step. The TIMI instructions are stored within the final program object, in addition to the executable machine instructions. This is how application objects compiled on one processor family (e.g., the original CISC AS/400 48-bit processors) could be moved to a new processor (e.g., PowerPC 64-bit) without re-compilation. An application saved from the older 48-bit platform can simply be restored onto the new 64-bit platform where the operating system discards the old machine instructions and re-translates the TIMI instructions into 64-bit instructions for the new processor.

The system's instruction set defines all pointers as 128-bit. This was the original design feature of the System/38 (S/38) in the mid 1970s planning for future use of faster processors, memory and an expanded address space. The original AS/400 CISC models used the same 48-bit address space as the S/38. The address space was expanded in 1995 when the RISC PowerPC RS64 64-bit CPU processor replaced the 48-bit CISC processor.

Software integration

OS/400 (now known as IBM i) is the native operating system of the AS/400 platform, and was the sole operating system supported on the original AS/400 hardware. Many of the advanced features associated with the AS/400 are implemented in the operating system as opposed to the underlying hardware, which changed significantly throughout the life of the AS/400 platform. Features include a RDBMS (Db2 for i), a menu-driven interface, support for multiple users, block-oriented terminal support (IBM 5250), and printers.

Object-based design

Unlike the "everything is a file" principle of Unix and its derivatives, on IBM i everything is an object (with built-in persistence and garbage collection).[ citation needed ]

Single-level store

IBM uses a single-level store virtual memory architecture in the AS/400 platform. For 64-bit PowerPC processors, the virtual address resides in the rightmost 64 bits of a pointer while it was 48 bits in the S/38 and CISC AS/400. The 64-bit address space references main memory and disk as a single address set which is the single-level store concept.

Hardware integration

Later generations of hardware are also capable of supporting various guest operating systems, including SSP, AIX, Linux, Microsoft Windows 2000 and Windows Server 2003. While OS/400, AIX, and Linux are supported on the POWER processors on LPARs (logical partitions), Windows is supported with either single-processor internal blade servers (IXS) or externally linked multiple-processor servers (IXA and iSCSI). SSP guests were supported using emulation from OS/400 V3R6 through V4R4 using the Advanced 36 Machine facility of the operating system, a feature distinct from the System/36 Environment compatibility layer which requires System/36 software to be recompiled.

Hardware

CPUs

CPU Year Clock SpeedServer-Models
IMPI [note 1] 1988 > 22 MHz [note 2] Current stable version:AS/400Bxx, Cxx, Dxx, Exx, Fxx, Pxx, 100, 135, 140, 2xx, 3xx [33]
Cobra (A10) 1995 55 or 75 MHz4xx, 5xx
Muskie (A25/A30) 1996 125 or 154 MHz53x
Apache (RS64) (A35) 1997 125 MHz6xx, 150
NorthStar (RS64 II) 1998 200, 255 or 262 MHz170, 250, 7xx, 650, S40, SB1 [34]
Pulsar (RS64 III) 1999 450 MHz Future release: iSeries;
System i
270, 820
IStar (RS64 III upgraded) 2000 400, 500, 540 or 600 MHz820, 830, 840, [35] SB2, SB3 [36]
SStar (RS64 IV) 2000 540, 600 or 750 MHz270, 800, 810, 820, 830, 840
POWER4 2001 1.1 or 1.3 GHz890
POWER4+ 2003 1.9 GHz825, 870
POWER5 2004 1.5 or 1.9 GHzi5-520; i5-550; i5-570; i5-595
POWER5+ 2005 1.5 GHz (2005)
1.9 GHz (2005)
2.2 GHz
2.3 GHz		i5-520, i5-550, i5-515, i5-525
i5-570
POWER6 2007 3.5 GHz
4.2 GHz
4.7 GHz		 BladeCenter JS12, JS22
i5-570 (MMA)
M50, M25 & M15
  1. ↑ There were at least two generations of IMPI processors, the second was released in 1991. [32]
  2. ↑ "The processor clock cycle is 45 ns worst case." [32]

System models

Model Year CPU Group Base - CPW
B10, B20, B30, B35, B40, B45, B50, B60, B70 1988-1989 P10, P20 2,9 - 20
C04, C06, C10, C20, C25 1990 P10 3,1 - 6,1
D02, D04, D06, D10, D20, D25, D35, D45, D50, D60, D70, D80 1991 P10, P20, P30 3,8 - 56,6
E02, E04, E06, E10, E20, E25, E35, E45, E50, E60, E70, E80, E90, E95 1992 P10, P20, P30, P40 4,5 - 116,6
F02, F04, F06, F10, F20, F25, F35, F45, F50, F60, F70, F80, F90, F95, F97 1993 P05, P10, P20, P30, P40 5,5 - 177,4
P01, P02, P03 1993-1995 P05 7,3 - 16,8
150 1996 P05 10,9 - 35,0
S10, S20, S30, S40 1997 P05, P10, P20, P30, P40, P50 45,4 - 4550
SB1, SB2, SB3 1997-2000 P30, P40 1794 - 16500
10S, 100, 135, 140 1993-1995 P05, P10, P20 17,1 - 65,6
170 1998 P05, P10, P20 30 - 1090
200, 20S, 236 1994 P05, P10 7,3 - 17,1
250 2000 P05 50 - 75
270 2000 P05, P10, P20 50 - 2350
300, 30S, 310 1994 P10, P20, P30, P40 11,6 - 177,4
400, 40S, 436 1995 P05, P10 13,8 - 91,0
500, 50S, 510, 530, 53S 1995 P10, P20, P30, P40 18,7 - 650
600, 620, 640, 650 1997 P05, P10, P20, P30, P40, P50 22,7 - 4550
720 1999 P10, P20, P30 240 - 1600
730 1999 P20, P30, P40 560 - 2890
740 1999 P40, P50 3660 - 4550
800 2003 P05, P10 300 - 950
810 2003 P10, P20 750 - 2700
820 2000-2001 P05, P10, P20, P30, P40 100 - 3700
825 2003 P30 3600 - 6600
830 2000-2002 P20, P30, P40, P50 1850 - 7350
840 2000-2002 P40, P50 10000 - 20200
870 2002 P40, P50 7700 - 20000
890 2002 P50, P60 20000 - 37400
520 2004-2006 P05, P10, P20 500 - 7100
550 2004-2006 P20 3300 - 14000
570 2004-2006 P30, P40 3300 - 58500
595 2004-2006 P50, P60 24500 - 216000
515 2007 P05 3800 - 7100
525 2007 P10 3800 - 7100
570 2007 P40 16700 - 58500
MMA (9406) 2007 P30 5500 - 76900
M15 2008 P05 4300
M25 2008 P10 4300 - 8300
M50 2008 P20 4800 - 18000
MMA 2008 P30 8150 - 76900
JS12 2008 P05 7100
JS22 2008 P10 13800
JS23 2008
JS43 2008
570 (9117) 2008 P30 104800
595 (9119) 2008 P60 294700

See also

Preceded by IBM System p
2000 - 2008
eServer pSeries
2000
 eServer p5
2004
System p5
2005
System p
2007
Succeeded by
Preceded by IBM AS/400
1988 - 2008
Advanced/36, AS/Entry-
AS/400
1988
AS/400e
1997
 eServer iSeries
2000
 eServer i5
2004
System i5
2005
System i
2006

Notes

  1. ↑ Upward compatible from the Machine Interface (MI) of the S/38

Related Research Articles

<span class="mw-page-title-main">Minicomputer</span> Mid-1960s–late-1980s class of smaller computers

A minicomputer, or colloquially mini, is a type of smaller general-purpose computer developed in the mid-1960s and sold at a much lower price than mainframe and mid-size computers from IBM and its direct competitors. In a 1970 survey, The New York Times suggested a consensus definition of a minicomputer as a machine costing less than US$25,000, with an input-output device such as a teleprinter and at least four thousand words of memory, that is capable of running programs in a higher level language, such as Fortran or BASIC.

<span class="mw-page-title-main">PowerPC</span> RISC instruction set architecture by AIM alliance

PowerPC is a reduced instruction set computer (RISC) instruction set architecture (ISA) created by the 1991 Apple–IBM–Motorola alliance, known as AIM. PowerPC, as an evolving instruction set, has been named Power ISA since 2006, while the old name lives on as a trademark for some implementations of Power Architecture–based processors.

<span class="mw-page-title-main">Reduced instruction set computer</span> Processor executing one instruction in minimal clock cycles

In electronics and computer science, a reduced instruction set computer (RISC) is a computer architecture designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a complex instruction set computer (CISC), a RISC computer might require more instructions in order to accomplish a task because the individual instructions are written in simpler code. The goal is to offset the need to process more instructions by increasing the speed of each instruction, in particular by implementing an instruction pipeline, which may be simpler to achieve given simpler instructions.

<span class="mw-page-title-main">History of operating systems</span> Aspect of computing history

Computer operating systems (OSes) provide a set of functions needed and used by most application programs on a computer, and the links needed to control and synchronize computer hardware. On the first computers, with no operating system, every program needed the full hardware specification to run correctly and perform standard tasks, and its own drivers for peripheral devices like printers and punched paper card readers. The growing complexity of hardware and application programs eventually made operating systems a necessity for everyday use.

The 801 was an experimental central processing unit (CPU) design developed by IBM during the 1970s. It is considered to be the first modern RISC design, relying on processor registers for all computations and eliminating the many variant addressing modes found in CISC designs. Originally developed as the processor for a telephone switch, it was later used as the basis for a minicomputer and a number of products for their mainframe line. The initial design was a 24-bit processor; that was soon replaced by 32-bit implementations of the same concepts and the original 24-bit 801 was used only into the early 1980s.

<span class="mw-page-title-main">64-bit computing</span> Computer architecture bit width

In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit central processing units (CPU) and arithmetic logic units (ALU) are those that are based on processor registers, address buses, or data buses of that size. A computer that uses such a processor is a 64-bit computer.

<span class="mw-page-title-main">IBM i</span> Operating system

IBM i is an operating system developed by IBM for IBM Power Systems. It was originally released in 1988 as OS/400, as the sole operating system of the IBM AS/400 line of systems. It was renamed to i5/OS in 2004, before being renamed a second time to IBM i in 2008. It is an evolution of the System/38 CPF operating system, with compatibility layers for System/36 SSP and AIX applications. It inherits a number of distinctive features from the System/38 platform, including the Machine Interface which provides hardware independence, the implementation of object-based addressing on top of a single-level store, and the tight integration of a relational database into the operating system.

<span class="mw-page-title-main">IBM System/36</span> IBM midrange computer (1983–2000)

The IBM System/36 was a midrange computer marketed by IBM from 1983 to 2000 - a multi-user, multi-tasking successor to the System/34.

<span class="mw-page-title-main">IBM System/38</span> IBM midrange computer (1978–1988)

The System/38 is a discontinued minicomputer and midrange computer manufactured and sold by IBM. The system was announced in 1978. The System/38 has 48-bit addressing, which was unique for the time, and a novel integrated database system. It was oriented toward a multi-user system environment. At the time, the typical system handled from a dozen to several dozen terminals. Although the System/38 failed to displace the systems it was intended to replace, its architecture served as the basis of the much more successful IBM AS/400.

<span class="mw-page-title-main">Frank Soltis</span> American computer scientist

Frank Gerald Soltis, is an American computer scientist. He joined IBM Rochester in 1969, and is most well known for his contributions to the System/38 and IBM AS/400 architectures, in particular - the design of the single-level store used in those platforms, and the RS64 processor architecture. He retired from IBM in 2008 upon the merger of the System i and System p product lines into IBM Power Systems. Prior to his retirement, he held the title of Chief Scientist at IBM.

The IBM RS64 is a family of microprocessors introduced in the mid 1990s, and used in IBM's RS/6000 and AS/400 servers.

Hardware abstractions are sets of routines in software that provide programs with access to hardware resources through programming interfaces. The programming interface allows all devices in a particular class C of hardware devices to be accessed through identical interfaces even though C may contain different subclasses of devices that each provide a different hardware interface.

A hypervisor, also known as a virtual machine monitor (VMM) or virtualizer, is a type of computer software, firmware or hardware that creates and runs virtual machines. A computer on which a hypervisor runs one or more virtual machines is called a host machine, and each virtual machine is called a guest machine. The hypervisor presents the guest operating systems with a virtual operating platform and manages the execution of the guest operating systems. Unlike an emulator, the guest executes most instructions on the native hardware. Multiple instances of a variety of operating systems may share the virtualized hardware resources: for example, Linux, Windows, and macOS instances can all run on a single physical x86 machine. This contrasts with operating-system–level virtualization, where all instances must share a single kernel, though the guest operating systems can differ in user space, such as different Linux distributions with the same kernel.

The PowerPC 600 family was the first family of PowerPC processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded and staffed by engineers from IBM and Motorola as a part of the AIM alliance. Somerset was opened in 1992 and its goal was to make the first PowerPC processor and then keep designing general purpose PowerPC processors for personal computers. The first incarnation became the PowerPC 601 in 1993, and the second generation soon followed with the PowerPC 603, PowerPC 604 and the 64-bit PowerPC 620.

<span class="mw-page-title-main">Midrange computer</span> Class of computer systems that fall in between mainframes and minicomputers

Midrange computers, or midrange systems, were a class of computer systems that fell in between mainframe computers and microcomputers.

<span class="mw-page-title-main">IBM Power Systems</span> Line of computer servers from IBM

IBM Power Systems is a family of server computers from IBM that are based on its Power processors. It was created in 2008 as a merger of the System p and System i product lines.

<span class="mw-page-title-main">IBM 9370</span> IBM mainframe-compatible low-end system

The IBM 9370 systems are "baby mainframe" midrange computers, released 1986 at the very low end of, and compatible with System/370. The media of the day, referring to the VAX systems manufactured by Digital Equipment Corporation (DEC), carried IBM's alleged "VAX Killer" phrase, albeit often skeptically.

IBM POWER is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by IBM. The name is an acronym for Performance Optimization With Enhanced RISC.

IBM Power microprocessors are designed and sold by IBM for servers and supercomputers. The name "POWER" was originally presented as an acronym for "Performance Optimization With Enhanced RISC". The Power line of microprocessors has been used in IBM's RS/6000, AS/400, pSeries, iSeries, System p, System i, and Power Systems lines of servers and supercomputers. They have also been used in data storage devices and workstations by IBM and by other server manufacturers like Bull and Hitachi.

The term IBM platform could refer to any of the hardware and operating systems below.

References

  1. ↑ Elms, Teresa (29 April 1991). "Side road to success". Computerworld. p. 27.
  2. ↑ Korzenioski, Paul (14 February 1994). "AS/400 in the LAN environment". InfoWorld. p. 52.
  3. ↑ IBM (23 January 2003). "IBM AS/400". IBM.com. International Business Machines Corporation. Retrieved 20 March 2022.
  4. ↑ David McKenzie. "Notes for storage research". Archived from the original on October 8, 1999.
  5. ↑ Soltis, Frank G. "When Is PowerPC Not PowerPC?". The 400 Squadron. Archived from the original on January 8, 2008.
  6. 1 2 Timothy Prickett-Morgan (2008-04-07). "Bye Bye System p and i, Hello Power Systems". IT Jungle. Retrieved 2021-10-09.
  7. 1 2 Niccolai, James (April 2, 2008). "IBM merges System i and System p server lines" . InfoWorld .
  8. ↑ Timothy Prickett Morgan (2008-04-07). "It's Official: Now We're Power Systems and i for Business". itjungle.com. Retrieved 2021-03-15.
  9. ↑ Alex Woodie (2017-07-17). "Of Course i's Not The AS/400". IT Jungle. Retrieved 2021-11-22.
  10. ↑ Roy A. Bauer; Emilio Collar; Victor Tang (1992). The Silverlake Project: Transformation at IBM. Oxford University Press. ISBN   9780195067545.
  11. 1 2 3 4 5 6 Soltis (1997), p. [ page needed ].
  12. 1 2 3 4 Schleicher, David L. (2006-01-24). "An Interview with DAVID L. SCHLEICHER" (PDF). conservancy.umn.edu (Interview). Interviewed by Arthur L. Norberg. Charles Babbage Institute. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-05.
  13. 1 2 3 4 5 Soltis (2001), p. [ page needed ].
  14. ↑ Tom Huntington (2018-06-21). "Happy 30th Anniversary, IBM i!". helpsystems.com. Archived from the original on 2021-04-20. Retrieved 2021-03-05.
  15. ↑ "Silverlake". wiki.midrange.com. 2006-08-21. Retrieved 2021-03-06.
  16. ↑ Eric J. Wieffering (1992-05-23). "The brave new world of IBM Rochester". postbulletin.com. Retrieved 2021-03-06.
  17. ↑ Christine Winter (1988-06-20). "NEW IBM MIDRANGE TO DEBUT". Chicago Tribune .
  18. ↑ IBM (23 January 2003). "IBM AS/400". IBM. International Business Machines Corporation. Retrieved 19 March 2022.
  19. ↑ John Paul Shen; Mikko H. Lipasti (30 July 2013). Modern Processor Design: Fundamentals of Superscalar Processors. Waveland Press. ISBN   978-1-4786-1076-2.
  20. ↑ Adam T. Stallman; Frank G. Soltis (July 1, 1995). "Inside the PowerPC AS". System iNEWS Magazine. Archived from the original on August 31, 2013.
  21. ↑ Landau, Hugo. "The PowerPC AS Tagged Memory Extensions".
  22. ↑ McKenzie, Dave (December 5, 2000). "Re: Packed decimals". Newsgroup:  comp.arch. Usenet:   fopr2tg596q0s28ibma1bkj05skcdldct8@4ax.com.
  23. 1 2 Tom Van Looy (January 2009). "The IBM AS/400: A technical introduction" (PDF). scss.tcd.ie. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-13.
  24. ↑ "IBM eServer iSeries 400". IBM. October 3, 2000.
  25. ↑ Denny Insell (2004). "Introducing IBM eServer i5 & i5/OS" (PDF). IBM. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-14.
  26. ↑ Alex Woodie (2017-10-11). "IBM i Slow to Catch On, But What Does It Mean?". itjungle.com. Retrieved 2021-03-15.
  27. ↑ "IBM Introduces the First in a New Generation of Power Systems". IBM. 2008-04-02. Archived from the original on May 11, 2008. Retrieved 2021-03-15.
  28. ↑ Microsoft TechNet. "AS/400s extinct at Microsoft since 1999". Google discussion group, Microsoft runs AS/400's in-house - Article?. Retrieved 2007-05-16.
  29. ↑ "Disparition des systèmes AS/400 chez Microsoft depuis mai 1999". Archived from the original on 2012-11-06. Retrieved 2013-01-02.
  30. ↑ "Microsoft Uses the iSeries to Run its Business". Blogspot, Confessions of An iSeries Priest. 5 March 2006. Retrieved 2006-03-05.
  31. ↑ Soltis (2001), p. 1–5, 97–177.
  32. 1 2 Schmierer, Q.G.; Wottreng, A.H. (1991). "IBM AS/400 processor architecture and design methodology". [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors. IEEE International Conference on Computer Design: VLSI in Computers and Processors. pp. 440–443. doi:10.1109/ICCD.1991.139942. ISBN   0-8186-2270-9.
  33. ↑ "AS/400e System Handbook" (PDF). IBM. 1999-08-03. Archived (PDF) from the original on 2022-10-09. Retrieved 2021-03-21.
  34. ↑ IBM.com. "V4R3 Questions and Answers". Reference # 8625668200695613. Retrieved 2007-04-04.[ permanent dead link ]
  35. ↑ "Family 9406+05 IBM eServer iSeries Models 820, 830, and 840". 12 May 2020.
  36. ↑ "IBM AS/400E MIDDLE-TIER SERVERS...FOR EXTREME BUSINESS". www.ibm.com. 2000-06-12. Retrieved 2021-11-29.
This page is based on this Wikipedia article
Text is available under the CC BY-SA 4.0 license; additional terms may apply.
Images, videos and audio are available under their respective licenses.