The Intel 8231 and 8232 were early designs of floating-point maths coprocessors (FPUs), marketed for use with their i8080 line of primary CPUs. They were licensed versions of AMD's Am9511 and Am9512 FPUs, from 1977 and 1979, themselves claimed by AMD as the world's first single-chip FPU solutions. [1] [2]
Whilst the i8231/i8232 (and their AMD-branded cousins) were primarily intended to partner the i8080 (or the AMD clone Am9080), the multiple interface options in their design, from simple wait state insertion and status polling routines to interrupt and DMA controller driven methods suitable for a peripheral processor or add-in board, meant that – with a small amount of glue logic – it was usable in almost any microprocessor system that had a DMA subsystem or a spare interrupt input/interrupt vector available, and AMD's original documentation provided several different examples. [2] This was a valuable feature for one of the first commercially available single-chip FPUs, greatly broadening its potential market, and was in stark contrast to Intel's succeeding, in-house designed 8087 (and other x87 family) FPUs which were tightly bound to the x86 CPU line. For example, the i8231A was used in the Applied Analytics MicroSPEED II and II+ accelerator cards for the 6502-based Apple II line, [3] but examples were also given for the Z80, MC6800, i8085, and even the 16-bit Z8000. Additionally, prior to the introduction of the 8087, Intel's own preliminary datasheets suggested the chips as suitable companions for the then-new 8086. [4]
The Intel 8231 (and revised 8231A) is the Arithmetic Processing Unit (APU). It offered 32-bit "double" precision (a term later and more commonly used to describe 64-bit floating-point numbers, whilst 32-bit is considered "single" precision) floating-point, and 16-bit or 32-bit ("single" or "double" precision) fixed-point calculation of 14 different arithmetic and trigonometric functions to a proprietary standard. The APU used the Chebyshev polynomials using the algorithms provided here. The available APU version of 4-MHz was for USD $235.00 and 2-MHz was for USD $149.00 in quantities of 100 or more. [5] The later Intel 8232 is the Floating Point Processor Unit (FPU). It performed 32-bit or 64-bit (true single- and double-precision) floating point calculations compliant with the (draft) IEEE-754 standard (as used by the i80387 and other later FPUs), but only on the four primary arithmetic functions (addition, subtraction, multiplication and division). [1] [6] The available FPU version of 4-MHz was for USD $235.00 and 2-MHz was for USD $149.00 in quantities of 100 or more. [7]
All three chips used an 8-bit data bus design, in line with the i8080 and most other contemporary microprocessors. The 8231 could run at up to 3 MHz, [1] and the 8231A and 8232 up to 4 MHz [1] [4] (a slight improvement on the Am9512 which was limited to 3 MHz [2] ), either in sync with the CPU or (in the 8231A and 8232) asynchronously depending on the degree of bus separation in the host system. Async operation was a useful addition to the feature set, as it allowed e.g. a roughly 1 MHz Apple II system to be expanded with a 4 MHz 8231A and enjoy the benefit of much faster numeric processing than it may otherwise have been limited to, or a 5 MHz i8085-based system to host an 8231A or 8232 without itself having to be slowed to 4 MHz or less to maintain compatibility. It also, along with the interrupt driven peripheral design, allowed a degree of parallel processing between the CPU and FPU, with the former resuming its own normal processing after passing commands and data to the essentially "offboard" coprocessor, only switching back to the floating-point subtask (to receive results and optionally issue further commands) when signalled by the copro that processing was complete. This parallelisation was vital to improving overall system throughput, when some of the more complex functions could still take the FPU several milliseconds to complete – an eternity in computing terms.
Instruction execution times were very variable and, as an early generation design, typically much longer than those seen in later, more evolved FPUs. For example, ignoring data and stack handling instructions, on the 8232 they ranged from 56 clock periods for a single-precision (32-bit) subtraction, to a full 4560 periods for a double-precision (64-bit) divide, [4] for an effective processing speed (if clocked at 4 MHz) of 877 to 71429 FLOPS. The 8231(A)'s instructions ranged from 17 periods for a 16-bit fixed-point addition, through 98 to 378 periods for common 32-bit float operations (heavily dependent not only on the function itself, but the actual magnitude of the operands and result, and even the number of "1" bits in each number), to as many as 12032 periods for a maximally complex "power" calculation, giving 332, through 10.6k ~ 40.8k, to 235.3k FLOPS of performance (at 4 MHz) depending on the instruction and data mix. [6] Whilst these numbers may seem low from a modern perspective, they compare reasonably well with the successor i8087 (whose bigger advantages were a wider databus and address range – allowing faster transfers in and out of a larger memory space, greater numeric precision, expanded instruction/function set and near-IEEE-754 compliance), and were radically faster compared to performing the same calculations using software emulation on a regular CPU – even a relatively sophisticated, 16-bit 8086 running at a full 8 MHz could only achieve somewhere between a few dozen, to no more than around 1000 FLOPS without a coprocessor, [8] and its slower clocked, 8-bit predecessors and rivals would have fared even worse.
The Cyrix 6x86 is a line of sixth-generation, 32-bit x86 microprocessors designed and released by Cyrix in 1995. Cyrix, being a fabless company, had the chips manufactured by IBM and SGS-Thomson. The 6x86 was made as a direct competitor to Intel's Pentium microprocessor line, and was pin compatible. During the 6x86's development, the majority of applications performed almost entirely integer operations. The designers foresaw that future applications would most likely maintain this instruction focus. So, to optimize the chip's performance for what they believed to be the most likely application of the CPU, the integer execution resources received most of the transistor budget. This would later prove to be a strategic mistake, as the popularity of the P5 Pentium caused many software developers to hand-optimize code in assembly language, to take advantage of the P5 Pentium's tightly pipelined and lower latency FPU. For example, the highly anticipated first-person shooter Quake used highly optimized assembly code designed almost entirely around the P5 Pentium's FPU. As a result, the P5 Pentium significantly outperformed other CPUs in the game.
The Intel 80286 is a 16-bit microprocessor that was introduced on February 1, 1982. It was the first 8086-based CPU with separate, non-multiplexed address and data buses and also the first with memory management and wide protection abilities. The 80286 used approximately 134,000 transistors in its original nMOS (HMOS) incarnation and, just like the contemporary 80186, it could correctly execute most software written for the earlier Intel 8086 and 8088 processors.
The 8086 is a 16-bit microprocessor chip designed by Intel between early 1976 and June 8, 1978, when it was released. The Intel 8088, released July 1, 1979, is a slightly modified chip with an external 8-bit data bus, and is notable as the processor used in the original IBM PC design.
The Intel 386, originally released as 80386 and later renamed i386, is a 32-bit microprocessor designed by Intel. The first pre-production samples of the 386 were released to select developers in 1985, while mass production commenced in 1986. The processor was a significant evolution in the x86 architecture, extending a long line of processors that stretched back to the Intel 8008. The 386 was the central processing unit (CPU) of many workstations and high-end personal computers of the time. The 386 began to fall out of public use starting with the release of the i486 processor in 1989, while in embedded systems the 386 remained in widespread use until Intel finally discontinued it in 2007.
The Intel 486, officially named i486 and also known as 80486, is a microprocessor. It is a higher-performance follow-up to the Intel 386. The i486 was introduced in 1989. It represents the fourth generation of binary compatible CPUs following the 8086 of 1978, the Intel 80286 of 1982, and 1985's i386.
The Intel 80186, also known as the iAPX 186, or just 186, is a microprocessor and microcontroller introduced in 1982. It was based on the Intel 8086 and, like it, had a 16-bit external data bus multiplexed with a 20-bit address bus.
A microprocessor is a computer processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, and control circuitry required to perform the functions of a computer's central processing unit (CPU). The IC is capable of interpreting and executing program instructions and performing arithmetic operations. The microprocessor is a multipurpose, clock-driven, register-based, digital integrated circuit that accepts binary data as input, processes it according to instructions stored in its memory, and provides results as output. Microprocessors contain both combinational logic and sequential digital logic, and operate on numbers and symbols represented in the binary number system.
x86 is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel based on the Intel 8086 microprocessor and its 8088 variant. The 8086 was introduced in 1978 as a fully 16-bit extension of Intel's 8-bit 8080 microprocessor, with memory segmentation as a solution for addressing more memory than can be covered by a plain 16-bit address. The term "x86" came into being because the names of several successors to Intel's 8086 processor end in "86", including the 80186, 80286, 80386 and 80486 processors. Colloquially, their names were "186", "286", "386" and "486".
A floating-point unit is a part of a computer system specially designed to carry out operations on floating-point numbers. Typical operations are addition, subtraction, multiplication, division, and square root. Some FPUs can also perform various transcendental functions such as exponential or trigonometric calculations, but the accuracy can be low, so some systems prefer to compute these functions in software.
MMX is a single instruction, multiple data (SIMD) instruction set architecture designed by Intel, introduced on January 8, 1997 with its Pentium P5 (microarchitecture) based line of microprocessors, named "Pentium with MMX Technology". It developed out of a similar unit introduced on the Intel i860, and earlier the Intel i750 video pixel processor. MMX is a processor supplementary capability that is supported on IA-32 processors by Intel and other vendors as of 1997. AMD also added MMX instruction set in its K6 processor.
Cyrix Corporation was a microprocessor developer that was founded in 1988 in Richardson, Texas, as a specialist supplier of floating point units for 286 and 386 microprocessors. The company was founded by Tom Brightman and Jerry Rogers.
A coprocessor is a computer processor used to supplement the functions of the primary processor. Operations performed by the coprocessor may be floating-point arithmetic, graphics, signal processing, string processing, cryptography or I/O interfacing with peripheral devices. By offloading processor-intensive tasks from the main processor, coprocessors can accelerate system performance. Coprocessors allow a line of computers to be customized, so that customers who do not need the extra performance do not need to pay for it.
The Am386 CPU is a 100%-compatible clone of the Intel 80386 design released by AMD in March 1991. It sold millions of units, positioning AMD as a legitimate competitor to Intel, rather than being merely a second source for x86 CPUs.
The x86 instruction set refers to the set of instructions that x86-compatible microprocessors support. The instructions are usually part of an executable program, often stored as a computer file and executed on the processor.
The Intel 8087, announced in 1980, was the first floating-point coprocessor for the 8086 line of microprocessors. The purpose of the chip was to speed up floating-point arithmetic operations, such as addition, subtraction, multiplication, division, and square root. It also computes transcendental functions such as exponential, logarithmic or trigonometric calculations. The performance enhancements were from approximately 20% to over 500%, depending on the specific application. The 8087 could perform about 50,000 FLOPS using around 2.4 watts.
The Motorola 68881 and Motorola 68882 are floating-point units (FPUs) used in some computer systems in conjunction with Motorola's 32-bit 68020 or 68030 microprocessors. These coprocessors are external chips, designed before floating point math became standard on CPUs. The Motorola 68881 was introduced in 1984. The 68882 is a higher performance version produced later.
x87 is a floating-point-related subset of the x86 architecture instruction set. It originated as an extension of the 8086 instruction set in the form of optional floating-point coprocessors that work in tandem with corresponding x86 CPUs. These microchips have names ending in "87". This is also known as the NPX. Like other extensions to the basic instruction set, x87 instructions are not strictly needed to construct working programs, but provide hardware and microcode implementations of common numerical tasks, allowing these tasks to be performed much faster than corresponding machine code routines can. The x87 instruction set includes instructions for basic floating-point operations such as addition, subtraction and comparison, but also for more complex numerical operations, such as the computation of the tangent function and its inverse, for example.
The Intel 80387SX is the math coprocessor, also called an FPU, for the Intel 80386SX microprocessor. Introduced in 1987, it was used to perform floating-point arithmetic operations directly in hardware. The coprocessor was designed only to work with the 386SX, rather than the standard 386DX. This was because the original 80387 could not communicate with the altered 16 bit data bus of the 386SX, which was modified from the original 386DX's 32 bit data bus. The 387SX uses a 68-pin PLCC socket, just like some variants of the 80286 and the less common 80186 CPU, and was made in speeds ranging from 16 MHz to 33 MHz, matching the clock speed range of the Intel manufactured 386SX. Some chips like the IIT 3C87SX could get up to 40 MHz, matching the clock speeds of the fastest 386SX CPUs.
Extended precision refers to floating-point number formats that provide greater precision than the basic floating-point formats. Extended precision formats support a basic format by minimizing roundoff and overflow errors in intermediate values of expressions on the base format. In contrast to extended precision, arbitrary-precision arithmetic refers to implementations of much larger numeric types using special software.
The AMD Bulldozer Family 15h is a microprocessor microarchitecture for the FX and Opteron line of processors, developed by AMD for the desktop and server markets. Bulldozer is the codename for this family of microarchitectures. It was released on October 12, 2011, as the successor to the K10 microarchitecture.