P5 (microarchitecture)

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P5
Intel Pentium MMX Processor Logo.svg
General information
LaunchedMarch 22, 1993
DiscontinuedFebruary 15, 2000 [1] [ better source needed ]
Performance
Max. CPU clock rate 60–300 MHz
FSB speeds50–66 MHz
Cache
L1 cache 16–32 KiB
Architecture and classification
ArchitectureP5 (IA-32)
Instructions MMX
Physical specifications
Socket(s)
Products, models, variants
Model(s)
  • Pentium series
  • Pentium OverDrive series
  • Pentium MMX series
History
Predecessor Intel 80486
Successor P6, Pentium II

The original Pentium microprocessor was introduced by Intel on March 22, 1993. [2] [3] It was instruction set compatible with the 80486 but was a new and very different microarchitecture design. The P5 Pentium was the first superscalar x86 microarchitecture and the world’s first superscalar microprocessor to be in mass production. It included dual integer pipelines, a faster floating-point unit, wider data bus, separate code and data caches as well as many other techniques and features to enhance performance and support security, encryption, and multiprocessing for workstations and servers.

Contents

Considered the fifth main generation in the 8086 compatible line of processors, its implementation and microarchitecture was called P5. As with all new processors from Intel since the Pentium, some new instructions were added to enhance performance for specific types of workloads.

The Pentium was the first Intel x86 to build in robust hardware support for multiprocessing similar to that of large IBM mainframe computers. Intel worked closely with IBM to define this capability and then Intel designed it into the P5 microarchitecture. This new capability was not present in prior x86 generations or x86 copies from competitors.

In order to realize its greatest potential, compilers had to be optimized to take advantage of the instruction level parallelism provided by the new superscalar dual pipelines and applications needed to be recompiled. Intel spent substantial effort and resources working with development tool vendors, and major ISV and OS companies to optimize their products for Pentium prior to product launch.

In October 1996, the similar Pentium MMX [4] was introduced, complementing the same basic microarchitecture with the MMX instruction set, larger caches, and some other enhancements.

Intel Pentium A80501 66 MHz SX950 Die Image Intel Pentium A80501 66 SX950.JPG
Intel Pentium A80501 66 MHz SX950 Die Image

Competitors included Motorola 68040, Motorola 68060, PowerPC 601, SPARC, MIPS, Alpha families, most of which also used a superscalar in-order dual instruction pipeline configuration at some time.

Intel discontinued the P5 Pentium processors (sold as a cheaper product since the Pentium II of 1997) in early 2000 in favor of the Celeron processor, which had also replaced the 80486 brand. [1]

Development

The P5 microarchitecture was designed by the same Santa Clara team which designed the 386 and 486. [5] Design work started in 1989; [6] the team decided to use a superscalar architecture, with on-chip cache, floating-point, and branch prediction. The preliminary design was first successfully simulated in 1990, followed by the laying-out of the design. By this time, the team had several dozen engineers. The design was taped out, or transferred to silicon, in April 1992, at which point beta-testing began. [7] By mid-1992, the P5 team had 200 engineers. [8] Intel at first planned to demonstrate the P5 in June 1992 at the trade show PC Expo, and to formally announce the processor in September 1992, [9] but design problems forced the demo to be cancelled, and the official introduction of the chip was delayed until the spring of 1993. [10] [11]

John H. Crawford, chief architect of the original 386, co-managed the design of the P5, [12] along with Donald Alpert, who managed the architectural team. Dror Avnon managed the design of the FPU. [13] Vinod K. Dham was general manager of the P5 group. [14]

Intel's Larrabee multicore architecture project uses a processor core derived from a P5 core (P54C), augmented by multithreading, 64-bit instructions, and a 16-wide vector processing unit. [15] Intel's low-powered Bonnell microarchitecture employed in early Atom processor cores also uses an in-order dual pipeline similar to P5. [16]

Major improvements over the 80486 microarchitecture

The P5 microarchitecture brings several important advancements over the preceding i486 architecture.

The Pentium was designed to execute over 100 million instructions per second (MIPS), [17] and the 75 MHz model was able to reach 126.5 MIPS in certain benchmarks. [18] The Pentium architecture typically offered just under twice the performance of a 486 processor per clock cycle in common benchmarks. The fastest 80486 parts (with slightly improved microarchitecture and 100 MHz operation) were almost as powerful as the first-generation Pentiums, and the AMD Am5x86 was roughly equal to the Pentium 75 regarding pure ALU performance.

Errata

The early versions of 60–100 MHz P5 Pentiums had a problem in the floating-point unit that resulted in incorrect (but predictable) results from some division operations. This flaw, discovered in 1994 by professor Thomas Nicely at Lynchburg College, Virginia, became widely known as the Pentium FDIV bug and caused embarrassment for Intel, which created an exchange program to replace the faulty processors.

In 1997, another erratum was discovered that could allow a malicious program to crash a system without any special privileges, the "F00F bug". All P5 series processors were affected and no fixed steppings were ever released, however contemporary operating systems were patched with workarounds to prevent crashes.

Cores and steppings

The Pentium was Intel's primary microprocessor for personal computers during the mid-1990s. The original design was reimplemented in newer processes and new features were added to maintain its competitiveness as well as to address specific markets such as portable computers. As a result, there were several variants of the P5 microarchitecture.

P5

Intel Pentium microarchitecture Intel Pentium arch.svg
Intel Pentium microarchitecture

The first Pentium microprocessor core was code-named "P5". Its product code was 80501 (80500 for the earliest steppings Q0399). There were two versions, specified to operate at 60 MHz and 66 MHz respectively, using Socket 4. This first implementation of the Pentium used a traditional 5-volt power supply (descended from the usual TTL logic compatibility requirements). It contained 3.1 million transistors and measured 16.7 mm by 17.6 mm for an area of 293.92 mm2. [19] It was fabricated in a 0.8 μm BiCMOS process. [20] The 5-volt design resulted in relatively high energy consumption for its operating frequency when compared to the directly following models.

P54C

Intel Pentium P54C die shot Intel Pentium P54C die.jpg
Intel Pentium P54C die shot

The P5 was followed by the P54C (80502) in 1994, with versions specified to operate at 75, 90, or 100 MHz using a 3.3 volt power supply. Marking the switch to Socket 5, this was the first Pentium processor to operate at 3.3 volts, reducing energy consumption, but necessitating voltage regulation on mainboards. As with higher-clocked 486 processors, an internal clock multiplier was employed from here on to let the internal circuitry work at a higher frequency than the external address and data buses, as it is more complicated and cumbersome to increase the external frequency, due to physical constraints. It also allowed two-way multiprocessing and had an integrated local APIC as well as new power management features. It contained 3.3 million transistors and measured 163 mm2. [21] It was fabricated in a BiCMOS process which has been described as both 0.5 μm and 0.6 μm due to differing definitions. [21]

P54CQS

The P54C was followed by the P54CQS in early 1995, which operated at 120 MHz. It was fabricated in a 0.35 μm BiCMOS process and was the first commercial microprocessor to be fabricated in a 0.35 μm process. [21] Its transistor count is identical to the P54C and, despite the newer process, it had an identical die area as well. The chip was connected to the package using wire bonding, which only allows connections along the edges of the chip. A smaller chip would have required a redesign of the package, as there is a limit on the length of the wires and the edges of the chip would be further away from the pads on the package. The solution was to keep the chip the same size, retain the existing pad-ring, and only reduce the size of the Pentium's logic circuitry to enable it to achieve higher clock frequencies. [21]

P54CS

The P54CQS was quickly followed by the P54CS, which operated at 133, 150, 166 and 200 MHz, and introduced Socket 7. It contained 3.3 million transistors, measured 90 mm2 and was fabricated in a 0.35 μm BiCMOS process with four levels of interconnect.

P24T

The P24T Pentium OverDrive for 486 systems were released in 1995, which were based on 3.3 V 0.6 μm versions using a 63 or 83 MHz clock. Since these used Socket 2/3, some modifications had to be made to compensate for the 32-bit data bus and slower on-board L2 cache of 486 motherboards. They were therefore equipped with a 32  KB L1 cache (double that of pre-P55C Pentium CPUs).

P55C

Pentium logo, with MMX enhancement (1993-1999) Intel Pentium MMX Processor Logo.svg
Pentium logo, with MMX enhancement (1993–1999)
Intel Pentium MMX microarchitecture Intel Pentium MMX arch.svg
Intel Pentium MMX microarchitecture
Pentium MMX 166 MHz without cover P-MMX.JPG
Pentium MMX 166 MHz without cover

The P55C (or 80503) was developed by Intel's Research & Development Center in Haifa, Israel. It was sold as Pentium with MMX Technology (usually just called Pentium MMX); although it was based on the P5 core, it featured a new set of 57 "MMX" instructions intended to improve performance on multimedia tasks, such as encoding and decoding digital media data. The Pentium MMX line was introduced on October 22, 1996, and released in January 1997. [22]

The new instructions worked on new data types: 64-bit packed vectors of either eight 8-bit integers, four 16-bit integers, two 32-bit integers, or one 64-bit integer. So, for example, the PADDUSB (Packed ADD Unsigned Saturated Byte) instruction adds two vectors, each containing eight 8-bit unsigned integers together, elementwise; each addition that would overflow saturates, yielding 255, the maximal unsigned value that can be represented in a byte. These rather specialized instructions generally require special coding by the programmer for them to be used.[ citation needed ]

Other changes to the core include a 6-stage pipeline (vs. 5 on P5) with a return stack (first done on Cyrix 6x86) and better parallelism, an improved instruction decoder, 16KB L1 data cache + 16KB L1 instruction cache with Both 4-way associativity (vs. 8KB L1 Data/instruction with 2-way on P5), 4 write buffers that could now be used by either pipeline (vs. one corresponding to each pipeline on P5) and an improved branch predictor taken from the Pentium Pro, [23] [24] with a 512-entry buffer (vs. 256 on P5). [25]

It contained 4.5 million transistors and had an area of 140 mm2. It was fabricated in a 0.28 μm CMOS process with the same metal pitches as the previous 0.35 μm BiCMOS process, so Intel described it as "0.35 μm" because of its similar transistor density. [26] The process has four levels of interconnect. [26]

While the P55C remained compatible with Socket 7, the voltage requirements for powering the chip differ from the standard Socket 7 specifications. Most motherboards manufactured for Socket 7 prior to the establishment of the P55C standard are not compliant with the dual voltage rail required for proper operation of this CPU (2.9 volt core voltage, 3.3 volt I/O voltage). Intel addressed the issue with OverDrive upgrade kits that featured an interposer with its own voltage regulation.

Tillamook

Pentium MMX notebook CPUs used a "mobile module" that held the CPU. This module was a PCB with the CPU directly attached to it in a smaller form factor. The module snapped to the notebook motherboard, and typically a heat spreader was installed and made contact with the module. However, with the 0.25 μm Tillamook Mobile Pentium MMX (named after a city in Oregon), the module also held the 430TX chipset along with the system's 512 KB SRAM cache memory.

Models and variants

Pentium and Pentium with MMX Technology
KL Intel Pentium P5.jpg
Pentium 60 SX948 gold front.jpg
KL Intel Pentium 75.jpg Pentium Front.jpg Pentium tt80502-75 sk089 observe.png Intel Pentium 133.jpg KL Intel Pentium P54C 200.jpg Ic-photo-Intel--TT80502133--(PP133)--(Mobile-Pentium-CPU).JPG KL Intel Pentium MMX.jpg Intel Pentium MMX 166 PGA Front.jpg Ic-photo-Intel--TT80503166--(Pentium-MMX-Mobile-CPU).JPG
KL Intel Pentium Mobile.jpg
Code nameP5P54CP54C/P54CQSP54CSP55CTillamook
Product code805018050280503
Process size (μm)0.800.60 or 0.35*0.350.35 (later 0.28)0.25
Die area (mm2)293.92 (16.7 x 17.6 mm)148 @ 0,6 μm / 91 (later 83) @ 0,35 μm91 (later 83)141 @ 0,35 μm / 128 @ 0,28 μm94.47 (9.06272 x 10.42416 mm)
Number of transistors (millions)3.103.203.304.50
SocketSocket 4Socket 5/7Socket 7
Package CPGA/CPGA+IHSCPGA/CPGA+IHS/TCP*CPGA/TCP*CPGA/TCP*CPGA/PPGA PPGATCP*CPGA/PPGA/TCP*PPGA/TCP*TCP/TCP on MMC-1
Clock speed (MHz)60667590100120133150166200120*133*150*166200233166200233266300
Bus speed (MHz)6066506050666066606660666066
Core Voltage5.05.153.3 2,9*3.3 2.9*3.3 3.1* 2.9*3.3 3.1* 2.9*3.3 3.1* 2.9*3.3 3.1* 2.9*3.33.32.2*2.45*2.45*2.8 2.45*2.82.81.9 1.8*1.8*1.8*1.9 2.0*2.0*
I/O Voltage5.05.153.33.33.33.33.33.33.33.33.33.33.33.33.33.32.52.52.52.52.5
TDP (max. W)14.6 (15.3)16.0 (17.3)8.0 (9.5) 6.0* (7.3*)9.0 (10.6) 7.3* (8.8*)10.1 (11.7) 8.0 at 0.6μ* (9.8 at 0.6μ*) 5.9 at 0.35μ* (7.6 at 0.35μ*)12.8 (13.4) 7.1* (8.8*)11.2 (12.2) 7.9* (9.8*)11.6 (13.9) 10.0* (12.0*)14.5 (15.3)15.5 (16.6)4.2*7.8* (11.8*)8.6* (12.7*)13.1 (15.7) 9.0* (13.7*)15.7 (18.9)17.0 (21.5)4.5 (7.4) 4.1* (5.4*)5.0* (6.1*)5.5* (7.0*)7.6 (9.2) 7.6* (9.6*)8.0*
Introduced1993-03-221994-10-101994-03-071995-03-271995-06-121996-01-041996-06-101997-10-201997-05-191997-01-081997-06-021997-081998-011999-01
* An asterisk indicates that these were only available as Mobile Pentium or Mobile Pentium MMX chips for laptops.
Pentium OverDrive with MMX Technology
KL Intel Pentium MMX Overdrive A.jpg
Code nameP54CTB
Product codePODPMT60X150PODPMT66X166PODPMT60X180PODPMT66X200
Process size (μm)0.35
SocketSocket 5/7
Package CPGA with heatsink, fan and voltage regulator
Clock speed (MHz)125150166150180200
Bus speed (MHz)506066506066
Upgrade forPentium 75Pentium 90Pentium 100 and 133Pentium 75Pentium 90, 120 and 150Pentium 100, 133 and 166
TDP (max. W)15.615.615.618
Voltage3.33.33.33.3
Embedded versions of Pentium with MMX Technology
KL Intel Pentium MMX embedded Top.jpg
KL Intel Embedded Pentium MMX PGA Bottom.jpg
Code nameP55CTillamook
Product codeFV8050366200FV8050366233FV80503CSM66166GC80503CSM66166GC80503CS166EXTFV80503CSM66266GC80503CSM66266
Process size (μm)0.350.25
Clock speed (MHz)200233166166166266266
Bus speed (MHz)66666666666666
Package PPGA PPGAPPGA BGA BGAPPGABGA
TDP (max. W)15.7174.54.14.17.67.6
Voltage2.82.81.91.81.81.92.0

Competitors

After the introduction of the Pentium, competitors such as NexGen, [27] AMD, Cyrix, and Texas Instruments announced Pentium-compatible processors in 1994. [28] CIO magazine identified NexGen's Nx586 as the first Pentium-compatible CPU, [29] while PC Magazine described the Cyrix 6x86 as the first. These were followed by the AMD K5, which was delayed due to design difficulties. AMD later bought NexGen in order to help design the AMD K6, and Cyrix was purchased by National Semiconductor. [30] Later processors from AMD and Intel retain compatibility with the original Pentium.

See also

Competitors

Related Research Articles

Athlon Brand name for several AMD processors

Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by Advanced Micro Devices (AMD). The original Athlon was the first seventh-generation x86 processor and was the first desktop processor to reach speeds of one gigahertz (GHz). It made its debut as AMD's high-end processor brand on June 23, 1999. Over the years AMD has used the Athlon name with the 64-bit Athlon 64 architecture, the Athlon II, and Accelerated Processing Unit (APU) chips targeting the Socket AM1 desktop SoC architecture, and Socket AM4 Zen microarchitecture. The modern Zen-based Athlon with a Radeon Graphics processor was introduced in 2019 as AMD's highest-performance entry-level processor.

Cyrix 6x86 Microprocessor

The Cyrix 6x86 is a sixth-generation, 32-bit x86 microprocessor designed by Cyrix and manufactured by IBM and SGS-Thomson. It was originally released in 1996.

i386 32-bit microprocessor by Intel

The Intel 386, originally released as 80386 and later renamed into i386, is a 32-bit microprocessor introduced in 1985. The first versions had 275,000 transistors and were the CPU of many workstations and high-end personal computers of the time. As the original implementation of the 32-bit extension of the 80286 architecture, the i386 instruction set, programming model, and binary encodings are still the common denominator for all 32-bit x86 processors, which is termed the i386-architecture, x86, or IA-32, depending on context.

i486 Successor to the Intel 386

The Intel 486, officially named i486 and also known as 80486, is a higher-performance follow-up to the Intel 386 microprocessor. The i486 was introduced in 1989 and was the first tightly pipelined x86 design as well as the first x86 chip to use more than a million transistors, due to a large on-chip cache and an integrated floating-point unit. It represents a fourth generation of binary compatible CPUs since the original 8086 of 1978.

AMD K6 Computer microprocessor

The K6 microprocessor was launched by AMD in 1997. The main advantage of this particular microprocessor is that it was designed to fit into existing desktop designs for Pentium-branded CPUs. It was marketed as a product that could perform as well as its Intel Pentium II equivalent but at a significantly lower price. The K6 had a considerable impact on the PC market and presented Intel with serious competition.

Cyrix American microprocessor developer

Cyrix Corporation was a microprocessor developer that was founded in 1988 in Richardson, Texas, as a specialist supplier of math coprocessors for 286 and 386 microprocessors. The company was founded by Tom Brightman and Jerry Rogers. Cyrix founder, president, and CEO Jerry Rogers aggressively recruited engineers and pushed them, eventually assembling a design team of 30 people.

Pentium II Intel microprocessor

The Pentium II brand refers to Intel's sixth-generation microarchitecture ("P6") and x86-compatible microprocessors introduced on May 7, 1997. Containing 7.5 million transistors, the Pentium II featured an improved version of the first P6-generation core of the Pentium Pro, which contained 5.5 million transistors. However, its L2 cache subsystem was a downgrade when compared to the Pentium Pros.

Pentium III Line of desktop and mobile microprocessors produced by Intel

The Pentium III brand refers to Intel's 32-bit x86 desktop and mobile microprocessors based on the sixth-generation P6 microarchitecture introduced on February 26, 1999. The brand's initial processors were very similar to the earlier Pentium II-branded microprocessors. The most notable differences were the addition of the Streaming SIMD Extensions (SSE) instruction set, and the introduction of a controversial serial number embedded in the chip during manufacturing.

The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel and introduced on November 1, 1995. It introduced the P6 microarchitecture and was originally intended to replace the original Pentium in a full range of applications. While the Pentium and Pentium MMX had 3.1 and 4.5 million transistors, respectively, the Pentium Pro contained 5.5 million transistors. Later, it was reduced to a more narrow role as a server and high-end desktop processor and was used in supercomputers like ASCI Red, the first computer to reach the teraFLOPS performance mark. The Pentium Pro was capable of both dual- and quad-processor configurations. It only came in one form factor, the relatively large rectangular Socket 8. The Pentium Pro was succeeded by the Pentium II Xeon in 1998.

Cyrix 5x86

The Cyrix 5x86 was a x86 microprocessor designed by Cyrix. Released in August 1995, four months before the more famous Cyrix 6x86, the Cyrix 5x86 was one of the fastest CPUs ever produced for Socket 3 computer systems. With better performance in most applications than an Intel Pentium processor at 75 MHz, the Cyrix Cx5x86 filled a gap by providing a medium-performance processor option for 486 Socket 3 motherboards.

Am5x86

The Am5x86 processor is an x86-compatible CPU introduced in 1995 by AMD for use in 486-class computer systems. It is one of the fastest, and most universally compatible upgrade paths for 486 systems.

The Pentium OverDrive was a microprocessor marketing brand name used by Intel, to cover a variety of consumer upgrade products sold in the mid-1990s. It was originally released for 486 motherboards, and later some Pentium sockets. Intel dropped the brand, as it failed to appeal to corporate buyers, and discouraged new system sales.

AMD K6-III

The K6-III was an x86 microprocessor line manufactured by AMD that launched on February 22, 1999. The launch consisted of both 400 and 450 MHz models and was based on the preceding K6-2 architecture. Its improved 256 KB on-chip L2 cache gave it significant improvements in system performance over its predecessor the K6-2. The K6-III was the last processor officially released for desktop Socket 7 systems, however later mobile K6-III+ and K6-2+ processors could be run unofficially in certain socket 7 motherboards if an updated BIOS was made available for a given board.

Am486

The Am486 is a 80486-class family of computer processors that was produced by AMD in the 1990s. Intel beat AMD to market by nearly four years, but AMD priced its 40 MHz 486 at or below Intel's price for a 33 MHz chip, offering about 20% better performance for the same price.

WinChip

The WinChip series was a low-power Socket 7-based x86 processor designed by Centaur Technology and marketed by its parent company IDT.

mP6

The Rise mP6 was a superpipelined and superscalar microprocessor designed by Rise Technology to compete with the Intel Pentium line.

x87 is a floating-point-related subset of the x86 architecture instruction set. It originated as an extension of the 8086 instruction set in the form of optional floating-point coprocessors that worked in tandem with corresponding x86 CPUs. These microchips had names ending in "87". This was also known as the NPX. Like other extensions to the basic instruction set, x87 instructions are not strictly needed to construct working programs, but provide hardware and microcode implementations of common numerical tasks, allowing these tasks to be performed much faster than corresponding machine code routines can. The x87 instruction set includes instructions for basic floating-point operations such as addition, subtraction and comparison, but also for more complex numerical operations, such as the computation of the tangent function and its inverse, for example.

Pentium Brand of microprocessors produced by Intel

Pentium is a brand used for a series of x86 architecture-compatible microprocessors produced by Intel since 1993. In their form as of November 2011, Pentium processors are considered entry-level products that Intel rates as "two stars", meaning that they are above the low-end Atom and Celeron series, but below the faster Intel Core lineup, and workstation Xeon series.

UMC Green CPU

The UMC Green CPU was an x86-compatible microprocessor produced by UMC, a Taiwanese semiconductor company, in the early- to mid-1990s. It was offered as an alternative to the Intel 80486 with which it was pin compatible, enabling it to be installed in most 80486 motherboards. All models had power management features intended to reduce electricity consumption.

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Intel datasheets

Intel manuals

These Manuals do provide an overview of the Pentium Processor and its features: