CAST-32A

Last updated

Multi-core Processors
AbbreviationCAST-32A
Year started2014
Latest versionA
November 2016 (2016-11)
Organization FAA
DomainAviation
Website faa.gov

CAST-32A, Multi-core Processors is a position paper, [1] by the Certification Authorities Software Team (CAST). It is not official guidance, but is considered informational by certification authorities such as the FAA and EASA. A key point is that Multi-core processor "interference can affect execution timing behavior, including worst case execution time (WCET)." [2]

The original document was published in 2014 by an "international group of certification and regulatory authority representatives." [3] The current revision A was released in 2016. "The Federal Aviation Administration (FAA) and European Aviation Safety Agency (EASA) worked with industry to quantify a set of requirements and guidance that should be met to certify and use multi-core processors in civil aviation, described e.g. in the FAA CAST-32A Position Paper and the EASA Use of MULticore proCessORs in airborne Systems (MULCORS) research report." [4] For applicants certifying under EASA, AMC 20-193 has now superseded CAST-32A since its release on 21 January 2022. FAA released its Advisory Circular AC 20-193 guidance in January 2024, which is almost identical to AMC 20-193. [5]

The first mixed-criticality multicore real-time operating system avionics systems was certified in 2021. [6] The objectives of the standard are applicable to software on multicore processors, including the operating system. [7] [8] However, the nature of the underlying processor hardware must be examined in detail to identify potential interference channels due to inter-core contention for shared resources. [9] Verification that multicore interference channels have been mitigated can be accomplished through the use of interference generators i.e. software tuned to create a heavy usage pattern on a shared resource. [10]


Objectives

The paper presents ten objectives that must be met for Design Assurance Level (DAL) A or B. Six of the objectives apply for DAL C. The paper does not apply for DAL D or E. [1]

ObjectiveApplicable Design Assurance Levels
MCP Planning 1A, B, C
MCP Resource Usage 1A, B, C
MCP Resource Usage 2A, B
MCP Planning 2A, B, C
MCP Resource Usage 3A, B
MCP Resource Usage 4A, B
MCP Software 1A, B, C
MCP Software 2A, B, C
MCP Error Handling 1A, B
MCP Accomplishment Summary 1A, B, C

References

  1. 1 2 "Multi-core Processors" (PDF). CAST-32A. Federal Aviation Administration. 1 November 2016. Retrieved 23 March 2020.
  2. VanderLeest, Steven H.; Evripidou, Christos (10 March 2020). "An Approach to Verification of Interference Concerns for Multicore Systems (CAST-32A)". SAE Technical Paper Series. Vol. 1. SAE International. pp. 1174–1181. doi:10.4271/2020-01-0016. S2CID   213352079 . Retrieved 11 March 2020.{{cite book}}: |journal= ignored (help)
  3. Kühlert, Oliver (11 February 2020). "Multi-Core Ready to Become Airborne". Embedded Computing Design.
  4. Athavale, Jyotika; Mariani, Riccardo; Paulitsch, Michael (19 March 2019). "Flight Safety Certification Implications for Complex Multi-Core Processor Based Avionics Systems". 2019 IEEE International Reliability Physics Symposium (IRPS). IEEE. pp. 1–6. doi:10.1109/IRPS.2019.8720422. ISBN   978-1-5386-9504-3. S2CID   169037813.
  5. "Discover AC 20-193 and AMC 20-193". Rapita Systems. Retrieved 20 May 2025.
  6. "World's First Multicore Avionics Certification to CAST-32A Uses the INTEGRITY-178 tuMP Multicore RTOS". Aerospace Tech Review. 18 March 2021. Retrieved 20 May 2025.
  7. "DDC-I and Rapita Systems Simplify Verification and Certification of Multicore Avionics Applications". 21 April 2020. Retrieved 23 March 2020.
  8. Brown, Mark (15 November 2018). "CAST=32A: Significance and Implications" . Retrieved 11 December 2020.
  9. Agirre, Irune; Abella, Jaume; Azkarate-askasua, Mikel; Cazorla, Francisco (14 June 2017). "On the Tailoring of CAST-32A CertificationGuidance to Real COTS Multicore Architectures". IEEE. Retrieved 23 March 2020.
  10. VanderLeest, Steven H.; Evripidou, Christos (10 March 2020). "An Approach to Verification of Interference Concerns for Multicore Systems" . SAE International Journal of Advances and Current Practices in Mobility. 2 (3). SAE: 1174–1181. doi:10.4271/2020-01-0016. S2CID   213352079 . Retrieved 23 March 2020.