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HyperDrive (HD) is a series of RAM-based solid-state drives invented by Accelerated Logic B.V. (became Accelerated Logic ltd. and is now a German company) [1] employee Pascal Bancsi (for HyperDrive II architecture), [2] who partnered with the British company HyperOs Systems, who manufactured the retail product. The HyperDrive interfaces with and is recognized by computer systems as a standard hard drive.
Originally called 'Accelerator', development began in 1999. It is an IDE device supporting PIO mode 1 transfer, and includes 128 MiB SRAM. [3]
After the SRAM Accelerator, it was switched to SDRAM, and used a 5.25-inch form factor, which allowed the company to build an accelerator with a capacity of 128 MiB to 4 GiB. It had a maximum random access time of 0.15 ms. SDRAM was chosen over flash because of its speed advantage and reliability over flash memory. [4]
Later generations used a 3.5-inch form factor and supported UDMA 33 transfer speed, with a maximum capacity of 14 GiB.[ citation needed ]It used an Atmel controller.[ citation needed ] and included a battery backup mechanism.[ citation needed ] Future plans included support of UDMA66, a Fibre Channel interface.[ citation needed ]
The Hyperdrive III uses Parallel ATA (PATA) (max 100 MB/s) or Serial ATA (SATA) interface. For the first time, memory capacity could be changed by using memory slots. It uses ECC DDR SDRAM (max 2 GiB per DIMM). Maximum capacity started at 6 DIMM (12 GiB), and was later changed to 8 DIMM (16 GiB).
Non-volatile storage is achieved using an integral 160 minute 7.2 V battery backup battery (1250 mAh), external adapter, or HyperOs software.
It uses the Xilinx Spartan FPGA and Atmel controller array.
The circuit board was produced by DCE.
It supports both SATA and PATA interfaces (PATA native), with interface speed up to 133 MB/s. It uses ECC DDR SDRAM (max 2 GiB per DIMM).
Maximum capacity is 8 DIMM (16 GiB, PC1600-PC3200). Memory of different sizes can be mixed, but only if DIMMs of same capacity are used in 1 bank (4 DIMM/bank).
It supports non-volatile memory backup using optional 2.5-inch PATA drive, HyperOs software (which swaps RAM contents to a different drive) or backup battery (5 Ah or 10 Ah).
The drive is rated 125 MB/s data rate, 44k I/O per second.
It supports registered ECC SDRAM, with capacity up to 2 GiB per DIMM on 16 GiB version and 4 GiB per DIMM on 32 GiB version. Seek time was reduced from 40 microseconds to 1100 nanoseconds read and 250 nanoseconds write. It also reduces the power consumption by 30% and employs gold plated DIMM sockets.
It is a rack-mounted version of the device with at most four drives.
It is an external case version with four HyperDrive4 drives. It uses PCI-X or PCI Express x8 interface, with Silicon Image 3124 or Areca 12XX SAT RAID card to connect each drive. [5]
It uses SATA interface with 2x SATA2 interface ports. It uses DDR2 SDRAM (max 8 GiB per DIMM). The manufacturer claimed it had built-in ECC so it no longer required ECC memory, but ECC is performed at the expense of storage capacity if ECC memory is not used. [6] Memory speed is not rated; the manufacturer recommends Kingston ValueRAM (PC2-3200 to PC2-6400).
HyperDrive 5 includes 7.4 V 2400 mAh lithium battery for flash backup, CompactFlash card slot, with external DC adapter for non-volatile storage.
The drive is rated 175 MB/s read, 145 MB/s write, 40k [ clarification needed ] (later 65k) I/O per second, when using only one of the SATA2 links. The rated speed using the dual SATA2 links is not given by the manufacturer. When using both SATA2 links, the physical drive can be configured as a RAID 0 array with two devices with half of maximum capacity. In RAID 0 mode, the read and write speeds are reported to be more than twice those that are claimed by the manufacturer. [7]
Drive controller is switched to Taiwanese ASIC, instead of the Xilinx Spartan FPGA/Atmel array.
HyperDrive 5 is also sold as ACard ANS-9010, [8] outside of the UK.
A cheaper version of the Hyperdrive5, with only one SATA2 port and 6 DDR2 slots, so that memory is limited to 48 GiB. Performance and features are the same as the HyperDrive5 when using only one SATA2 link.
HyperDrive 5M is sold as ACard ANS-9010B, outside of the UK.
HyperDrive4 (16 GiB) won Custom PCs Crazy But Cool award. [9]
Double Data Rate Synchronous Dynamic Random-Access Memory is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) class of memory integrated circuits used in computers. DDR SDRAM, also retroactively called DDR1 SDRAM, has been superseded by DDR2 SDRAM, DDR3 SDRAM, DDR4 SDRAM and DDR5 SDRAM. None of its successors are forward or backward compatible with DDR1 SDRAM, meaning DDR2, DDR3, DDR4 and DDR5 memory modules will not work on DDR1-equipped motherboards, and vice versa.
A RAM drive is a block of random-access memory that a computer's software is treating as if the memory were a disk drive. RAM drives provide high-performance temporary storage for demanding tasks and protect non-volatile storage devices from wearing down, since RAM is not prone to wear from writing, unlike non-volatile flash memory. They are in a sense the reverse of virtual memory: RAM drive uses a volatile fast memory as if it's a nonvolatile slow memory. Virtual memory is the opposite.
Dynamic random-access memory is a type of random-access semiconductor memory that stores each bit of data in a memory cell, usually consisting of a tiny capacitor and a transistor, both typically based on metal–oxide–semiconductor (MOS) technology. While most DRAM memory cell designs use a capacitor and transistor, some only use two transistors. In the designs where a capacitor is used, the capacitor can either be charged or discharged; these two states are taken to represent the two values of a bit, conventionally called 0 and 1. The electric charge on the capacitors gradually leaks away; without intervention the data on the capacitor would soon be lost. To prevent this, DRAM requires an external memory refresh circuit which periodically rewrites the data in the capacitors, restoring them to their original charge. This refresh process is the defining characteristic of dynamic random-access memory, in contrast to static random-access memory (SRAM) which does not require data to be refreshed. Unlike flash memory, DRAM is volatile memory, since it loses its data quickly when power is removed. However, DRAM does exhibit limited data remanence.
Synchronous dynamic random-access memory is any DRAM where the operation of its external pin interface is coordinated by an externally supplied clock signal.
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Double Data Rate 2 Synchronous Dynamic Random-Access Memory is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) interface. It is a JEDEC standard (JESD79-2); first published in September 2003. DDR2 succeeded the original DDR SDRAM specification, and was itself succeeded by DDR3 SDRAM in 2007. DDR2 DIMMs are neither forward compatible with DDR3 nor backward compatible with DDR.
CompactFlash (CF) is a flash memory mass storage device used mainly in portable electronic devices. The format was specified and the devices were first manufactured by SanDisk in 1994.
In computing, double data rate (DDR) describes a computer bus that transfers data on both the rising and falling edges of the clock signal. This is also known as double pumped, dual-pumped, and double transition. The term toggle mode is used in the context of NAND flash memory.
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Double Data Rate 3 Synchronous Dynamic Random-Access Memory is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth interface, and has been in use since 2007. It is the higher-speed successor to DDR and DDR2 and predecessor to DDR4 synchronous dynamic random-access memory (SDRAM) chips. DDR3 SDRAM is neither forward nor backward compatible with any earlier type of random-access memory (RAM) because of different signaling voltages, timings, and other factors.
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The Open NAND Flash Interface Working Group is a consortium of technology companies working to develop open standards for NAND flash memory and devices that communicate with them. The formation of ONFI was announced at the Intel Developer Forum in March 2006.
Double Data Rate 4 Synchronous Dynamic Random-Access Memory is a type of synchronous dynamic random-access memory with a high bandwidth interface.
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