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A backplane is a group of electrical connectors in parallel with each other, so that each pin of each connector is linked to the same relative pin of all the other connectors, forming a computer bus. It is used as a backbone to connect several printed circuit boards together to make up a complete computer system. Backplanes commonly use a printed circuit board, but wire-wrapped backplanes have also been used in minicomputers and high-reliability applications.
Advanced Telecommunications Computing Architecture is the largest specification effort in the history of the PCI Industrial Computer Manufacturers Group (PICMG), with more than 100 companies participating. Known as AdvancedTCA, the official specification designation PICMG 3.x was ratified by the PICMG organization in December 2002. AdvancedTCA is targeted primarily to requirements for "carrier grade" communications equipment, but has recently expanded its reach into more ruggedized applications geared toward the military/aerospace industries as well. This series of specifications incorporates the latest trends in high speed interconnect technologies, next-generation processors, and improved Reliability, Availability and Serviceability (RAS).
Advanced Mezzanine Cards are printed circuit boards (PCBs) that follow a specification of the PCI Industrial Computers Manufacturers Group (PICMG), with more than 100 companies participating.
COM Express, a computer-on-module (COM) form factor, is a highly integrated and compact PC that can be used in a design application much like an integrated circuit component. Each COM Express Module COM integrates core CPU and memory functionality, the common I/O of a PC/AT, USB, audio, graphics (PEG), and Ethernet. All I/O signals are mapped to two high density, low profile connectors on the bottom side of the module. COM Express employs a mezzanine-based approach. The COM modules plug into a baseboard that is typically customized to the application. Over time, the COM Express mezzanine modules can be upgraded to newer, backwards-compatible versions. COM Express is commonly used in Industrial, Military/Aerospace, Gaming, Medical, Transportation, IoT, and General Computing embedded applications.
CompactPCI Serial is an industrial standard for modular computer systems. It is based on the established PICMG 2.0 CompactPCI standard, which uses the parallel PCI bus for communication among a system's card components. In contrast to this, CompactPCI Serial uses only serial point-to-point connections. CompactPCI Serial was officially adopted by the PCI Industrial Computer Manufacturers Group PICMG as PICMG CPCI-S.0 CompactPCI Serial in March 2011. Its mechanical concept is based on the proven standards of IEEE 1101-1-1998 and IEEE 1101-10-1996. CompactPCI Serial includes different connectors that permit very high data rates. The new technology standard succeeding parallel CompactPCI comprises another specification called PICMG 2.30 CompactPCI PlusIO. This is why CompactPCI Serial and CompactPCI PlusIO as a whole were also called CompactPCI Plus. PICMG's first working title of CompactPCI Serial was CPLUS.0. CompactPCI Serial backplanes and chassis are developed by Schroff, Elmа, and Pixus Technologies companies, as for the CompactPCI Serial board level electronics – they are developed by MEN Mikro Elektronik, Fastwel, EKF, Emerson Embedded Computing, ADLINK, and Kontron.
PICMG 1.0 is a PICMG specification that defines a CPU form factor and corresponding backplane connectors for PCI-ISA passive backplanes. This standard moves components typically located on the motherboard to a single plug-in card. PICMG 1.0 CPU Cards look much like standard ISA cards with extra gold finger connections for the ISA bus and the root PCI bus. The "motherboard" is replaced with a simple "passive backplane" that has only PCI and ISA connectors attached to it. These backplane connections include a dedicated system slot of the PICMG 1.0 CPU and various connections for standard ISA and PCI peripheral cards. This backplane is simple and robust, with a very low likelihood of failure, given its passive nature. This allows a much lower Mean Time to Repair than classic computer motherboard approaches, as electronics associated with CPUs can be replaced without having to remove peripheral devices.
PICMG 1.3 is a PICMG specification which is commonly referred to as SHB Express. SHB Express is a modernization of PICMG 1.0 single board computer specification. SHB Express, or System Host Board – Express, uses the same physical form factor as PICMG 1.0 boards. The board-to-backplane interfaces are PCI Express instead of PCI and ISA, although the use of PCI remains as an option.
PICMG 1.1 is a PICMG specification that defines how PCI to PCI bridging is accomplished in PICMG 1.0 systems.
PICMG 2.9 is a specification by PICMG that defines an implementation of a system management bus in a CompactPCI system. This system management bus uses an I2C hardware layer, and is based on the Intelligent Platform Management Interface (IPMI) and Intelligent Platform Management Bus (IPMB) specifications.
PICMG 1.2 is a specification by PICMG that standardizes both mechanical and electrical interfaces to support a standard form factor PCI computer system. PICMG 1.2 defines a single board computer in a passive backplane architecture with either two PCI/PCI-X busses or a single PCI/PCI-X bus. It is similar to PICMG 1.0 but removes the ISA bus.
PICMG 2.2 is a specification by PICMG that standardizes pin assignments for PICMG 2.0 CompactPCI to include VME64 Extensions.
PICMG 2.3 is a specification by PICMG that standardizes user IO pin mappings from IEEE 1386 PMC sites to CompactPCI's J3/P3, J4/P4, and J5/P5 connections on a CompactPCI backplane
PICMG 2.4 is a specification by PICMG that standardizes user IO pin mappings from ANSI/VITA standard IP sites to J3/P3, J4/P4, and J5/P5 on a CompactPCI backplane.
PICMG 2.5 is a specification by PICMG that standardizes the utilization of CompactPCI user definable pins for the computer telephony functions of standard TDM bus, telephony rear IO, 48 VDC and ringing distribution in a 6U chassis environment.
PICMG 2.10 is a specification by PICMG that defines the use of the keying mechanisms defined in IEC 1076-4-101 for the J4/P4 connector and in IEEE 1101.10 for handle and cardguide hardware. Backplanes can be designed for 3.3V VIO or 5V VIO operation. These are differentiated by having 'Cadmium Yellow' colored keys for 3.3V or 'Brilliant Blue' color for 5V operation. If the cPCI card operates on a particular VIO voltage the card shall have the respective colored coding key. If the card is compatible with both voltages then it may not have any coding key. Other coding keys exists for use of backplanes and cards that support PICMG 2.5.
PICMG 2.11 is a specification by PICMG that defines the electrical and mechanical requirements relating to plug-in power modules in CompactPCI systems.
PICMG 2.12 is a specification by PICMG that defines vendor-independent software interfaces for supporting control of the software and hardware connection processes. The specification was updated in May 2002 to add Windows and Linux updates, Redundant System Slot (RSS) API, Switched PCI-PCI bridging support, Hardware- and O/S-independent models of network-connected intelligent nodes, Standards-based management of HS- and RSS-capable CompactPCI platforms and IDSEL to global address (GA) mapping.
PICMG 2.14 is a specification by PICMG that defines a packet-based communications between heterogeneous PCI agents (multi-computing) within the CompactPCI system architecture.
References
- ↑ "PCI Telecom Mezzanine/Carrier Card Specification". PICMG. Archived from the original on 2007-01-09.