Serial Vector Format

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Serial Vector Format (SVF) is a file format that contains boundary scan vectors to be sent to an electronic circuit using a JTAG interface. Boundary scan vectors consist of the following data:

Boundary scan

Boundary scan is a method for testing interconnects on printed circuit boards or sub-blocks inside an integrated circuit. Boundary scan is also widely used as a debugging method to watch integrated circuit pin states, measure voltage, or analyze sub-blocks inside an integrated circuit.

Electronic circuit electrical circuit with active components such as transistors, valves and integrated circuits; electrical network that contains active electronic components, generally nonlinear and require complex design and analysis tools

An electronic circuit is composed of individual electronic components, such as resistors, transistors, capacitors, inductors and diodes, connected by conductive wires or traces through which electric current can flow. To be referred to as electronic, rather than electrical, generally at least one active component must be present. The combination of components and wires allows various simple and complex operations to be performed: signals can be amplified, computations can be performed, and data can be moved from one place to another.

JTAG is an industry standard for verifying designs and testing printed circuit boards after manufacture.

Contents

In computer science, a mask or bitmask is data that is used for bitwise operations, particularly in a bit field. Using a mask, multiple bits in a byte, nibble, word etc. can be set either on, off or inverted from on to off in a single bitwise operation.

The bit is a basic unit of information used in computing and digital communications. It's symbol is bit or the lower-case letter b.

In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.

The SVF standard was jointly developed by companies Texas Instruments and Teradyne . Control over the format has been handed off to boundary-scan solution provider ASSET InterTech. The most recent revision is Revision E.

Texas Instruments American company that designs and makes semiconductors

Texas Instruments Inc. (TI) is an American technology company that designs and manufactures semiconductors and various integrated circuits, which it sells to electronics designers and manufacturers globally. Its headquarters are in Dallas, Texas, United States. TI is one of the top ten semiconductor companies worldwide, based on sales volume. Texas Instruments's focus is on developing analog chips and embedded processors, which accounts for more than 80% of their revenue. TI also produces TI digital light processing (DLP) technology and education technology products including calculators, microcontrollers and multi-core processors. To date, TI has more than 43,000 patents worldwide.

Teradyne, based in North Reading, Massachusetts in the United States, is a developer and supplier of automatic test equipment (ATE). The company's divisions Semiconductor Test and Systems Test Group, are organized by the products they develop and deliver. Teradyne's high-profile customers include Samsung, Qualcomm, Intel, Analog Devices, Texas Instruments and IBM.

SVF files are used to transfer boundary scan data between tools. As an example a VHDL compiler may create an SVF file that is read by a tool for programming CPLDs.

VHDL hardware description language

VHDL is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as a general purpose parallel programming language.

The SVF file is defined as an ASCII file that consists of a set of SVF statements. The maximum number of characters allowed on a line is 256, although one SVF statement can span more than one line. Each statement consists of a command and associated parameters. Each SVF statement is terminated by a semicolon. SVF is not case sensitive. Comments can be inserted into a SVF file after an exclamation point ‘!’ or a pair of slashes ‘//’. Either ‘//’ or ‘!’ will comment out the remainder of the line.

SVF commands

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References

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