Tape-out

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In electronics and photonics design, tape-out or tapeout is the final stage of the design process for integrated circuits or printed circuit boards before they are sent for manufacturing. The tapeout is specifically the point at which the graphic for the photomask of the circuit is sent to the fabrication facility. [1]

Contents

Procedures involved

The term tapeout currently is used to describe the creation of the photomask itself from the final approved electronic CAD file. Designers may use this term to refer to the writing of the final file to disk or CD and its subsequent transmission to the semiconductor foundry; however, in current practice the foundry will perform checks and make modifications to the mask design specific to the manufacturing process before actual tapeout. These modifications of the mask data include: [2]

A modern integrated circuit has to go through a long and complex design process before it is ready for tape-out. Many of the steps along the way use software tools collectively known as electronic design automation (EDA). The design must then go through a series of verification steps collectively known as "signoff" before it can be taped-out. Tape-out is usually a cause for celebration by everyone who worked on the project, followed by trepidation awaiting the first article, the first physical samples of a chip from the manufacturing facility (semiconductor foundry).

First tapeout is rarely the end of work for the design team. Most chips will go through a series of iterations, called "spins", in which errors are detected and fixed after testing the first article. Many different factors can cause a spin, including:

Naming

The roots of the term can be traced back to the time when paper tape and later magnetic tape reels were loaded with the final electronic files used to create the photomask at the factory. [1] [3] [4]

A synonym used at IBM is RIT (release interface tape). IBM differentiates between RIT-A for the non-metallic structures and RIT-B for the metal layers. [5]

See also

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References

  1. 1 2 3 Magee, Mike (July 14, 1999). "What the Hell is… a tapeout?". The Register . Retrieved April 2, 2009.
  2. 1 2 J. Lienig, J. Scheible (2020). "Chap. 3.3: Mask Data: Layout Post Processing". Fundamentals of Layout Design for Electronic Circuits. Springer. pp. 102–110. doi:10.1007/978-3-030-39284-0. ISBN   978-3-030-39284-0. S2CID   215840278.
  3. Schaffer, Toby. "An Introduction to IC Design Under Linux". Linux Journal. Retrieved 15 October 2023.
  4. Xiu, Liming (2008). VLSI Circuit Design Methodology Demystified. IEEE Press. p. 184. ISBN   978-0-470-12742-1.
  5. US 8166439,"Techniques for Selecting Spares to Implement a Design Change in an Integrated Circuit",issued 2012-4-24