How it works
Foxton technology included a highly advanced clock generation and distribution network. With this technology, the processor continuously measured total power draw, processor loads, voltage, and clock distribution quality across the entire device, and was able to produce extremely fine clock-to-voltage granularity under dynamic conditions. As a result, Foxton enabled a processor to override factory adjusted settings, which are set at relatively high voltage levels at any given frequency to ensure stability against random voltage variances. By dynamically controlling voltage and frequencies across the entire device, Foxton was able to optimize performance for specific workloads, while ensuring that power consumption remained below specified thresholds.
Foxton improved power efficiency at any given clock rate, but that was not the primary reason it was developed. Itanium 2 processors implemented a wide microarchitecture, which had enormous potential computing capacity (theoretically capable of sustaining a throughput of six instructions per cycle). However, most software applications could not utilize all the available execution resources, lacking adequate instruction-level parallelism. Idle resources mean lower transistor switching activity, thus lower overall power consumption. Because Itanium 2 had a wide architecture, the decrease in power consumption for average code execution could be substantial. Since modern MPUs clock rates are constrained by power, not filling out the power envelope translates to lost performance. Foxton took advantage of this decrease by increasing clock frequencies to accelerate performance, while keeping total power consumption below specified thresholds. The result was intended to be a processor architecture that could dynamically optimize performance versus power consumption across a broad range of workloads.
A Foxton-enabled chip had a variable voltage and frequency adjusted to a nominal power envelope that could be specified from software. Clock and voltage were adjusted to keep the chip's consumption within the envelope. Depending on the actual usage pattern the chip was able to scale up or down, feeding the core with proper voltage. Under so called "low activity" workloads, which generate less heat while being executed, the processor speeds up until it reaches the nominal power setting. Inversely, "high activity" loads may cause the chip to reduce core voltage and clock rate to stay below the nominal power setting. Low-activity workloads typically include integer-intensive computations, such as commercial and database applications. Foxton technology was expected to increase performance for these applications by about 10% compared with the same processor running with a "fixed clock." High activity workloads include floating point-intensive computations, such as scientific and R&D simulations. Nominal clock speeds for Itanium processors with Foxton would have been based on power consumption for these intensive computations.
Intel said Foxton technology would not only appear in the Itanium family, but later in Xeons as well. However, this does not appear to have happened.
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Power optimization is the use of electronic design automation tools to optimize (reduce) the power consumption of a digital design, such as that of an integrated circuit, while preserving the functionality.
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Low-power electronics are electronics, such as notebook processors, that have been designed to use less electrical power than usual, often at some expense. In the case of notebook processors, this expense is processing power; notebook processors usually consume less power than their desktop counterparts, at the expense of lower processing power.
Memory timings or RAM timings describe the timing information of a memory module or the onboard LPDDRx. Due to the inherent qualities of VLSI and microelectronics, memory chips require time to fully execute commands. Executing commands too quickly will result in data corruption and results in system instability. With appropriate time between commands, memory modules/chips can be given the opportunity to fully switch transistors, charge capacitors and correctly signal back information to the memory controller. Because system performance depends on how fast memory can be used, this timing directly affects the performance of the system.
Electronic systems’ power consumption has been a real challenge for Hardware and Software designers as well as users especially in portable devices like cell phones and laptop computers. Power consumption also has been an issue for many industries that use computer systems heavily such as Internet service providers using servers or companies with many employees using computers and other computational devices. Many different approaches have been discovered by researchers to estimate power consumption efficiently. This survey paper focuses on the different methods where power consumption can be estimated or measured in real-time.
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Adaptive voltage scaling (AVS) is a closed-loop dynamic power minimization technique that adjusts the voltage supplied to a computer chip to match the chip's power needs during operation. Many computer chips, especially those in mobile devices or Internet of things devices are constrained by the power available and face varying workloads. In other situations a chip may be constrained by the amount of heat it is allowed to generate. In addition, individual chips can vary in their efficiency due to many factors, including minor differences in manufacturing conditions. AVS allows the voltage supplied to the chip, and therefore its power consumption, to be continuously adjusted to be appropriate to the workload and the parameters of the specific chip. This is accomplished by integrating a device that monitors the performance of the chip into the chip, which then provides information to a power controller.
