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The NASA Standard Spacecraft Computer-1 (NSSC-1) is a computer developed as a standard component for the MultiMission Modular Spacecraft at the Goddard Space Flight Center (GSFC) in 1974. The basic spacecraft was built of standardized components and modules, for cost reduction. The computer had 18 bit wide core memory or plated wire memory; up to 64 k. 18 bits was chosen because it gave more accuracy (x4) for data over a 16 bit machine. Floating point arithmetic was not supported.
The NSSC-1 was used on the
and other missions that were mostly limited to the solar system, eg Gamma Ray Observatory, and UARS. [2] : 910
The prior OBP hardware was developed by Westinghouse and GSFC. The machine used diode–transistor logic, the lowest power parts available at the time on the preferred parts list; initially fabricated from 1700 SSI (NOR gate) packages, the later AOP was implemented using 69 MSI (medium-scale integration) TTL chips from Harris. [2] : 904
The NSSC-1 was implemented by IBM using TRW versions of the Harris chips. [2] : 905
The NSSC-1 had an assembler/loader/simulator toolset hosted on Xerox XDS 930 (24- bit) mainframe. An associated simulator ran at 1/1000 of real time. The Xerox computer was interfaced to a breadboard OBP in a rack (which, of course, operated at room temperature ambient conditions). Later, the Software Development and Validation Facility (SDVF) added a flight dynamics simulator hosted on a PDP-11/70 minicomputer. [3]
A purpose-built NSSC-1 Flight Executive was developed for use on the Solar Maximum Mission (SMM) and subsequent flights. It switched tasks at intervals of 25 ms and included a stored command processor that handled both absolute time and relative time commands. It had a status buffer that could be transferred back to a ground receiver station and thus required a lot of memory, typically more than half of that available, leaving the rest for applications and spare. [4]
The Advanced Onboard Processor (AOP) was used on Landsat B & C, International Ultraviolet Explorer (IUE), and OSS-1. It used medium scale integration transistor-transistor logic (TTL). [2]
In the 1980s the RCA 1802 was used for many missions—like Galileo. This mission and other missions started the trend away from custom built NASA CPUs in spacecraft. The exploration of the inner and outer parts of the solar system would have to be done with existing (civilian and military-aerospace) CPUs.
Before the RAD family of 32 bit CPUs were used in space missions, the MIL-STD-1750A (a CPU that could run modern applications) saw substantial use.
Since the arrival of the IBM RAD6000 in the 2000s and the RAD750 in the 2010s, using the NSSC-1 has become unthinkable. Its computing power was not great, and most modern space missions require flight computers to have substantial and substantive computing power.
The Explorers program is a NASA exploration program that provides flight opportunities for physics, geophysics, heliophysics, and astrophysics investigations from space. Launched in 1958, Explorer 1 was the first spacecraft of the United States to achieve orbit. Over 90 space missions have been launched since. Starting with Explorer 6, it has been operated by NASA, with regular collaboration with a variety of other institutions, including many international partners.
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MIL-STD-1750A or 1750A is the formal definition of a 16-bit computer instruction set architecture (ISA), including both required and optional components, as described by the military standard document MIL-STD-1750A (1980). Since August 1996, it has been inactive for new designs.
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