Intel Hero Recognition (finalist)[1][2]; Distinguished Young Leader Award (OSA)[1]; Fellow, IEI; Fellow, IETE; Senior Member, IEEE and ACM[3]
Priyadarsan Patra (born 1961) is a computer scientist, semiconductor researcher, academic administrator, and nonprofit founder. He is the founding Vice Chancellor of NIST University, Odisha, and formerly served as Chief Architect and Principal Scientist at Intel Corporation in the United States.[4][1] He is the founding chair of the global IEEE System Validation and Debug Technology Committee (SVDTC).[5]
Patra worked at Intel Corporation for 22 years, specializing in systems-on-chip (SoC) and server architecture.[1] He served as Chief Architect and Principal Scientist in Intel's Data Center Group (2016–2018). As the founding chair of the IEEE SVDTC, he contributed to global white papers on post-silicon validation and silicon debug.[5] He serves on the advisory boards of semiconductor companies including Silizium Circuits and Cirkitex.[7]
Academic and administrative career
From 2021 to 2024, Patra was Pro Vice-Chancellor and Distinguished Professor at DIT University, Dehradun.[8] He previously served as Dean of Research at Xavier University.[9] While in Uttarakhand, Patra advocated for the use of technology-driven interventions, such as IoT and remote sensing, to improve regional disaster management and infrastructure resilience.[10] In 2024, he was appointed founding Vice-Chancellor of NIST University.[4] In 2025, he presented the annual report at the 2nd Convocation alongside the Governor of Odisha.[11] In January 2026, he presided over NIST's 29th Foundation Day.[12] He also serves as an Advisor to the IEEE Bhubaneswar Section.[3] In 2025, Patra served as the Chief Guest for the 13th IEEE International Conference on Intelligent Systems and Embedded Design (ISED-2025) at NIT Raipur, where he advocated for strengthening research culture in regional centers.[13]
He has delivered keynote addresses at international forums including the 2025 Conference on Cyber-Physical Systems, Power Electronics and Electric Vehicles (ICPEEV) at Mahindra University,[14] and served as the Chief Guest at the 13th IEEE International Conference on Intelligent Systems and Embedded Design (ISED-2025) at NIT Raipur.[15] Patra authored the foreword for the Springer Nature publication Proceedings of the 3rd International Conference on Opportunities and Challenges for a Resilient Future (2025).[16]
Research and publications
Patra has authored six books and more than 70 peer-reviewed papers in low-power VLSI design and system validation.[3]
Selected Books:
Low-power High-level Synthesis for Nanoscale CMOS Circuits. Springer. 2008. ISBN978-0-387-76474-0.
Eco-Friendly Computing and Communication Systems (Springer, 2012)[17]
Artificial Intelligence-Driven Circuits and Systems (Springer Nature, 2022)[1]
Patra, Priyadarsan (2007). "On the cusp of a validation wall". IEEE Design & Test of Computers. 24 (2). IEEE: 193–196. doi:10.1109/MDT.2007.23.
Mandal, M., Sahoo, S.K., Patra, P., et al. (2020). "In silico ranking of phenolics for therapeutic effectiveness on cancer stem cells." BMC Bioinformatics, 21, 499.[19]
Patra, P. et al. (2018). "Debug infrastructure for system-on-chips." IEEE SVDTC White Paper.[5]
Chen, K., Malik, S., & Patra, P. (2008). "Runtime validation of memory ordering using constraint graph checking." HPCA-14.[20]
Patents
Patra holds over 10 patents in the United States and internationally, primarily assigned to Intel Corporation, related to semiconductor architecture, circuit synthesis, and system-on-chip validation. Notable patents include:
USpatent 6529861,"Power consumption reduction for domino circuits",published 4 March 2003, assigned to Intel Corporation
USpatent 8055697,"Method and device for dynamically verifying a processor architecture",published 8 November 2011, assigned to Intel Corporation
USpatent 10198333,"Test, validation, and debug architecture",published 5 February 2019, assigned to Intel Corporation
USpatent 6556962,"Phase optimization for low power domino circuits",published 29 April 2003, assigned to Intel Corporation
Social entrepreneurship
In 1993, Patra founded the Sustainable Economic and Educational Development Society (SEEDS), a nonprofit organization focused on sustainable development.[2] SEEDS is a US-registered 501(c)(3) public charity that has engaged in over 50 projects in areas including education, rural economic development, disaster relief, women’s empowerment, and appropriate technology.
He served as General Secretary of the Odisha Society of the Americas (OSA) from 2007 to 2009.[21] In 2025, he organized a social security awareness event at NIST in collaboration with the EPFO.[22] Patra has contributed expert analysis to Eurasia Review on topics concerning the societal impact of technology and global development.[23]
↑Sharma, Anjali Krishan; Joshi, Ashutosh, eds. (2025). Proceedings of the 3rd International Conference on Opportunities and Challenges for a Resilient Future. Springer Nature. p.Foreword. ISBN978-981-96-0930-7.
↑Eco-Friendly Computing and Communication Systems. Springer. 2012. ISBN9783642321115.
↑Runtime validation of memory ordering using constraint graph checking. 14th International Conference on High-Performance Computer Architecture. IEEE. 2008. pp.415–426. doi:10.1109/HPCA.2008.4658640.
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