Sandip Tiwari

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Sandip Tiwari

Sandip Tiwari is an Indian-born electrical engineer and applied physicist. He is the Charles N. Mellowes Professor of Engineering at Cornell University. His previous roles were Director of National Nanotechnology Users Network, Director of the National Nanotechnology Infrastructure Network, and research scientist at IBM T. J. Watson Research Center. He is best known for his pioneer research in the fields of SiGe transistor and nanocrystal memory.

Contents

Early life and education

Sandip Tiwari was born in Ahmedabad, India, received his BTech from Indian Institute of Technology, Kanpur in 1976. He received his M.Eng. at Rensselaer Polytechnic Institute and PhD at Cornell University in 1980.[ citation needed ]

Work and academic career

His early research career was at IBM's Research Division until 1999. During this period, he did the early work on compound semiconductor transistors and co-developed the first SiGe transistor. [1] [2] He also pioneered various quantum and nanoscale devices, such as the nanocrystal memory. [3] The first demonstration of SiGe transistor was honored as IEEE International Electron Devices Meeting (IEDM) Top Industry Innovation of 1987.[ citation needed ] His work on nanocrystal memory was one of the 50 most-cited papers in the history of Applied Physics Letters in 2013. [4]

At Cornell University, his Nanoscale ElectroScience Research Group [5] [6] focused on adaptive approaches for low power design, [7] three-dimensional integration, [8] [9] inexact computing, [10] and Bayesian implementations [11] [12]

Selected awards and honors

Selected publications

Books

Papers

Related Research Articles

<span class="mw-page-title-main">Transistor</span> Solid-state electrically operated switch also used as an amplifier

A transistor is a semiconductor device used to amplify or switch electrical signals and power. It is one of the basic building blocks of modern electronics. It is composed of semiconductor material, usually with at least three terminals for connection to an electronic circuit. A voltage or current applied to one pair of the transistor's terminals controls the current through another pair of terminals. Because the controlled (output) power can be higher than the controlling (input) power, a transistor can amplify a signal. Some transistors are packaged individually, but many more in miniature form are found embedded in integrated circuits. Because transistors are the key active components in practically all modern electronics, many people consider them one of the 20th century's greatest inventions.

<span class="mw-page-title-main">Semiconductor device</span> Electronic component that exploits the electronic properties of semiconductor materials

A semiconductor device is an electronic component that relies on the electronic properties of a semiconductor material for its function. Its conductivity lies between conductors and insulators. Semiconductor devices have replaced vacuum tubes in most applications. They conduct electric current in the solid state, rather than as free electrons across a vacuum or as free electrons and ions through an ionized gas.

<span class="mw-page-title-main">CMOS</span> Technology for constructing integrated circuits

Complementary metal–oxide–semiconductor is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips, and other digital logic circuits. CMOS technology is also used for analog circuits such as image sensors, data converters, RF circuits, and highly integrated transceivers for many types of communication.

A thin-film transistor (TFT) is a special type of field-effect transistor (FET) where the transistor is made by thin film deposition. TFTs are grown on a supporting substrate, such as glass. This differs from the conventional bulk metal oxide field effect transistor (MOSFET), where the semiconductor material typically is the substrate, such as a silicon wafer. The traditional application of TFTs is in TFT liquid-crystal displays.

A heterojunction is an interface between two layers or regions of dissimilar semiconductors. These semiconducting materials have unequal band gaps as opposed to a homojunction. It is often advantageous to engineer the electronic energy bands in many solid-state device applications, including semiconductor lasers, solar cells and transistors. The combination of multiple heterojunctions together in a device is called a heterostructure, although the two terms are commonly used interchangeably. The requirement that each material be a semiconductor with unequal band gaps is somewhat loose, especially on small length scales, where electronic properties depend on spatial properties. A more modern definition of heterojunction is the interface between any two solid-state materials, including crystalline and amorphous structures of metallic, insulating, fast ion conductor and semiconducting materials.

SiGe, or silicon–germanium, is an alloy with any molar ratio of silicon and germanium, i.e. with a molecular formula of the form Si1−xGex. It is commonly used as a semiconductor material in integrated circuits (ICs) for heterojunction bipolar transistors or as a strain-inducing layer for CMOS transistors. IBM introduced the technology into mainstream manufacturing in 1989. This relatively new technology offers opportunities in mixed-signal circuit and analog circuit IC design and manufacture. SiGe is also used as a thermoelectric material for high-temperature applications (>700 K).

Ballistic deflection transistors (BDTs) are electronic devices, developed since 2006, for high-speed integrated circuits, which is a set of circuits bounded on semiconductor material. They use electromagnetic forces instead of a logic gate, a device used to perform solely on specified inputs, to switch the forces of electrons. The unique design of this transistor includes individual electrons bouncing from wedge-shaped obstacles called deflectors. Initially accelerated by electric field, electrons are then guided on their respective paths by electromagnetic deflection. Electrons are therefore able to travel without being scattered by atoms or defects, thus resulting in improved speed and reduced power consumption.

SONOS, short for "silicon–oxide–nitride–oxide–silicon", more precisely, "polycrystalline silicon"—"silicon dioxide"—"silicon nitride"—"silicon dioxide"—"silicon", is a cross sectional structure of MOSFET (metal–oxide–semiconductor field-effect transistor), realized by P.C.Y. Chen of Fairchild Camera and Instrument in 1977. This structure is often used for non-volatile memories, such as EEPROM and flash memories. It is sometimes used for TFT LCD displays. It is one of CTF (charge trap flash) variants. It is distinguished from traditional non-volatile memory structures by the use of silicon nitride (Si3N4 or Si9N10) instead of "polysilicon-based FG (floating-gate)" for the charge storage material. A further variant is "SHINOS" ("silicon"—"hi-k"—"nitride"—"oxide"—"silicon"), which is substituted top oxide layer with high-κ material. Another advanced variant is "MONOS" ("metal–oxide–nitride–oxide–silicon"). Companies offering SONOS-based products include Cypress Semiconductor, Macronix, Toshiba, United Microelectronics Corporation and Floadia.

Nanoelectronics refers to the use of nanotechnology in electronic components. The term covers a diverse set of devices and materials, with the common characteristic that they are so small that inter-atomic interactions and quantum mechanical properties need to be studied extensively. Some of these candidates include: hybrid molecular/semiconductor electronics, one-dimensional nanotubes/nanowires or advanced molecular electronics.

Resistive random-access memory is a type of non-volatile (NV) random-access (RAM) computer memory that works by changing the resistance across a dielectric solid-state material, often referred to as a memristor. One major advantage of ReRAM over other NVRAM technologies is the ability to scale below 10nm.

Mark S. Lundstrom is an American electrical engineering researcher, educator, and author. He is known for contributions to the theory, modeling, and understanding of semiconductor devices, especially nanoscale transistors, and as the creator of the nanoHUB, a major online resource for nanotechnology. Lundstrom is Don and Carol Scifres Distinguished Professor of Electrical and Computer Engineering and in 2020 served as Acting Dean of the College of Engineering at Purdue University, in West Lafayette, Indiana.

<span class="mw-page-title-main">Field-effect transistor</span> Type of transistor

The field-effect transistor (FET) is a type of transistor that uses an electric field to control the flow of current in a semiconductor. It comes in two types: junction FET (JFET) and metal-oxide-semiconductor FET (MOSFET). FETs have three terminals: source, gate, and drain. FETs control the flow of current by the application of a voltage to the gate, which in turn alters the conductivity between the drain and source.

Flexible silicon refers to a flexible piece of mono-crystalline silicon. Several processes have been demonstrated in the literature for obtaining flexible silicon from single crystal silicon wafers.

Kaustav Banerjee is a professor of electrical and computer engineering and director of the Nanoelectronics Research Laboratory at the University of California, Santa Barbara. He obtained Ph.D. degree in electrical engineering and computer sciences from the University of California. He was named Fellow of the Institute of Electrical and Electronics Engineers (IEEE) in 2012 "for contributions to modeling and design of nanoscale integrated circuit interconnects." One of Banerjee's notable doctoral student is Deblina Sarkar, who later joined the faculty of Massachusetts Institute of Technology. The journal Nature Nanotechnology recognised their paper on tunnel field-effect transistor (TFET)-based biosensor published in Applied Physics Letters in as one of the highlight papers in 2012.

A nanoscale vacuum-channel transistor (NVCT) is a transistor in which the electron transport medium is a vacuum, much like a vacuum tube. In a traditional solid-state transistor, a semiconductor channel exists between the source and the drain, and the current flows through the semiconductor. However, in a nanoscale vacuum-channel transistor, no material exists between the source and the drain, and therefore, the current flows through the vacuum.

<span class="mw-page-title-main">Gary Patton</span> American technologist and business executive

Dr. Gary Patton is an American technologist and business executive. He is currently the Corporate Vice President and General Manager of Design Enablement and Components Research in the Technology Development Group at Intel. He has spent most of his career in IBM, starting in IBM's Research Division and holding management and executive positions in IBM's Microelectronics Division in Technology Development, Design Enablement, Manufacturing, and Business Line Management.

<span class="mw-page-title-main">Tsu-Jae King Liu</span>

Tsu-Jae King Liu is an American academic and engineer who serves as the Dean and the Roy W. Carlson Professor of Engineering at the UC Berkeley College of Engineering.

Sasikanth Manipatruni is an American engineer and inventor in the fields of Computer engineering, Integrated circuit technology, Materials Engineering and semiconductor device fabrication. Manipatruni contributed to developments in silicon photonics, spintronics and quantum materials.

Yuan Taur is a Chinese American electrical engineer and an academic. He is a Distinguished Professor of Electrical and Computer Engineering (ECE) at the University of California, San Diego.

References

  1. S.S. Iyer, G.L. Patton, S.S. Delage, S. Tiwari, J.M.C. Stork, "Silicon-germanium base heterojunction bipolar transistors by molecular beam epitaxy", International Electron Devices Meeting (1987).
  2. G.L. Patton, S.S. Iyer, S.L. Delage, S. Tiwari and J.M.C. Stork, “Silicon-Germanium Base Heterojunction Bipolar Transistors by Molecular Beam Epitaxy,” IEEE Electron Device Letters, EDL-9, No. 4, p. 165 (1988)
  3. S. Tiwari, F. Rana, H. Hanafi, A. Hartstein, E. Crabbe and K. Chan, “A Silicon Nano-Crystals Based Memory,” Applied Physics Letters, 68, p.1377, 4 Mar. (1996)
  4. "Celebrating 50 Years of Applied Physics Letters" (PDF). Numse.nagoya-u.ac.jp. Retrieved 17 July 2022.
  5. "Sandip Tiwari | Cornell Engineering". Engineering.cornell.edu.
  6. "Nanoscale ElectroScience Research Group, ECE Cornell". electroscience.ece.cornell.edu.
  7. J. Y. Kim, P. Solomon and S. Tiwari, “Adaptive Circuit Design Using Independently Biased Back-Gated Double-Gate MOSFETS,” IEEE Circuits and Systems I, 59 (4), Apr.., 806-819(2012)
  8. L. Xue, C. C. Liu, H.-S. Kim, S (K) Kim, and S. Tiwari, “Three-Dimensional Integration: Technology, Use, and Issues for Mixed-Signal Applications,” IEEE Transactions on Electron Devices, 50, No. 3, 601-609(2003)
  9. C. C. Liu, I. Ganusov, M. Burtscher, and S. Tiwari, “Bridging the Processor-Memory Performance Gap with 3D IC Technology,” IEEE Design and Test of Computers, Vol. 22, Nov., 556-564(2005)
  10. J. Y. Kim and S. Tiwari, “Inexact Computing using Probabilistic Circuits: Ultra Low-Power Digital Processing”, ACM Journal of Emerging Technologies, Vol. 10, No. 2, Article 16, February (2014)
  11. S. Tiwari and D. Querlioz, “On the physical underpinnings of the unusual effectiveness of probabilistic and neural computation,” Invited paper, Tech. Dig. of IEEE Int’l Conf. on Rebooting Computing, 1--4(2017)
  12. "On the Physical Underpinnings of the Unusual Effectiveness of Probabilistic and Neural Computation - IEEE Rebooting Computing 2017". Ieeetv.ieee.org.
  13. "IEEE CLEDO BRUNETTI AWARD : Recipients" (PDF). Ieee.org. Retrieved 17 July 2022.
  14. "Past DAA Awardees". Iitkalumni.org.
  15. "ISCS Young Scientist Award". Csw2018.org.
  16. Tiwari, S. (March 15, 2002). "Introduction and information on editorial board". IEEE Transactions on Nanotechnology. 1 (1): 1–3. Bibcode:2002ITNan...1....1T. doi:10.1109/TNANO.2002.1005420 via IEEE Xplore.
  17. "Sandip Tiwari". Ethw.org. July 8, 2022.
  18. Tiwari, Sandip (August 15, 2015). "Memories in the Future of Information Processing". Proceedings of the IEEE. 103 (8): 1247–1249. doi: 10.1109/JPROC.2015.2448912 .
  19. "APS Fellow Archive". Aps.org.
  20. "IEEE Fellows Directory - Member Profile". Services27.ieee.org.
  21. Tiwari, Sandip (August 15, 2015). "Implications of Scales in Processing of Information". Proceedings of the IEEE. 103 (8): 1250–1273. doi:10.1109/JPROC.2015.2448936. S2CID   12464832 via IEEE Xplore.
  22. Tiwari, Sandip; Rana, Farhan; Hanafi, Hussein; Hartstein, Allan; Crabbé, Emmanuel F.; Chan, Kevin (March 4, 1996). "A silicon nanocrystals based memory". Applied Physics Letters. 68 (10): 1377–1379. Bibcode:1996ApPhL..68.1377T. doi:10.1063/1.116085.
  23. Tiwari, S. (March 15, 1988). "A new effect at high currents in heterostructure bipolar transistors". IEEE Electron Device Letters. 9 (3): 142–144. Bibcode:1988IEDL....9..142T. doi:10.1109/55.2069. S2CID   39623450 via IEEE Xplore.