Substrate mapping (or wafer mapping) is a process in which the performance of semiconductor devices on a substrate is represented by a map showing the performance as a colour-coded grid. The map is a convenient representation of the variation in performance across the substrate, since the distribution of those variations may be a clue as to their cause.
Semiconductor device fabrication is the process used to create the integrated circuits that are present in everyday electrical and electronic devices. It is a multiple-step sequence of photolithographic and chemical processing steps during which electronic circuits are gradually created on a wafer made of pure semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications.
The concept also includes the package of data generated by modern wafer testing equipment which can be transmitted to equipment used for subsequent 'back-end' manufacturing operations.
Wafer testing is a step performed during semiconductor device fabrication. During this step, performed before a wafer is sent to die preparation, all individual integrated circuits that are present on the wafer are tested for functional defects by applying special test patterns to them. The wafer testing is performed by a piece of test equipment called a wafer prober. The process of wafer testing can be referred to in several ways: Wafer Final Test (WFT), Electronic Die Sort (EDS) and Circuit Probe (CP) are probably the most common.
The initial process supported by substrate maps was inkless binning.
Each tested die is assigned a bin value, depending on the result of the test. For example, a pass die is assigned a bin value of 1 for a good bin, bin 10 for an open circuit, and bin 11 for a short circuit. In the very early days of wafer test, the dies were put in different bins or buckets, depending on the test results.
Physical binning may no longer be used, but the analogy is still good. The next step in the process was to mark the failing dies with ink, so that during assembly only uninked dies were used for die attachment and final assembly. The inking step may be skipped if the assembly equipment is able to access the information in the maps generated by the test equipment.
A wafer map is where the substrate map applies to an entire wafer, while a substrate map is mapping in other areas of the semiconductors process including frames, trays and strips.
A wafer, also called a slice or substrate, is a thin slice of semiconductor material, such as a crystalline silicon, used in electronics for the fabrication of integrated circuits and in photovoltaics for conventional, wafer-based solar cells. The wafer serves as the substrate for microelectronic devices built in and over the wafer and undergoes many microfabrication process steps such as doping or ion implantation, etching, deposition of various materials, and photolithographic patterning. Finally, the individual microcircuits are separated (dicing) and packaged.
As with many items in the Semiconductor process area, also for this process step there are standards available. The latest and most potential standard is the E142 standard, provided by the SEMI organization. This standard has been approved via ballots for release in 2005.
It supports many possible substrate maps, including the ones named above. While the old standards could only support standard bin maps, representing bin information, this standard also support transfermaps, which can help in tracing back dies on strips to the locations they come from off the wafer for example.
An integrated circuit or monolithic integrated circuit is a set of electronic circuits on one small flat piece of semiconductor material that is normally silicon. The integration of large numbers of tiny transistors into a small chip results in circuits that are orders of magnitude smaller, cheaper, and faster than those constructed of discrete electronic components. The IC's mass production capability, reliability and building-block approach to circuit design has ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. ICs are now used in virtually all electronic equipment and have revolutionized the world of electronics. Computers, mobile phones, and other digital home appliances are now inextricable parts of the structure of modern societies, made possible by the small size and low cost of ICs.
Microelectromechanical systems is the technology of microscopic devices, particularly those with moving parts. It merges at the nano-scale into nanoelectromechanical systems (NEMS) and nanotechnology. MEMS are also referred to as micromachines in Japan, or micro systems technology (MST) in Europe.
A printed circuit board (PCB) mechanically supports and electrically connects electronic components or electrical components using conductive tracks, pads and other features etched from one or more sheet layers of copper laminated onto and/or between sheet layers of a non-conductive substrate. Components are generally soldered onto the PCB to both electrically connect and mechanically fasten them to it.
Fabless manufacturing is the design and sale of hardware devices and semiconductor chips while outsourcing the fabrication of the devices to a specialized manufacturer called a semiconductor foundry. Foundries are typically, but not exclusively, located in mainland China and Taiwan because of the generally low cost of labor. Thus, fabless companies can benefit from lower capital costs while concentrating their research and development resources on the end market.
Silicon on insulator (SOI) technology refers to the use of a layered silicon–insulator–silicon substrate in place of conventional silicon substrates in semiconductor manufacturing, especially microelectronics, to reduce parasitic device capacitance, thereby improving performance. SOI-based devices differ from conventional silicon-built devices in that the silicon junction is above an electrical insulator, typically silicon dioxide or sapphire. The choice of insulator depends largely on intended application, with sapphire being used for high-performance radio frequency (RF) and radiation-sensitive applications, and silicon dioxide for diminished short channel effects in microelectronics devices. The insulating layer and topmost silicon layer also vary widely with application.
Integrated circuit design, or IC design, is a subset of electronics engineering, encompassing the particular logic and circuit design techniques required to design integrated circuits, or ICs. ICs consist of miniaturized electronic components built into an electrical network on a monolithic semiconductor substrate by photolithography.
Microfabrication is the process of fabricating miniature structures of micrometre scales and smaller. Historically, the earliest microfabrication processes were used for integrated circuit fabrication, also known as "semiconductor manufacturing" or "semiconductor device fabrication". In the last two decades microelectromechanical systems (MEMS), microsystems, micromachines and their subfields, microfluidics/lab-on-a-chip, optical MEMS, RF MEMS, PowerMEMS, BioMEMS and their extension into nanoscale have re-used, adapted or extended microfabrication methods. Flat-panel displays and solar cells are also using similar techniques.
Soitec is a France-based international industrial company specialized in generating and manufacturing high performance semiconductor materials.
In the context of manufacturing integrated circuits, wafer dicing is the process by which die are separated from a wafer of semiconductor following the processing of the wafer. The dicing process can involve scribing and breaking, mechanical sawing or laser cutting. All methods are typically automated to ensure precision and accuracy. Following the dicing process the individual silicon chips are encapsulated into chip carriers which are then suitable for use in building electronic devices such as computers, etc.
In microelectronics, a three-dimensional integrated circuit is an integrated circuit manufactured by stacking silicon wafers or dies and interconnecting them vertically using, for instance, through-silicon vias (TSVs) or Cu-Cu connections, so that they behave as a single device to achieve performance improvements at reduced power and smaller footprint than conventional two dimensional processes. 3D IC is just one of a host of 3D integration schemes that exploit the z-direction to achieve electrical performance benefits.
In statistics, restricted randomization occurs in the design of experiments and in particular in the context of randomized experiments and randomized controlled trials. Restricted randomization allows intuitively poor allocations of treatments to experimental units to be avoided, while retaining the theoretical benefits of randomization. For example, in a clinical trial of a new proposed treatment of obesity compared to a control, an experimenter would want to avoid outcomes of the randomization in which the new treatment was allocated only to the heaviest patients.
In semiconductor manufacturing, a process corner is an example of a design-of-experiments (DoE) technique that refers to a variation of fabrication parameters used in applying an integrated circuit design to a semiconductor wafer. Process corners represent the extremes of these parameter variations within which a circuit that has been etched onto the wafer must function correctly. A circuit running on devices fabricated at these process corners may run slower or faster than specified and at lower or higher temperatures and voltages, but if the circuit does not function at all at any of these process extremes the design is considered to have inadequate design margin.
A semiconductor package is a metal, plastic, glass, or ceramic casing containing one or more discrete semiconductor devices or integrated circuits. Individual components are fabricated on semiconductor wafers before being diced into die, tested, and packaged. The package provides a means for connecting the package to the external environment, such as printed circuit board, via leads such as lands, balls, or pins; and protection against threats such as mechanical impact, chemical contamination, and light exposure. Additionally, it helps dissipate heat produced by the device, with or without the aid of a heat spreader. There are thousands of package types in use. Some are defined by international, national, or industry standards, while others are particular to an individual manufacturer.
SÜSS MicroTec SE is a supplier of equipment and process solutions for the semiconductor industry and related markets. The microstructuring systems like photolithography tools are used for manufacturing of processors, memory chips, MEMS, LED and other micro system devices.
A substrate is a solid substance onto which a layer of another substance is applied, and to which that second substance adheres. In solid-state electronics, this term refers to a thin slice of material such as silicon, silicon dioxide, aluminum oxide, sapphire, germanium, gallium arsenide (GaAs), an alloy of silicon and germanium, or indium phosphide (InP). These serve as the foundation upon which electronic devices such as transistors, diodes, and especially integrated circuits (ICs) are deposited.
Tokyo Electron Limited , or TEL, is a Japanese electronics and semiconductor company headquartered in Akasaka, Minato-ku, Tokyo, Japan.
Rudolph Technologies, Inc. is an American semiconductor company. Formed in 1940 and traded as NYSE: RTEC on the New York Stock Exchange, it is a provider of process characterization equipment and software for semiconductor, data storage, flat panel display and micro-electro-mechanical system (MEMS) manufacturing industries. The company’s product offering includes automated defect inspection and metrology systems, probe card test and analysis systems, and lithography step-and-repeat systems. In addition, Rudolph provides a broad range of software products designed to improve yield, control processes and reduce manufacturing costs.