General information | |
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Launching | July 2024 |
Designed by | AMD |
Common manufacturer(s) | |
Cache | |
L1 cache | 80 KB (per core):
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L2 cache | 1 MB (per core) |
Architecture and classification | |
Technology node | TSMC N4X TSMC N3 |
Instruction set | x86, x86-64 |
Physical specifications | |
Socket(s) |
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Products, models, variants | |
Product code name(s) | |
History | |
Predecessor(s) | Zen 4 |
Zen 5 is the codename for an upcoming CPU microarchitecture by AMD, shown on their roadmap in May 2022, [3] destined for a release in July 2024. [4] It is the successor to Zen 4 and is fabricated on TSMC's N4X and N3E processes. [5] [6]
The Zen 5 microarchitecture powers Ryzen 9000 series desktop processors (codenamed "Granite Ridge"), Ryzen Threadripper 9000 series enthusiast/workstation processors (codenamed "Shimada Peak"), [7] [8] Ryzen 9055HX series extreme mobile processors (codenamed "Fire Range"), Epyc 9005 server processors (codenamed "Turin"), [9] and Ryzen AI 300 thin and light mobile processors (codenamed "Kraken Point" and "Strix Point"). [10]
A roadmap shown during AMD's Financial Analyst Day on June 9, 2022 confirmed that Zen 5 and Zen 5c would be launching in 3nm and 4nm variants in 2024. [11] The earliest details on the Zen 5 architecture promised a "re-pipelined front end and wide issue" with "integrated AI and Machine Learning optimizations".
During AMD's Q4 2023 earnings call on January 30, 2024, AMD CEO Lisa Su stated that Zen 5 products would be "coming in the second half of the year". [12]
Zen 5 is a ground-up redesign of Zen 4 with a wider front-end, increased floating point throughput and more accurate branch prediction. [13]
Zen 5 was designed with both 4nm and 3nm processes in mind. This acted as an insurance policy for AMD in the event that TSMC's mass production of its N3 nodes were to face delays, significant wafer defect issues or capacity issues. One industry analyst estimated early N3 wafer yields to be at 55% while others estimated yields to be similar to those of N5 at between 60-80%. [14] [15] Additionally, Apple, as TSMC's largest customer, is given priority access to the latest process nodes. In 2022, Apple was responsible for 23% of TSMC's $72 billion in total revenue. [16] After N3 began ramping at the end of 2022, Apple bought up the entirety of TSMC's early N3B wafer production capacity to fabricate their A17 and M3 SoCs. [17]
Zen 5's CCDs are fabricated on TSMC's N4X node which is intended to accomodate higher frequencies for high-performance computing (HPC) applications over significantly increased transistor density. Zen 4-based mobile processors were fabricated on the N4P node which is targeted more towards power efficiency. N4X maintains IP compatibility with N4P and offers a 6% frequency gain over N4P at the same power but comes with the trade-off of moderate leakage. [18] Compared to the N5 node used to produce Zen 4 CCDs, N4X can enable up to 15% higher frequencies while running at 1.2V. [19] Zen 5c CCDs for Turin Dense server processors are fabricated on TSMC's N3E node.
AMD claims a 16% IPC uplift on average for Zen 5 over Zen 4. [20]
The L1 cache per core is increased from 64 KB to 80 KB per core. The L1 instruction cache remains the same at 32 KB but the L1 data cache is increased from 32 KB to 48 KB per core. Furthermore, the bandwidth of the L1 data cache for 512-bit floating point unit pipes has also been doubled. Zen 5 contains 6 Arithmetic Logic Units (ALUs), up from 4 ALUs in prior Zen architectures. A greater number of ALUs that handle common integer operations can increase per-cycle scalar integer throughput by 50%. [21]
Zen 4 introduced AVX-512 instructions. AVX-512 capabilities have been expanded with Zen 5 with a doubling of the floating point pipe width to 512-bit. Additionally, there is greater bfloat16
throughput which is beneficial for AI workloads.
Zen 5's Infinity Fabric clock (FCLK) has increased from 2000 to 2400 MHz. [22] Due to its 2000 MHz FCLK, Zen 4 required DDR5-6000 memory in order for the FLCK, memory clock (MCLK) and memory controller clock (UCLK) to run at a 1:1 ratio. [23] Zen 5's 2400 MHz Infinity Fabric clock therefore requires DDR5-7200 memory for the same 1:1 ratio.
AMD announced an initial lineup of four models of Ryzen 9000 processors on June 3, 2024, including one Ryzen 5, one Ryzen 7 and two Ryzen 9 models. Manufactured on a 4 nm process, the processors will feature between 6 and 16 cores. [20] Ryzen 9000 processors will be released in July.
SKU | Cores (threads) | Chiplets | Core config [lower-alpha 1] | Clock rate (GHz) | Graphics | Cache | PCIe lanes | Memory support | Socket | TDP | Release date | Price (USD) [lower-alpha 2] | ||||||
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Base | Boost | Arch- itecture | Cores [lower-alpha 3] | Clock (GHz) | L1 | L2 | L3 | |||||||||||
Ryzen 5 | 9600X | 6 (12) | 1 × CCD 1 × I/OD | 1 × 6 | 3.9 | 5.4 | RDNA 2 | 2 CUs 128:8:4:2 | 2.2 | 480 KB | 6 MB | 32 MB | 28 PCIe 5.0 | DDR5-5600 dual-channel | AM5 | 65 W | Jul 31, 2024 | TBA |
Ryzen 7 | 9700X | 8 (16) | 1 × 8 | 3.8 | 5.5 | 2.2 | 640 KB | 8 MB | 65 W | TBA | ||||||||
Ryzen 9 | 9900X | 12 (24) | 2 × CCD 1 × I/OD | 2 × 6 | 4.4 | 5.6 | 2.2 | 960 KB | 12 MB | 64 MB | 120 W | TBA | ||||||
9950X | 16 (32) | 2 × 8 | 4.3 | 5.7 | 2.2 | 1.25 MB | 16 MB | 170 W | TBA |
The Ryzen AI 300 series of high-performance ultrathin notebook processors were announced on June 3, 2024. Codenamed Strix Point, these processors are named under a new model numbering system similar to Intel's Core and Core Ultra model numbering. Strix Point will feature a 3rd gen Ryzen AI engine based on XDNA 2, providing up to 50 TOPS of neural processing unit performance. The integrated graphics is upgraded to RDNA 3.5, and top end models will have 16 CUs of GPU and 12 cores of CPU, an increase from the maximum of 8 CPU cores on previous generation Ryzen ultrathin mobile processors. [24] Notebooks featuring Ryzen AI 300 series processors will be released in July.
SKU | Cores (threads) | Arch- itecture(s) | Clock rate (GHz) | Graphics | NPU | Cache | Memory support | Socket | PCIe lanes | TDP | Release date | ||||||||
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Base | Boost | Arch- itecture | Model | Cores [lower-alpha 3] | Clock (GHz) | Arch- itecture | TOPS | L1 | L2 | L3 | Default (cTDP} | ||||||||
Ryzen AI 9 | 365 | 10 (20) | 4 × Zen 5 6 × Zen 5c | 2.0 | 5.0 | RDNA 3.5 | 880M | 12 CUs 768:48:24:12:24 | 2.9 | XDNA 2 | 50 | 800 KB | 10 MB | 24 MB | DDR5-5600 LPDDR5x-7500 | FP8 | 16 PCIe 4.0 | 28 W (15-45 W) | 2024 |
HX 370 | 12 (24) | 4 × Zen 5 8 × Zen 5c | 2.0 | 5.1 | 890M | 16 CUs 1024:64:32:16:32 | 2.9 | 960 KB | 12 MB |
Alongside Granite Ridge desktop and Strix Point mobile processors, the Epyc 9005 series of high-performance server processors, codenamed Turin, were also announced at Computex on June 3, 2024. It uses the same SP5 socket as the previous Epyc 9004 series processors, and will pack up to 128 cores and 256 threads on the top-end model. Turin will be built on a TSMC 4 nm process. [25]
A variant of Epyc 9005 using Zen 5c cores was also shown off at Computex. It will feature a maximum of 192 cores and 384 threads, and be manufactured on a 3 nm process. [25]
Zen 5c is a compact variant of the Zen 5 core, primarily targeted at hyperscale cloud compute server customers. [26] It will succeed the Zen 4c core.
Advanced Micro Devices, Inc. (AMD) is an American multinational corporation and semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets.
The transistor count is the number of transistors in an electronic device. It is the most common measure of integrated circuit complexity. The rate at which MOS transistor counts have increased generally follows Moore's law, which observes that transistor count doubles approximately every two years. However, being directly proportional to the area of a die, transistor count does not represent how advanced the corresponding manufacturing technology is. A better indication of this is transistor density which is the ratio of a semiconductor's transistor count to its die area.
AMD Accelerated Processing Unit (APU), formerly known as Fusion, is a series of 64-bit microprocessors from Advanced Micro Devices (AMD), combining a general-purpose AMD64 central processing unit (CPU) and 3D integrated graphics processing unit (IGPU) on a single die.
Zen is the codename for a family of computer processor microarchitectures from AMD, first launched in February 2017 with the first generation of its Ryzen CPUs. It is used in Ryzen, Ryzen Threadripper, and Epyc (server).
Zen is the codename for the first iteration in a family of computer processor microarchitectures of the same name from AMD. It was first used with their Ryzen series of CPUs in February 2017. The first Zen-based preview system was demonstrated at E3 2016, and first substantially detailed at an event hosted a block away from the Intel Developer Forum 2016. The first Zen-based CPUs, codenamed "Summit Ridge", reached the market in early March 2017, Zen-derived Epyc server processors launched in June 2017 and Zen-based APUs arrived in November 2017.
Zen 2 is a computer processor microarchitecture by AMD. It is the successor of AMD's Zen and Zen+ microarchitectures, and is fabricated on the 7 nm MOSFET node from TSMC. The microarchitecture powers the third generation of Ryzen processors, known as Ryzen 3000 for the mainstream desktop chips, Ryzen 4000U/H and Ryzen 5000U for mobile applications, as Threadripper 3000 for high-end desktop systems, and as Ryzen 4000G for accelerated processing units (APUs). The Ryzen 3000 series CPUs were released on 7 July 2019, while the Zen 2-based Epyc server CPUs were released on 7 August 2019. An additional chip, the Ryzen 9 3950X, was released in November 2019.
Ryzen is a brand of multi-core x86-64 microprocessors designed and marketed by Advanced Micro Devices (AMD) for desktop, mobile, server, and embedded platforms based on the Zen microarchitecture. It consists of central processing units (CPUs) marketed for mainstream, enthusiast, server, and workstation segments and accelerated processing units (APUs) marketed for mainstream and entry-level segments and embedded systems applications.
Zen+ is the codename for a computer processor microarchitecture by AMD. It is the successor to the first gen Zen microarchitecture, and was first released in April 2018, powering the second generation of Ryzen processors, known as Ryzen 2000 for mainstream desktop systems, Threadripper 2000 for high-end desktop setups and Ryzen 3000G for accelerated processing units (APUs).
Epyc is a brand of multi-core x86-64 microprocessors designed and sold by AMD, based on the company's Zen microarchitecture. Introduced in June 2017, they are specifically targeted for the server and embedded system markets.
The Radeon RX Vega series is a series of graphics processors developed by AMD. These GPUs use the Graphics Core Next (GCN) 5th generation architecture, codenamed Vega, and are manufactured on 14 nm FinFET technology, developed by Samsung Electronics and licensed to GlobalFoundries. The series consists of desktop graphics cards and APUs aimed at desktops, mobile devices, and embedded applications.
Socket SP3 is a zero insertion force land grid array CPU socket designed by AMD supporting its Zen-, Zen 2- and Zen 3-based Epyc server processors, launched on June 20, 2017. Because the socket is the same size as socket TR4 and socket sTRX4, users can use CPU coolers not only designed for SP3, but also coolers designed for TR4 and sTRX4.
Zen 4 is the codename for a CPU microarchitecture designed by AMD, released on September 27, 2022. It is the successor to Zen 3 and uses TSMC's N6 process for I/O dies, N5 process for CCDs, and N4 process for APUs. Zen 4 powers Ryzen 7000 performance desktop processors, Ryzen 8000G series mainstream desktop APUs, and Ryzen Threadripper 7000 series HEDT and workstation processors. It is also used in extreme mobile processors, thin & light mobile processors, as well as EPYC 8004/9004 server processors.
Zen 3 is the codename for a CPU microarchitecture by AMD, released on November 5, 2020. It is the successor to Zen 2 and uses TSMC's 7 nm process for the chiplets and GlobalFoundries's 14 nm process for the I/O die on the server chips and 12 nm for desktop chips. Zen 3 powers Ryzen 5000 mainstream desktop processors and Epyc server processors. Zen 3 is supported on motherboards with 500 series chipsets; 400 series boards also saw support on select B450 / X470 motherboards with certain BIOSes. Zen 3 is the last microarchitecture before AMD switched to DDR5 memory and new sockets, which are AM5 for the desktop "Ryzen" chips alongside SP5 and SP6 for the EPYC server platform and sTRX8. According to AMD, Zen 3 has a 19% higher instructions per cycle (IPC) on average than Zen 2.