Clock signal

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Clock signal and legend Clock signal.png
Clock signal and legend

In electronics and especially synchronous digital circuits, a clock signal (historically also known as logic beat [1] ) is an electronic logic signal (voltage or current) which oscillates between a high and a low state at a constant frequency and is used like a metronome to synchronize actions of digital circuits. In a synchronous logic circuit, the most common type of digital circuit, the clock signal is applied to all storage devices, flip-flops and latches, and causes them all to change state simultaneously, preventing race conditions.

Contents

A clock signal is produced by an electronic oscillator called a clock generator. The most common clock signal is in the form of a square wave with a 50% duty cycle. Circuits using the clock signal for synchronization may become active at either the rising edge, falling edge, or, in the case of double data rate, both in the rising and in the falling edges of the clock cycle.

Digital circuits

Most integrated circuits (ICs) of sufficient complexity use a clock signal in order to synchronize different parts of the circuit, cycling at a rate slower than the worst-case internal propagation delays. In some cases, more than one clock cycle is required to perform a predictable action. As ICs become more complex, the problem of supplying accurate and synchronized clocks to all the circuits becomes increasingly difficult. The preeminent example of such complex chips is the microprocessor, the central component of modern computers, which relies on a clock from a crystal oscillator. The only exceptions are asynchronous circuits such as asynchronous CPUs.

A clock signal might also be gated, that is, combined with a controlling signal that enables or disables the clock signal for a certain part of a circuit. This technique is often used to save power by effectively shutting down portions of a digital circuit when they are not in use, but comes at a cost of increased complexity in timing analysis.

Single-phase clock

Most modern synchronous circuits use only a "single phase clock" – in other words, all clock signals are (effectively) transmitted on 1 wire.

Two-phase clock

In synchronous circuits, a "two-phase clock" refers to clock signals distributed on 2 wires, each with non-overlapping pulses. Traditionally one wire is called "phase 1" or "φ1" (phi1), the other wire carries the "phase 2" or "φ2" signal. [2] [3] [4] [5] Because the two phases are guaranteed non-overlapping, gated latches rather than edge-triggered flip-flops can be used to store state information so long as the inputs to latches on one phase only depend on outputs from latches on the other phase. Since a gated latch uses only four gates versus six gates for an edge-triggered flip-flop, a two phase clock can lead to a design with a smaller overall gate count but usually at some penalty in design difficulty and performance.

Metal oxide semiconductor (MOS) ICs typically used dual clock signals (a two-phase clock) in the 1970s. These were generated externally for both the Motorola 6800 and Intel 8080 microprocessors. [6] The next generation of microprocessors incorporated the clock generation on chip. The 8080 uses a 2 MHz clock but the processing throughput is similar to the 1 MHz 6800. The 8080 requires more clock cycles to execute a processor instruction. The 6800 has a minimum clock rate of 100 kHz and the 8080 has a minimum clock rate of 500 kHz. Higher speed versions of both microprocessors were released by 1976. [7]

The 6501 requires an external 2-phase clock generator. The MOS Technology 6502 uses the same 2-phase logic internally, but also includes a two-phase clock generator on-chip, so it only needs a single phase clock input, simplifying system design.

4-phase clock

Some early integrated circuits use four-phase logic, requiring a four phase clock input consisting of four separate, non-overlapping clock signals. [8] This was particularly common among early microprocessors such as the National Semiconductor IMP-16, Texas Instruments TMS9900, and the Western Digital MCP-1600 chipset used in the DEC LSI-11.

Four phase clocks have only rarely been used in newer CMOS processors such as the DEC WRL MultiTitan microprocessor. [9] and in Intrinsity's Fast14 technology. Most modern microprocessors and microcontrollers use a single-phase clock.

Clock multiplier

Many modern microcomputers use a "clock multiplier" which multiplies a lower frequency external clock to the appropriate clock rate of the microprocessor. This allows the CPU to operate at a much higher frequency than the rest of the computer, which affords performance gains in situations where the CPU does not need to wait on an external factor (like memory or input/output).

Dynamic frequency change

The vast majority of digital devices do not require a clock at a fixed, constant frequency. As long as the minimum and maximum clock periods are respected, the time between clock edges can vary widely from one edge to the next and back again. Such digital devices work just as well with a clock generator that dynamically changes its frequency, such as spread-spectrum clock generation, dynamic frequency scaling, etc. Devices that use static logic do not even have a maximum clock period (or in other words, minimum clock frequency); such devices can be slowed and paused indefinitely, then resumed at full clock speed at any later time.

Other circuits

Some sensitive mixed-signal circuits, such as precision analog-to-digital converters, use sine waves rather than square waves as their clock signals, because square waves contain high-frequency harmonics that can interfere with the analog circuitry and cause noise. Such sine wave clocks are often differential signals, because this type of signal has twice the slew rate, and therefore half the timing uncertainty, of a single-ended signal with the same voltage range. Differential signals radiate less strongly than a single line. Alternatively, a single line shielded by power and ground lines can be used.

In CMOS circuits, gate capacitances are charged and discharged continually. A capacitor does not dissipate energy, but energy is wasted in the driving transistors. In reversible computing, inductors can be used to store this energy and reduce the energy loss, but they tend to be quite large. Alternatively, using a sine wave clock, CMOS transmission gates and energy-saving techniques, the power requirements can be reduced.[ citation needed ]

Distribution

The most effective way to get the clock signal to every part of a chip that needs it, with the lowest skew, is a metal grid. In a large microprocessor, the power used to drive the clock signal can be over 30% of the total power used by the entire chip. The whole structure with the gates at the ends and all amplifiers in between have to be loaded and unloaded every cycle. [10] [11] To save energy, clock gating temporarily shuts off part of the tree.

The clock distribution network (or clock tree, when this network forms a tree such as an H-tree) distributes the clock signal(s) from a common point to all the elements that need it. Since this function is vital to the operation of a synchronous system, much attention has been given to the characteristics of these clock signals and the electrical networks used in their distribution. Clock signals are often regarded as simple control signals; however, these signals have some very special characteristics and attributes.

Clock signals are typically loaded with the greatest fanout and operate at the highest speeds of any signal within the synchronous system. Since the data signals are provided with a temporal reference by the clock signals, the clock waveforms must be particularly clean and sharp. Furthermore, these clock signals are particularly affected by technology scaling (see Moore's law), in that long global interconnect lines become significantly more resistive as line dimensions are decreased. This increased line resistance is one of the primary reasons for the increasing significance of clock distribution on synchronous performance. Finally, the control of any differences and uncertainty in the arrival times of the clock signals can severely limit the maximum performance of the entire system and create catastrophic race conditions in which an incorrect data signal may latch within a register.

Most synchronous digital systems consist of cascaded banks of sequential registers with combinational logic between each set of registers. The functional requirements of the digital system are satisfied by the logic stages. Each logic stage introduces delay that affects timing performance, and the timing performance of the digital design can be evaluated relative to the timing requirements by a timing analysis. Often special consideration must be made to meet the timing requirements. For example, the global performance and local timing requirements may be satisfied by the careful insertion of pipeline registers into equally spaced time windows to satisfy critical worst-case timing constraints . The proper design of the clock distribution network helps ensure that critical timing requirements are satisfied and that no race conditions exist (see also clock skew).

The delay components that make up a general synchronous system are composed of the following three individual subsystems: the memory storage elements, the logic elements, and the clocking circuitry and distribution network.

Novel structures are currently under development to ameliorate these issues and provide effective solutions. Important areas of research include resonant clocking techniques ("resonant clock mesh"), [12] [13] [14] [15] on-chip optical interconnect, and local synchronization methodologies.

See also

Related Research Articles

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The Intel 8080 ("eighty-eighty") is the second 8-bit microprocessor designed and manufactured by Intel. It first appeared in April 1974 and is an extended and enhanced variant of the earlier 8008 design, although without binary compatibility. The initial specified clock rate or frequency limit was 2 MHz, with common instructions using 4, 5, 7, 10, or 11 cycles. As a result, the processor is able to execute several hundred thousand instructions per second. Two faster variants, the 8080A-1 and 8080A-2, became available later with clock frequency limits of 3.125 MHz and 2.63 MHz respectively. The 8080 needs two support chips to function in most applications: the i8224 clock generator/driver and the i8228 bus controller. It is implemented in N-type metal–oxide–semiconductor logic (NMOS) using non-saturated enhancement mode transistors as loads thus demanding a +12 V and a −5 V voltage in addition to the main transistor–transistor logic (TTL) compatible +5 V.

<span class="mw-page-title-main">Intel 8086</span> 16-bit microprocessor

The 8086 is a 16-bit microprocessor chip designed by Intel between early 1976 and June 8, 1978, when it was released. The Intel 8088, released July 1, 1979, is a slightly modified chip with an external 8-bit data bus, and is notable as the processor used in the original IBM PC design.

<span class="mw-page-title-main">Microprocessor</span> Computer processor contained on an integrated-circuit chip

A microprocessor is a computer processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, and control circuitry required to perform the functions of a computer's central processing unit (CPU). The IC is capable of interpreting and executing program instructions and performing arithmetic operations. The microprocessor is a multipurpose, clock-driven, register-based, digital integrated circuit that accepts binary data as input, processes it according to instructions stored in its memory, and provides results as output. Microprocessors contain both combinational logic and sequential digital logic, and operate on numbers and symbols represented in the binary number system.

<span class="mw-page-title-main">Motorola 6800</span> 8-bit microprocessor

The 6800 is an 8-bit microprocessor designed and first manufactured by Motorola in 1974. The MC6800 microprocessor was part of the M6800 Microcomputer System that also included serial and parallel interface ICs, RAM, ROM and other support chips. A significant design feature was that the M6800 family of ICs required only a single five-volt power supply at a time when most other microprocessors required three voltages. The M6800 Microcomputer System was announced in March 1974 and was in full production by the end of that year.

<span class="mw-page-title-main">Motorola 6809</span> 8-bit microprocessor

The Motorola 6809 ("sixty-eight-oh-nine") is an 8-bit microprocessor with some 16-bit features. It was designed by Motorola's Terry Ritter and Joel Boney and introduced in 1978. Although source compatible with the earlier Motorola 6800, the 6809 offered significant improvements over it and 8-bit contemporaries like the MOS Technology 6502, including a hardware multiplication instruction, 16-bit arithmetic, system and user stack registers allowing re-entrant code, improved interrupts, position-independent code and an orthogonal instruction set architecture with a comprehensive set of addressing modes.

<span class="mw-page-title-main">Zilog Z80</span> 8-bit microprocessor

The Z80 is an 8-bit microprocessor introduced by Zilog as the startup company's first product. The Z80 was conceived by Federico Faggin in late 1974 and developed by him and his 11 employees starting in early 1975, before going on sale in July 1976. The processor is a software-compatible with the Intel 8080 but with several enhancements and at a lower price. Like the 8080, the Z80 was mainly aimed at embedded systems, but it became one of the most widely used CPUs in home computers of the late 1970s and early 1980s. The Zilog Z80 was also common in military applications, musical equipment, and coin-operated arcade games of the era, including Pac-Man.

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In automata theory, sequential logic is a type of logic circuit whose output depends on the present value of its input signals and on the sequence of past inputs, the input history. This is in contrast to combinational logic, whose output is a function of only the present input. That is, sequential logic has state (memory) while combinational logic does not.

<span class="mw-page-title-main">Intel 8085</span> 8-bit microprocessor by Intel

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In digital electronics, a synchronous circuit is a digital circuit in which the changes in the state of memory elements are synchronized by a clock signal. In a sequential digital logic circuit, data is stored in memory devices called flip-flops or latches. The output of a flip-flop is constant until a pulse is applied to its "clock" input, upon which the input of the flip-flop is latched into its output. In a synchronous logic circuit, an electronic oscillator called the clock generates a string (sequence) of pulses, the "clock signal". This clock signal is applied to every storage element, so in an ideal synchronous circuit, every change in the logical levels of its storage components is simultaneous. Ideally, the input to each storage element has reached its final value before the next clock occurs, so the behaviour of the whole circuit can be predicted exactly. Practically, some delay is required for each logical operation, resulting in a maximum speed limitations at which each synchronous system can run.

Asynchronous circuit is a sequential digital logic circuit that does not use a global clock circuit or signal generator to synchronize its components. Instead, the components are driven by a handshaking circuit which indicates a completion of a set of instructions. Handshaking works by simple data transfer protocols. Many synchronous circuits were developed in early 1950s as part of bigger asynchronous systems. Asynchronous circuits and theory surrounding is a part of several steps in integrated circuit design, a field of digital electronics engineering.

<span class="mw-page-title-main">Metastability (electronics)</span> Ability of a digital electronic system to remain in unstable equilibrium forever

In electronics, metastability is the ability of a digital electronic system to persist for an unbounded time in an unstable equilibrium or metastable state. In digital logic circuits, a digital signal is required to be within certain voltage or current limits to represent a '0' or '1' logic level for correct circuit operation; if the signal is within a forbidden intermediate range it may cause faulty behavior in logic gates the signal is applied to. In metastable states, the circuit may be unable to settle into a stable '0' or '1' logic level within the time required for proper circuit operation. As a result, the circuit can act in unpredictable ways, and may lead to a system failure, sometimes referred to as a "glitch". Metastability is an instance of the Buridan's ass paradox.

In integrated circuit design, dynamic logic is a design methodology in combinational logic circuits, particularly those implemented in metal–oxide–semiconductor (MOS) technology. It is distinguished from the so-called static logic by exploiting temporary storage of information in stray and gate capacitances. It was popular in the 1970s and has seen a recent resurgence in the design of high-speed digital electronics, particularly central processing units (CPUs). Dynamic logic circuits are usually faster than static counterparts and require less surface area, but are more difficult to design. Dynamic logic has a higher average rate of voltage transitions than static logic, but the capacitive loads being transitioned are smaller so the overall power consumption of dynamic logic may be higher or lower depending on various tradeoffs. When referring to a particular logic family, the dynamic adjective usually suffices to distinguish the design methodology, e.g. dynamic CMOS or dynamic SOI design.

In digital electronic design a clock domain crossing (CDC), or simply clock crossing, is the traversal of a signal in a synchronous digital circuit from one clock domain into another. If a signal does not assert long enough and is not registered, it may appear asynchronous on the incoming clock boundary.

<span class="mw-page-title-main">History of general-purpose CPUs</span>

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Four-phase logic is a type of, and design methodology for dynamic logic. It enabled non-specialist engineers to design quite complex ICs, using either PMOS or NMOS processes. It uses a kind of 4-phase clock signal.

<span class="mw-page-title-main">Flip-flop (electronics)</span> Electronic circuit with two stable states

In electronics, flip-flops and latches are circuits that have two stable states that can store state information – a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will output its state. It is the basic storage element in sequential logic. Flip-flops and latches are fundamental building blocks of digital electronics systems used in computers, communications, and many other types of systems.

References

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  2. Two-phase clock Archived November 9, 2007, at the Wayback Machine
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  10. Anand Lal Shimpi (2008), Intel's Atom Architecture: The Journey Begins
  11. Paul V. Bolotoff (2007), Alpha: The history in facts and comments, archived from the original on 2012-02-18, retrieved 2012-01-03, power consumed by the clock subsystem of EV6 was about 32% of the total core power. To compare, it was about 25% for EV56, about 37% for EV5 and about 40% for EV4.
  12. Chan, S. C.; Shepard, K. L.; Restle, P. J. (2005). "Uniform-phase uniform-amplitude resonant-load global clock distributions". IEEE Journal of Solid-State Circuits. 40 (1): 102. Bibcode:2005IJSSC..40..102C. doi:10.1109/JSSC.2004.838005. S2CID   16239014.
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Further reading


Adapted from Eby Friedman Archived 2014-08-12 at the Wayback Machine 's column in the ACM SIGDA e-newsletter by Igor Markov
Original text is available at https://web.archive.org/web/20100711135550/http://www.sigda.org/newsletter/2005/eNews_051201.html