Autonomous peripheral operation

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In computing, autonomous peripheral operation is a hardware feature found in some microcontroller architectures to off-load certain tasks into embedded autonomous peripherals in order to minimize latencies and improve throughput in hard real-time applications as well as to save energy in ultra-low-power designs.

Contents

Overview

Forms of autonomous peripherals in microcontrollers were first introduced in the 1990s. Allowing embedded peripherals to work independently of the CPU and even interact with each other in certain pre-configurable ways off-loads event-driven communication into the peripherals to help improve the real-time performance due to lower latency and allows for potentially higher data throughput due to the added parallelism. Since 2009, the scheme has been improved in newer implementations to continue functioning in sleep modes as well, thereby allowing the CPU (and other unaffected peripheral blocks) to remain dormant for longer periods of time in order to save energy. This is partially driven by the emerging IoT market. [1]

Conceptually, autonomous peripheral operation can be seen as a generalization of and mixture between direct memory access (DMA) and hardware interrupts. Peripherals that issue event signals are called event generators or producers whereas target peripherals are called event users or consumers. In some implementations, peripherals can be configured to pre-process the incoming data and perform various peripheral-specific functions like comparing, windowing, filtering or averaging in hardware without having to pass the data through the CPU for processing.

Implementations

Known implementations include:

See also

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References

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  3. ↑ User's Manual - C167CR Derivatives - 16-Bit Single-Chip Microcontroller (PDF). 3.1 (2000-03 ed.). Munich, Germany: Infineon Technologies AG. March 2000 [2000-02, 1999-03, 1996-03, 1994-08, 1992-07]. Archived (PDF) from the original on 2020-10-27. Retrieved 2021-12-02.{{cite book}}: |work= ignored (help) (NB. Discusses an autonomously operating built-in CAN controller and a "Peripheral Event Controller" (PEC).)
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  5. ↑ Irber, Alfred (Summer 2018) [2016-02-25, 2009-09-25]. Embedded Systems SS2018 (PDF). 2.0 (in German). Munich, Germany: FH München - Hochschule für angewandte Wissenschaften, Fakultät für Elektrotechnik und Informationstechnik. pp. 1, 17, 28, 37–40. ES. Archived (PDF) from the original on 2021-12-02. Retrieved 2021-12-02.
  6. ↑ "XC800 Product Presentation - Capture Compare Unit CC6" (PDF). Infineon. May 2006. XC886 CC6 V1. Archived (PDF) from the original on 2018-05-10. Retrieved 2018-05-10. […] Drives need realtime performance – control loop must run faster than 2-4 PWM periods (e.g. 100-200us) – CPU performance is valuable and must be saved for key tasks – Question: How to offload the CPU? –Answer: Build intelligent and autonomous peripherals! […] CC6 in a Drive application: – generate PWM patterns for all kind of motors – operate always in a safe state – even in an error condition – interact with ADC for sensorless control of motors […] CC6 is used intensively – the more it works autonomous the more CPU load can be saved for control algorithms […]
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  12. 1 2 3 "Raising Performance Without Breaking the Power Budget". Digikey. 2013-07-10. Archived from the original on 2018-05-02. Retrieved 2018-05-01.
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  29. ↑ Di Jasio, Lucio (2015-05-12). "There is nothing left to be invented in embedded control, Part 2". Archived from the original on 2018-05-01. Retrieved 2018-05-01.
  30. ↑ "Peripherals interconnections on ST M32F405/7xx, STM32F415/7xx, STM32F42xxx, STM32F43xxx, STM32F446xx and STM32F469/479xx" (PDF) (Application note). STMicroelectronics. AN4640. Archived (PDF) from the original on 2018-05-01. Retrieved 2018-05-01.
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