Elmore delay [1] is a simple approximation to the delay through an RC network in an electronic system. It is often used in applications such as logic synthesis, delay calculation, static timing analysis, placement and routing, since it is simple to compute (especially in tree structured networks, which are the vast majority of signal nets within ICs) and is reasonably accurate. Even where it is not accurate, it is usually faithful, in the sense that reducing the Elmore delay will almost always reduce the true delay, so it is still useful in optimization.
In electronics, logic synthesis is a process by which an abstract specification of desired circuit behavior, typically at register transfer level (RTL), is turned into a design implementation in terms of logic gates, typically by a computer program called a synthesis tool. Common examples of this process include synthesis of designs specified in hardware description languages, including VHDL and Verilog. Some synthesis tools generate bitstreams for programmable logic devices such as PALs or FPGAs, while others target the creation of ASICs. Logic synthesis is one aspect of electronic design automation.
Delay calculation is the term used in integrated circuit design for the calculation of the gate delay of a single logic gate and the wires attached to it. By contrast, static timing analysis computes the delays of entire paths, using delay calculation to determine the delay of each gate and wire.
Static timing analysis (STA) is a simulation method of computing the expected timing of a digital circuit without requiring a simulation of the full circuit.
Elmore delay can be thought of in several ways, all mathematically identical.
Capacitance is the ratio of the change in an electric charge in a system to the corresponding change in its electric potential. There are two closely related notions of capacitance: self capacitance and mutual capacitance. Any object that can be electrically charged exhibits self capacitance. A material with a large self capacitance holds more electric charge at a given voltage than one with low capacitance. The notion of mutual capacitance is particularly important for understanding the operations of the capacitor, one of the three elementary linear electronic components.
In packet switching networks, traffic flow, packet flow or network flow is a sequence of packets from a source computer to a destination, which may be another host, a multicast group, or a broadcast domain. RFC 2722 defines traffic flow as "an artificial logical equivalent to a call or connection." RFC 3697 defines traffic flow as "a sequence of packets sent from a particular source to a particular unicast, anycast, or multicast destination that the source desires to label as a flow. A flow could consist of all packets in a specific transport connection or a media stream. However, a flow is not necessarily 1:1 mapped to a transport connection." Flow is also defined in RFC 3917 as "a set of IP packets passing an observation point in the network during a certain time interval."
In mathematics a Padé approximant is the 'best' approximation of a function by a rational function of given order – under this technique, the approximant's power series agrees with the power series of the function it is approximating. The technique was developed around 1890 by Henri Padé, but goes back to Georg Frobenius who introduced the idea and investigated the features of rational approximations of power series.
There are many extensions to Elmore delay. It can be extended to upper and lower bounds, [2] to include inductance as well as R and C, to be more accurate (higher order approximations) [3] and so on. See delay calculation for more details and references.
In electromagnetism and electronics, inductance describes the tendency of an electrical conductor, such as coil, to oppose a change in the electric current through it. When an electric current flows through a conductor, it creates a magnetic field around that conductor. A changing current, in turn, creates a changing magnetic field. From Faraday's law of induction, any change in total magnetic field through a circuit induces an electromotive force (voltage) across that circuit, a phenomenon known as electromagnetic induction. From Lenz's law, this induced voltage, or "back EMF" in a circuit, will be in a direction so as to oppose the change in current which created it. So changes in current through a conductor will react back on the conductor itself through its magnetic field, creating a reverse voltage which will oppose any change to the current. Inductance, , is defined as the ratio between this induced voltage, , and the rate of change of the current in the circuit.
William Cronk Elmore was an American physicist, educator, and author who is best known for his work on and related to the Manhattan project during World War II and as a professor of Physics at Swarthmore College, PA from 1938 to 1974. Bill Elmore authored two influential books during his life, Electronics-Experimental Techniques with Matthew Sands and the Physics of Waves with Mark Heald. He is also known for deriving a simple approximation for the delay through an RC network, known as the Elmore delay.
An electrical network is an interconnection of electrical components or a model of such an interconnection, consisting of electrical elements. An electrical circuit is a network consisting of a closed loop, giving a return path for the current. Linear electrical networks, a special type consisting only of sources, linear lumped elements, and linear distributed elements, have the property that signals are linearly superimposable. They are thus more easily analyzed, using powerful frequency domain methods such as Laplace transforms, to determine DC response, AC response, and transient response.
Electrical impedance is the measure of the opposition that a circuit presents to a current when a voltage is applied. The term complex impedance may be used interchangeably.
A low-pass filter (LPF) is a filter that passes signals with a frequency lower than a selected cutoff frequency and attenuates signals with frequencies higher than the cutoff frequency. The exact frequency response of the filter depends on the filter design. The filter is sometimes called a high-cut filter, or treble-cut filter in audio applications. A low-pass filter is the complement of a high-pass filter.
In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.
In physics and engineering the quality factor or Q factor is a dimensionless parameter that describes how underdamped an oscillator or resonator is, and characterizes a resonator's bandwidth relative to its centre frequency. Higher Q indicates a lower rate of energy loss relative to the stored energy of the resonator; the oscillations die out more slowly. A pendulum suspended from a high-quality bearing, oscillating in air, has a high Q, while a pendulum immersed in oil has a low one. Resonators with high quality factors have low damping, so that they ring or vibrate longer.
A resistor–capacitor circuit, or RC filter or RC network, is an electric circuit composed of resistors and capacitors driven by a voltage or current source. A first order RC circuit is composed of one resistor and one capacitor and is the simplest type of RC circuit.
The lumped element model simplifies the description of the behaviour of spatially distributed physical systems into a topology consisting of discrete entities that approximate the behaviour of the distributed system under certain assumptions. It is useful in electrical systems, mechanical multibody systems, heat transfer, acoustics, etc.
The RC time constant, also called tau, the time constant of an RC circuit, is equal to the product of the circuit resistance and the circuit capacitance, i.e.
A network, in the context of electronics, is a collection of interconnected components. Network analysis is the process of finding the voltages across, and the currents through, all network components. There are many techniques for calculating these values. However, for the most part, the techniques assume linear components. Except where stated, the methods described in this article are applicable only to linear network analysis.
In electronics, when describing a voltage or current step function, rise time is the time taken by a signal to change from a specified low value to a specified high value. These values may be expressed as ratios or, equivalently, as percentages with respect to a given reference value. In analog electronics or digital electronics, these percentages are commonly the 10% and 90% of the output step height: however, other values are commonly used. For applications in control theory, according to Levine, rise time is defined as "the time required for the response to rise from x% to y% of its final value", with 0% to 100% rise time common for underdamped second order systems, 5% to 95% for critically damped and 10% to 90% for overdamped ones. According to Orwiler, the term "rise time" applies to either positive or negative step response, even if a displayed negative excursion is popularly termed fall time.
In electrical engineering and science, an equivalent circuit refers to a theoretical circuit that retains all of the electrical characteristics of a given circuit. Often, an equivalent circuit is sought that simplifies calculation, and more broadly, that is a simplest form of a more complex circuit in order to aid analysis. In its most common form, an equivalent circuit is made up of linear, passive elements. However, more complex equivalent circuits are used that approximate the nonlinear behavior of the original circuit as well. These more complex circuits often are called macromodels of the original circuit. An example of a macromodel is the Boyle circuit for the 741 operational amplifier.
Linear electronic oscillator circuits, which generate a sinusoidal output signal, are composed of an amplifier and a frequency selective element, a filter. A linear oscillator circuit which uses an RC network, a combination of resistors and capacitors, for its frequency selective part is called an RC oscillator.
Standard Parasitic Exchange Format (SPEF) is an IEEE standard for representing parasitic data of wires in a chip in ASCII format. Non-ideal wires have parasitic resistance and capacitance that are captured by SPEF. These wires also have inductance that is not included in SPEF. SPEF is used for delay calculation and ensuring signal integrity of a chip which eventually determines its speed of operation.
Timing closure is the process by which a logic design consisting of primitive elements such as combinatorial logic gates and sequential logic gates is modified to meet its timing requirements. Unlike in a computer program where there is no explicit delay to perform a calculation, logic circuits have intrinsic and well defined delays to propagate inputs to outputs. In simple cases, the user can compute the path delay between elements manually. If the design is more than a dozen or so elements this is impractical. For example, the time delay along a path from the output of a D-Flip Flop, through combinatorial logic gates, then into the next D-Flip Flop input must satisfy the time period between synchronizing clock pulses to the two flip flops. When the delay through the elements is greater than the clock cycle time, the elements are said to be on the critical path. The circuit will not function when the path delay exceeds the clock cycle delay so modifying the circuit to remove the timing failure is an important part of the logic design engineer's task.
In electrical systems, a static relay is a type of relay, an electrically operated switch, that has no moving parts. Static relays are contrasted with electromechanical relays, which use moving parts to create a switching action. Both types of relay control electrical circuits through a switch that is open or closed depending upon an electrical input.
Analogue filters are a basic building block of signal processing much used in electronics. Amongst their many applications are the separation of an audio signal before application to bass, mid-range and tweeter loudspeakers; the combining and later separation of multiple telephone conversations onto a single channel; the selection of a chosen radio station in a radio receiver and rejection of others.
In electronic design automation, parasitic extraction is calculation of the parasitic effects in both the designed devices and the required wiring interconnects of an electronic circuit: parasitic capacitances, parasitic resistances and parasitic inductances, commonly called parasitic devices, parasitic components, or simply parasitics.
Lattice and bridged-T equalizers are circuits which are used to correct for the amplitude and/or phase errors of a network or transmission line. Usually, the aim is to achieve an overall system performance with a flat amplitude response and constant delay over a prescribed frequency range, by the addition of an equalizer. In the past, designers have used a variety of techniques to realize their equalizer circuits. These include the method of complementary networks; the method of straight line asymptotes; using a purpose built test-jig; the use of standard circuit building blocks,; or with the aid of computer programs. In addition, trial and error methods have been found to be surprisingly effective, when performed by an experienced designer.