Design firm | Lattice Semiconductor |
---|---|
Type | Series of programmable-logic devices |
The GAL22V10 is a series of programmable-logic devices from Lattice Semiconductor, implemented as CMOS-based generic array logic ICs, and available in dual inline packages or plastic leaded chip carriers. It is an example of a standard production GAL device that is often used in educational settings as a basic programmable-logic device. [1] [2] [3] In combinatorial mode, it is conceptually a group of programmable AND-OR-invert (AOI) (AND-NOR) gates or AND-OR gates.
The GAL22V10 has 12 input pins, and 10 pins that can be configured as either inputs or outputs, and exists in various switching speeds, from 25 to 4 ns. [1] [2] [4] Each output is driven by an output-logic macrocell (OLMC), with an output-enable product term, and a variable number of product terms, ranging from eight to sixteen. Each OLMC may be set to output as inverting or non-inverting, and be placed into either registered or combinatorial mode. In registered mode, each macrocell actively uses a D-flip-flop to hold a state under control of the data input from the logic portion of the macrocell and the rising edge of the clock signal, while in combinatorial mode the flip-flop is removed from the macrocell and the outputs are driven directly by the logic. In the latter mode, the pin may also dynamically switch between input and output based on the product term. In either mode the pin value is fed back into the array as a product term. Combinations are set using an E2PROM. [3] The output registers can be preloaded into a potentially invalid state for testing by a GAL22V10 programmer. Inputs and outputs include active pull-ups and are transistor-transistor logic compatible due to high-impedance buffers. [5]
A user electronic signature section is included for details such as user ID codes, revision IDs, or asset tagging on official Lattice Semiconductor units, as well as a static ES section for compatibility with non-Lattice Semiconductor GAL22V10 units. In addition, a security cell is included which, when set, disallows the retrieval of the array logic from the chip, until a new set of logic is set.
Latch-up protection is implemented using n-pullups and a charge pump in the official Lattice Semiconductor models.
The GAL22V10D had been discontinued by Lattice Semiconductor as of June 2010 with the last shipment in June 2011. No pin-compatible replacements have been offered or recommended by Lattice for this PLD. [6] However, other pin-compatible alternatives exist from other manufacturers (e.g. Atmel ATF22V10).
A field-programmable gate array (FPGA) is a type of configurable integrated circuit that can be programmed or reprogrammed after manufacturing. FPGAs are part of a broader set of logic devices referred to as programmable logic devices (PLDs). They consist of an array of programmable logic blocks and interconnects that can be configured to perform various digital functions. FPGAs are commonly used in applications where flexibility, speed, and parallel processing capabilities are required, such as in telecommunications, automotive, aerospace, and industrial sectors.
Transistor–transistor logic (TTL) is a logic family built from bipolar junction transistors. Its name signifies that transistors perform both the logic function and the amplifying function, as opposed to earlier resistor–transistor logic (RTL) and diode–transistor logic (DTL).
A programmable logic device (PLD) is an electronic component used to build reconfigurable digital circuits. Unlike digital logic constructed using discrete logic gates with fixed functions, the function of a PLD is undefined at the time of manufacture. Before the PLD can be used in a circuit it must be programmed to implement the desired function. Compared to fixed logic devices, programmable logic devices simplify the design of complex logic and may offer superior performance. Unlike for microprocessors, programming a PLD changes the connections made between the gates in the device.
AVR is a family of microcontrollers developed since 1996 by Atmel, acquired by Microchip Technology in 2016. These are modified Harvard architecture 8-bit RISC single-chip microcontrollers. AVR was one of the first microcontroller families to use on-chip flash memory for program storage, as opposed to one-time programmable ROM, EPROM, or EEPROM used by other microcontrollers at the time.
In digital logic, an inverter or NOT gate is a logic gate which implements logical negation. It outputs a bit opposite of the bit that is put into it. The bits are typically implemented as two differing voltage levels.
The 7400 series is a popular logic family of transistor–transistor logic (TTL) integrated circuits (ICs).
The 555 timer IC is an integrated circuit used in a variety of timer, delay, pulse generation, and oscillator applications. It is one of the most popular timing ICs due to its flexibility and price. Derivatives provide two or four timing circuits in one package. The design was first marketed in 1972 by Signetics and used bipolar junction transistors. Since then, numerous companies have made the original timers and later similar low-power CMOS timers. In 2017, it was said that over a billion 555 timers are produced annually by some estimates, and that the design was "probably the most popular integrated circuit ever made".
Programmable Array Logic (PAL) is a family of programmable logic device semiconductors used to implement logic functions in digital circuits that was introduced by Monolithic Memories, Inc. (MMI) in March 1978. MMI obtained a registered trademark on the term PAL for use in "Programmable Semiconductor Logic Circuits". The trademark is currently held by Lattice Semiconductor.
A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The main building block of the CPLD is a macrocell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations.
The Intel 8253 and 8254 are programmable interval timers (PITs), which perform timing and counting functions using three 16-bit counters.
The Generic Array Logic device was an innovation of the PAL and was invented by Lattice Semiconductor. The GAL was an improvement on the PAL because one device type was able to take the place of many PAL device types or could even have functionality not covered by the original range of PAL devices. Its primary benefit, however, was that it was erasable and re-programmable, making prototyping and design changes easier for engineers.
The XNOR gate is a digital logic gate whose function is the logical complement of the Exclusive OR (XOR) gate. It is equivalent to the logical connective from mathematical logic, also known as the material biconditional. The two-input version implements logical equality, behaving according to the truth table to the right, and hence the gate is sometimes called an "equivalence gate". A high output (1) results if both of the inputs to the gate are the same. If one but not both inputs are high (1), a low output (0) results.
Atmel ARM-based processors are microcontrollers and microprocessors integrated circuits, by Microchip Technology, that are based on various 32-bit ARM processor cores, with in-house designed peripherals and tool support.
The Intel 8255 Programmable Peripheral Interface (PPI) chip was developed and manufactured by Intel in the first half of the 1970s for the Intel 8080 microprocessor. The 8255 provides 24 parallel input/output lines with a variety of programmable operating modes.
A simple programmable logic device (SPLD) is a programmable logic device with complexity below that of a complex programmable logic device (CPLD).
The Mitsubishi 740, also known as MELPS 740, is a series of 8-bit CMOS microcontrollers and microprocessors with an enhanced MOS Technology 6502 compatible core based on the expanded WDC 65C02. The ICs were manufactured by Mitsubishi Electric during the 1980s and 1990s.
The following outline is provided as an overview of and topical guide to electronics:
iCE is the brand name used for a family of low-power field-programmable gate arrays (FPGAs) produced by Lattice Semiconductor. Parts in the family are marketed with the "world's smallest FPGA" tagline, and are intended for use in portable and battery-powered devices, where they would be used to offload tasks from the device's main processor or system on chip. By doing so, the main processor and its peripherals can enter a low-power state or be powered off entirely, potentially increasing battery life.