EEPROM

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A cross section of legacy EPROM structure. Upper insulator: ONO Lower insulator: tunnel oxide Floating gate transistor-en.svg
A cross section of legacy EPROM  structure.
Upper insulator: ONO
Lower insulator:  tunnel   oxide
STMicro M24C02 I2C serial type EEPROM AT24C02 EEPROM 1480355 6 7 HDR Enhancer.jpg
STMicro M24C02 I²C serial type EEPROM
Atmel AT93C46A die ATMEL048 93C46A SC.jpg
Atmel AT93C46A die
AT90USB162 MCU integrates 512 Byte EEPROM Atmel-avr-atusb162-HD.jpg
AT90USB162 MCU integrates 512 Byte EEPROM

EEPROM or E2PROM (electrically erasable programmable read-only memory) is a type of non-volatile memory. It is used in computers, usually integrated in microcontrollers such as smart cards and remote keyless systems, or as a separate chip device, to store relatively small amounts of data by allowing individual bytes to be erased and reprogrammed.

Contents

EEPROMs are organized as arrays of floating-gate transistors. EEPROMs can be programmed and erased in-circuit, by applying special programming signals. Originally, EEPROMs were limited to single-byte operations, which made them slower, but modern EEPROMs allow multi-byte page operations. An EEPROM has a limited life for erasing and reprogramming, reaching a million operations in modern EEPROMs. In an EEPROM that is frequently reprogrammed, the life of the EEPROM is an important design consideration.

Flash memory is a type of EEPROM designed for high speed and high density, at the expense of large erase blocks (typically 512 bytes or larger) and limited number of write cycles (often 10,000). There is no clear boundary dividing the two, but the term "EEPROM" is generally used to describe non-volatile memory with small erase blocks (as small as one byte) and a long lifetime (typically 1,000,000 cycles). Many past microcontrollers included both (flash memory for the firmware and a small EEPROM for parameters), though the trend with modern microcontrollers is to emulate EEPROM using flash.

As of 2020, flash memory costs much less than byte-programmable EEPROM and is the dominant memory type wherever a system requires a significant amount of non-volatile solid-state storage. EEPROMs, however, are still used on applications that only require small amounts of storage, like in serial presence detect. [1] [2]

History

Charging mechanism of today's NOR-type FLASH memory cell. A = 10 m. Flash-Programming.svg
Charging mechanism of today's NOR-type FLASH memory cell. Å = 10 m.
Discharging mechanism of today's NOR-type FLASH memory cell Flash erase.svg
Discharging mechanism of today's NOR-type FLASH memory cell

Early attempts

In the early 1970s, some studies, inventions, and development for electrically re-programmable non-volatile memories were performed by various companies and organizations.

In 1971, early research was presented at the 3rd Conference on Solid State Devices, Tokyo in Japan by Yasuo Tarui, Yutaka Hayashi, and Kiyoko Nagai at Electrotechnical Laboratory ; a Japanese national research institute. [3] They fabricated an electrically re-programmable non-volatile memory in 1972, [4] [5] [6] and continued this study for more than 10 years. [7] However this early memory depended on capacitors to work, [4] which modern EEPROM lacks.

In 1972 IBM patented an electrically re-programmable non-volatile memory invention. [8] Later that year, an avalanche injection type MOS was patented by Fujio Masuoka, the inventor of flash memory, at Toshiba [9] and IBM patented another later that year. [10]

In 1974, NEC patented a electrically erasable carrier injection device. [11] The next year, NEC applied for the trademark "EEPROM®" with the Japan Patent Office. The trademark was granted in 1978. [12] [13]

The theoretical basis of these devices is avalanche hot-carrier injection. In general, programmable memories, including EPROM, of early 1970s had reliability and endurance problems such as the data retention periods and the number of erase/write cycles. [14]

Most of the major semiconductor manufactures, such as Toshiba, [9] [5] Sanyo (later, ON Semiconductor), [15] IBM, [16] Intel, [17] [18] NEC (later, Renesas Electronics), [19] Philips (later, NXP Semiconductors), [20] Siemens (later, Infineon Technologies), [21] Honeywell (later, Atmel), [22] Texas Instruments, [23] studied, invented, and manufactured some electrically re-programmable non-volatile devices until 1977.

Modern EEPROM

The first EEPROM that used Fowler-Nordheim tunnelling to erase data was invented by Bernward and patented by Siemens in 1974. [24] In February 1977, Israeli-American Eliyahou Harari at Hughes Aircraft Company patented in the US a modern EEPROM technology, based on Fowler-Nordheim tunnelling through a thin silicon dioxide layer between the floating-gate and the wafer. Hughes went on to produce this new EEPROM devices. [25]

In May 1977, some important research result was disclosed by Fairchild and Siemens. They used SONOS (polysilicon-oxynitride-nitride-oxide-silicon) structure with thickness of silicon dioxide less than 30 Å, and SIMOS (stacked-gate injection MOS) structure, respectively, for using Fowler-Nordheim tunnelling hot-carrier injection. [26] [27]

Around 1976 to 1978, Intel's team, including George Perlegos, made some inventions to improve this tunneling E2PROM technology. [28] [29] In 1978, they developed a 16K (2K word × 8) bit Intel 2816 chip with a thin silicon dioxide layer, which was less than 200 Å. [30] In 1980, this structure was publicly introduced as FLOTOX; floating gate tunnel oxide. [31] The FLOTOX structure improved reliability of erase/write cycles per byte up to 10,000 times. [32] But this device required additional 20–22V VPP bias voltage supply for byte erase, except for 5V read operations. [33] : 5–86  In 1981, Perlegos and 2 other members left Intel to form Seeq Technology, [34] which used on-device charge pumps to supply the high voltages necessary for programming E2PROMs. In 1984, Perlogos left Seeq Technology to found Atmel, then Seeq Technology was acquired by Atmel. [35] [36]

Electrically alterable read-only memory (EAROM) is a type of EEPROM that can be modified one or a few bits at a time. [37] Writing is a very slow process and again needs higher voltage (usually around 12 V) than is used for read access. EAROMs are intended for applications that require infrequent and only partial rewriting.

Theoretical basis of FLOTOX structure

As is described in former section, old EEPROMs are based on avalanche breakdown-based hot-carrier injection with high reverse breakdown voltage. But FLOTOX theoretical basis is Fowler–Nordheim tunneling hot-carrier injection through a thin silicon dioxide layer between the floating gate and the wafer. In other words, it uses a tunnel junction. [38]

Theoretical basis of the physical phenomenon itself is the same as today's flash memory. But each FLOTOX structure is in conjunction with another read-control transistor because the floating gate itself is just programming and erasing one data bit. [39]

Intel's FLOTOX device structure improved EEPROM reliability, in other words, the endurance of the write and erase cycles, and the data retention period. A material of study for single-event effect about FLOTOX is available. [40]

Today, an academic explanation of the FLOTOX device structure can be found in several sources. [41] [42] [43]

Today's EEPROM structure

Nowadays, EEPROM is used for embedded microcontrollers as well as standard EEPROM products. EEPROM still requires a 2-transistor structure per bit to erase a dedicated byte in the memory, while flash memory has 1 transistor per bit to erase a region of the memory. [44]

Security protections

Inside of a SIM card Sim Chip.jpg
Inside of a SIM card

Because EEPROM technology is used for some security gadgets, such as credit cards, SIM cards, key-less entry, etc., some devices have security protection mechanisms, such as copy-protection. [44] [45]

Electrical interface

EEPROM devices use a serial or parallel interface for data input/output.

Serial bus devices

The common serial interfaces are SPI, I²C, Microwire, UNI/O, and 1-Wire. These use from 1 to 4 device pins and allow devices to use packages with 8 pins or less.

A typical EEPROM serial protocol consists of three phases: OP-code phase, address phase and data phase. The OP-code is usually the first 8 bits input to the serial input pin of the EEPROM device (or with most I²C devices, is implicit); followed by 8 to 24 bits of addressing, depending on the depth of the device, then the read or write data.

Each EEPROM device typically has its own set of OP-code instructions mapped to different functions. Common operations on SPI EEPROM devices are:

Other operations supported by some EEPROM devices are:

Parallel bus devices

Parallel EEPROM devices typically have an 8-bit data bus and an address bus wide enough to cover the complete memory. Most devices have chip select and write protect pins. Some microcontrollers also have integrated parallel EEPROM.

Operation of a parallel EEPROM is simple and fast when compared to serial EEPROM, but these devices are larger due to the higher pin count (28 pins or more) and have been decreasing in popularity in favor of serial EEPROM or flash.

Other devices

EEPROM memory is used to enable features in other types of products that are not strictly memory products. Products such as real-time clocks, digital potentiometers, digital temperature sensors, among others, may have small amounts of EEPROM to store calibration information or other data that needs to be available in the event of power loss. It was also used on video game cartridges to save game progress and configurations, before the usage of external and internal flash memories.

Failure modes

There are two limitations of stored information: endurance and data retention.

During rewrites, the gate oxide in the floating-gate transistors gradually accumulates trapped electrons. The electric field of the trapped electrons adds to the electrons in the floating gate, lowering the window between threshold voltages for zeros vs ones. After sufficient number of rewrite cycles, the difference becomes too small to be recognizable, the cell is stuck in programmed state, and endurance failure occurs. The manufacturers usually specify the maximum number of rewrites being 1 million or more. [46]

During storage, the electrons injected into the floating gate may drift through the insulator, especially at increased temperature, and cause charge loss, reverting the cell into erased state. The manufacturers usually guarantee data retention of 10 years or more. [47]

Flash memory is a later form of EEPROM. In the industry, there is a convention to reserve the term EEPROM to byte-wise erasable memories compared to block-wise erasable flash memories. EEPROM occupies more die area than flash memory for the same capacity, because each cell usually needs a read, a write, and an erase transistor, while flash memory erase circuits are shared by large blocks of cells (often 512×8).

Newer non-volatile memory technologies such as FeRAM and MRAM are slowly replacing EEPROMs in some applications, but are expected to remain a small fraction of the EEPROM market for the foreseeable future.

Comparison with EPROM and EEPROM/flash

The difference between EPROM and EEPROM lies in the way that the memory programs and erases. EEPROM can be programmed and erased electrically using field electron emission (more commonly known in the industry as "Fowler–Nordheim tunneling").

EPROMs can't be erased electrically and are programmed by hot-carrier injection onto the floating gate. Erase is by an ultraviolet light source, although in practice many EPROMs are encapsulated in plastic that is opaque to UV light, making them "one-time programmable".

Most NOR flash memory is a hybrid style—programming is through hot-carrier injection and erase is through Fowler–Nordheim tunneling.

TypeInject electrons onto gate
(mostly interpreted as bit=0)		DurationRemove electrons from gate
(mostly interpreted as bit=1)		Duration/mode
EEPROMfield electron emission0.1—5 ms, bytewisefield electron emission0.1—5 ms, blockwise
NOR flash memoryhot-carrier injection0.01—1 msfield electron emission0.01—1 ms, blockwise
EPROMhot-carrier injection3—50 ms, bytewiseUV light5—30 minutes, whole chip

See also

Related Research Articles

<span class="mw-page-title-main">Computer memory</span> Computer component that stores information for immediate use

Computer memory stores information, such as data and programs, for immediate use in the computer. The term memory is often synonymous with the terms RAM,main memory, or primary storage. Archaic synonyms for main memory include core and store.

A programmable read-only memory (PROM) is a form of digital memory where the contents can be changed once after manufacture of the device. The data is then permanent and cannot be changed. It is one type of read-only memory (ROM). PROMs are used in digital electronic devices to store permanent data, usually low level programs such as firmware or microcode. The key difference from a standard ROM is that the data is written into a ROM during manufacture, while with a PROM the data is programmed into them after manufacture. Thus, ROMs tend to be used only for large production runs with well-verified data. PROMs may be used where the volume required does not make a factory-programmed ROM economical, or during development of a system that may ultimately be converted to ROMs in a mass produced version.

<span class="mw-page-title-main">Flash memory</span> Electronic non-volatile computer storage device

Flash memory is an electronic non-volatile computer memory storage medium that can be electrically erased and reprogrammed. The two main types of flash memory, NOR flash and NAND flash, are named for the NOR and NAND logic gates. Both use the same cell design, consisting of floating-gate MOSFETs. They differ at the circuit level depending on whether the state of the bit line or word lines is pulled high or low: in NAND flash, the relationship between the bit line and the word lines resembles a NAND gate; in NOR flash, it resembles a NOR gate.

<span class="mw-page-title-main">Programmable logic device</span> Reconfigurable digital circuit element

A programmable logic device (PLD) is an electronic component used to build reconfigurable digital circuits. Unlike digital logic constructed using discrete logic gates with fixed functions, the function of a PLD is undefined at the time of manufacture. Before the PLD can be used in a circuit it must be programmed to implement the desired function. Compared to fixed logic devices, programmable logic devices simplify the design of complex logic and may offer superior performance. Unlike for microprocessors, programming a PLD changes the connections made between the gates in the device.

<span class="mw-page-title-main">EPROM</span> Early type of solid state computer memory

An EPROM, or erasable programmable read-only memory, is a type of programmable read-only memory (PROM) chip that retains its data when its power supply is switched off. Computer memory that can retrieve stored data after a power supply has been turned off and back on is called non-volatile. It is an array of floating-gate transistors individually programmed by an electronic device that supplies higher voltages than those normally used in digital circuits. Once programmed, an EPROM can be erased by exposing it to strong ultraviolet (UV) light source. EPROMs are easily recognizable by the transparent fused quartz window on the top of the package, through which the silicon chip is visible, and which permits exposure to ultraviolet light during erasing. It was invented by Dov Frohman in 1971.

Non-volatile random-access memory (NVRAM) is random-access memory that retains data without applied power. This is in contrast to dynamic random-access memory (DRAM) and static random-access memory (SRAM), which both maintain data only for as long as power is applied, or forms of sequential-access memory such as magnetic tape, which cannot be randomly accessed but which retains data indefinitely without electric power.

Non-volatile memory (NVM) or non-volatile storage is a type of computer memory that can retain stored information even after power is removed. In contrast, volatile memory needs constant power in order to retain data.

Reading is an action performed by computers, to acquire data from a source and place it into their volatile memory for processing. Computers may read information from a variety of sources, such as magnetic storage, the Internet, or audio and video input ports. Reading is one of the core functions of a Turing machine.

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<span class="mw-page-title-main">Dov Frohman</span> Israeli electrical engineer and business executive

Dov Frohman is an Israeli electrical engineer and business executive. A former vice president of Intel Corporation, he is the inventor of the erasable programmable read only memory (EPROM) and the founder and first general manager of Intel Israel. He is also the author of Leadership the Hard Way.

The floating-gate MOSFET (FGMOS), also known as a floating-gate MOS transistor or floating-gate transistor, is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) where the gate is electrically isolated, creating a floating node in direct current, and a number of secondary gates or inputs are deposited above the floating gate (FG) and are electrically isolated from it. These inputs are only capacitively connected to the FG. Since the FG is surrounded by highly resistive material, the charge contained in it remains unchanged for long periods of time, typically longer than 10 years in modern devices. Usually Fowler-Nordheim tunneling or hot-carrier injection mechanisms are used to modify the amount of charge stored in the FG.

Charge trap flash (CTF) is a semiconductor memory technology used in creating non-volatile NOR and NAND flash memory. It is a type of floating-gate MOSFET memory technology, but differs from the conventional floating-gate technology in that it uses a silicon nitride film to store electrons rather than the doped polycrystalline silicon typical of a floating-gate structure. This approach allows memory manufacturers to reduce manufacturing costs five ways:

  1. Fewer process steps are required to form a charge storage node
  2. Smaller process geometries can be used
  3. Multiple bits can be stored on a single flash memory cell
  4. Improved reliability
  5. Higher yield since the charge trap is less susceptible to point defects in the tunnel oxide layer

Hot carrier injection (HCI) is a phenomenon in solid-state electronic devices where an electron or a “hole” gains sufficient kinetic energy to overcome a potential barrier necessary to break an interface state. The term "hot" refers to the effective temperature used to model carrier density, not to the overall temperature of the device. Since the charge carriers can become trapped in the gate dielectric of a MOS transistor, the switching characteristics of the transistor can be permanently changed. Hot-carrier injection is one of the mechanisms that adversely affects the reliability of semiconductors of solid-state devices.

SONOS, short for "silicon–oxide–nitride–oxide–silicon", more precisely, "polycrystalline silicon"—"silicon dioxide"—"silicon nitride"—"silicon dioxide"—"silicon", is a cross sectional structure of MOSFET (metal–oxide–semiconductor field-effect transistor), realized by P.C.Y. Chen of Fairchild Camera and Instrument in 1977. This structure is often used for non-volatile memories, such as EEPROM and flash memories. It is sometimes used for TFT LCD displays. It is one of CTF (charge trap flash) variants. It is distinguished from traditional non-volatile memory structures by the use of silicon nitride (Si3N4 or Si9N10) instead of "polysilicon-based FG (floating-gate)" for the charge storage material. A further variant is "SHINOS" ("silicon"—"hi-k"—"nitride"—"oxide"—"silicon"), which is substituted top oxide layer with high-κ material. Another advanced variant is "MONOS" ("metal–oxide–nitride–oxide–silicon"). Companies offering SONOS-based products include Cypress Semiconductor, Macronix, Toshiba, United Microelectronics Corporation and FloadiaArchived 2022-11-01 at the Wayback Machine.

<span class="mw-page-title-main">Fujio Masuoka</span> Japanese engineer (born 1943)

Fujio Masuoka is a Japanese engineer, who has worked for Toshiba and Tohoku University, and is currently chief technical officer (CTO) of Unisantis Electronics. He is best known as the inventor of flash memory, including the development of both the NOR flash and NAND flash types in the 1980s. He also invented the first gate-all-around (GAA) MOSFET (GAAFET) transistor, an early non-planar 3D transistor, in 1988.

<span class="mw-page-title-main">Read-only memory</span> Electronic memory that cannot be changed

Read-only memory (ROM) is a type of non-volatile memory used in computers and other electronic devices. Data stored in ROM cannot be electronically modified after the manufacture of the memory device. Read-only memory is useful for storing software that is rarely changed during the life of the system, also known as firmware. Software applications, such as video games, for programmable devices can be distributed as plug-in cartridges containing ROM.

Dawon Kahng was a Korean-American electrical engineer and inventor, known for his work in solid-state electronics. He is best known for inventing the MOSFET, along with his colleague Mohamed Atalla, in 1959. Kahng and Atalla developed both the PMOS and NMOS processes for MOSFET semiconductor device fabrication. The MOSFET is the most widely used type of transistor, and the basic element in most modern electronic equipment.

<span class="mw-page-title-main">Memory cell (computing)</span> Part of computer memory

The memory cell is the fundamental building block of computer memory. The memory cell is an electronic circuit that stores one bit of binary information and it must be set to store a logic 1 and reset to store a logic 0. Its value is maintained/stored until it is changed by the set/reset process. The value in the memory cell can be accessed by reading it.

George Perlegos is a Greek-American computer scientist and engineer, best known for pioneering the use of EEPROM and founding Atmel.

Read-mostly memory (RMM) is a type of memory that can be read fast, but written to only slowly.

References

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  2. ↑ "serial presence detect (SPD)". TechTarget. July 2015.
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  5. 1 2 Iizuka, H.; Masuoka, F.; Sato, Tai; Ishikawa, M. (1976). "Electrically alterable avalanche-injection-type MOS READ-ONLY memory with stacked-gate structure". IEEE Transactions on Electron Devices. 23 (4): 379–387. Bibcode:1976ITED...23..379I. doi:10.1109/T-ED.1976.18415. ISSN   0018-9383. S2CID   30491074.
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  44. 1 2 Skorobogatov, Sergei (2017). "How Microprobing Can Attack Encrypted Memory" (PDF). 2017 Euromicro Conference on Digital System Design (DSD). 2017 Euromicro Conference on Digital System Design (DSD). Vienna. pp. 244–251. doi:10.1109/DSD.2017.69. ISBN   978-1-5386-2146-2.
  45. ↑ "Breaking copy protection in microcontrollers". www.cl.cam.ac.uk. Archived from the original on 2017-10-22.
  46. ↑ "Frequently Asked Questions -ROHM Semiconductor". Archived from the original on 2011-02-19.
  47. ↑ System Integration - From Transistor Design to Large Scale Integrated Circuits
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