|Computer memory types|
|Early stage NVRAM|
Nano-RAM is a proprietary computer memory technology from the company Nantero. It is a type of nonvolatile random access memory based on the position of carbon nanotubes deposited on a chip-like substrate. In theory, the small size of the nanotubes allows for very high density memories. Nantero also refers to it as NRAM.
In computing, memory refers to the computer hardware integrated circuits that store information for immediate use in a computer; it is synonymous with the term "primary storage". Computer memory operates at a high speed, for example random-access memory (RAM), as a distinction from storage that provides slow-to-access information but offers higher capacities. If needed, contents of the computer memory can be transferred to secondary storage; a very common way of doing this is through a memory management technique called "virtual memory". An archaic synonym for memory is store.
The first generation Nantero NRAM technology was based on a three-terminal semiconductor device where a third terminal is used to switch the memory cell between memory states. The second generation NRAM technology is based on a two-terminal memory cell. The two-terminal cell has advantages such as a smaller cell size, better scalability to sub-20 nm nodes (see semiconductor device fabrication), and the ability to passivate the memory cell during fabrication.
A semiconductor device is an electronic component that exploits the electronic properties of semiconductor material, principally silicon, germanium, and gallium arsenide, as well as organic semiconductors. Semiconductor devices have replaced vacuum tubes in most applications. They use electrical conduction in the solid state rather than the gaseous state or thermionic emission in a vacuum.
Semiconductor device fabrication is the process used to manufacture semiconductor devices, particularly the metal-oxide-semiconductor (MOS) devices used in the integrated circuit (IC) chips that are present in everyday electrical and electronic devices. It is a multiple-step sequence of photolithographic and chemical processing steps during which electronic circuits are gradually created on a wafer made of pure semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications.
Passivation, in physical chemistry and engineering, refers to a material becoming "passive," that is, less affected or corroded by the environment of future use. Passivation involves creation of an outer layer of shield material that is applied as a microcoating, created by chemical reaction with the base material, or allowed to build from spontaneous oxidation in the air. As a technique, passivation is the use of a light coat of a protective material, such as metal oxide, to create a shell against corrosion. Passivation can occur only in certain conditions, and is used in microelectronics to enhance silicon. The technique of passivation strengthens and preserves the appearance of metallics. In electrochemical treatment of water, passivation reduces the effectiveness of the treatment by increasing the circuit resistance, and active measures are typically used to overcome this effect, the most common being polarity reversal, which results in limited rejection of the fouling layer. Other proprietary systems to avoid electrode passivation, several discussed below, are the subject of ongoing research and development.
In a non-woven fabric matrix of carbon nanotubes (CNTs), crossed nanotubes can either be touching or slightly separated depending on their position. When touching, the carbon nanotubes are held together by Van der Waals forces. Each NRAM "cell" consists of an interlinked network of CNTs located between two electrodes as illustrated in Figure 1. The CNT fabric is located between two metal electrodes, which is defined and etched by photolithography, and forms the NRAM cell.
Photolithography, also called optical lithography or UV lithography, is a process used in microfabrication to pattern parts of a thin film or the bulk of a substrate. It uses light to transfer a geometric pattern from a photomask to a photosensitive chemical photoresist on the substrate. A series of chemical treatments then either etches the exposure pattern into the material or enables deposition of a new material in the desired pattern upon the material underneath the photoresist. In complex integrated circuits, a CMOS wafer may go through the photolithographic cycle as many as 50 times.
The NRAM acts as a resistive non-volatile random access memory (RAM) and can be placed in two or more resistive modes depending on the resistive state of the CNT fabric. When the CNTs are not in contact the resistance state of the fabric is high and represents an "off" or "0" state. When the CNTs are brought into contact, the resistance state of the fabric is low and represents an "on" or "1" state. NRAM acts as a memory because the two resistive states are very stable. In the 0 state, the CNTs (or a portion of them) are not in contact and remain in a separated state due to the stiffness of the CNTs resulting in a high resistance or low current measurement state between the top and bottom electrodes. In the 1 state, the CNTs (or a portion of them) are in contact and remain contacted due to Van der Waals forces between the CNTs, resulting in a low resistance or high current measurement state between the top and bottom electrodes. Note that other sources of resistance such as contact resistance between electrode and CNT can be significant and also need to be considered.
To switch the NRAM between states, a small voltage greater than the read voltage is applied between top and bottom electrodes. If the NRAM is in the 0 state, the voltage applied will cause an electrostatic attraction between the CNTs close to each other causing a SET operation. After the applied voltage is removed, the CNTs remain in a 1 or low resistance state due to physical adhesion (Van der Waals force) with an activation energy (Ea) of approximately 5eV. If the NRAM cell is in the 1 state, applying a voltage greater than the read voltage will generate CNT phonon excitations with sufficient energy to separate the CNT junctions. This is the phonon driven RESET operation. The CNTs remain in the OFF or high resistance state due to the high mechanical stiffness (Young's Modulus 1 TPa) with an activation energy (Ea) much greater than 5 eV. Figure 2 illustrates both states of an individual pair of CNTs involved in the switch operation. Due to the high activation energy (> 5eV) required for switching between states, the NRAM switch resists outside interference like radiation and operating temperature that can erase or flip conventional memories like DRAM.
In chemistry and physics, activation energy is the energy which must be provided to a chemical or nuclear system with potential reactants to result in: a chemical reaction, nuclear reaction, or various other physical phenomena.
An operating temperature is the temperature at which an electrical or mechanical device operates. The device will operate effectively within a specified temperature range which varies based on the device function and application context, and ranges from the minimum operating temperature to the maximum operating temperature. Outside this range of safe operating temperatures the device may fail.
NRAMs are fabricated by depositing a uniform layer of CNTs onto a prefabricated array of drivers such as transistors as shown in Figure 1. The bottom electrode of the NRAM cell is in contact with the underlying via (electronics) connecting the cell to the driver. The bottom electrode may be fabricated as part of the underlying via or it may be fabricated simultaneously with the NRAM cell, when the cell is photolithographically defined and etched. Before the cell is photolithographically defined and etched, the top electrode is deposited as a metal film onto the CNT layer so that the top metal electrode is patterned and etched during the definition of the NRAM cell. Following the dielectric passivation and fill of the array, the top metal electrode is exposed by etching back the overlying dielectric using a smoothing process such as chemical-mechanical planarization. With the top electrode exposed, the next level of metal wiring interconnect is fabricated to complete the NRAM array. Figure 3 illustrates one circuit method to select a single cell for writing and reading. Using a cross-grid interconnect arrangement, the NRAM and driver, (the cell), forms a memory array similar to other memory arrays. A single cell can be selected by applying the proper voltages to the word line (WL), bit line (BL), and select lines (SL) without disturbing the other cells in the array.
A via or VIA is an electrical connection between layers in a physical electronic circuit that goes through the plane of one or more adjacent layers. To ensure via robustness, IPC sponsored a round-robin exercise that developed a time to failure calculator.
NRAM has a density, at least in theory, similar to that of DRAM. DRAM includes capacitors, which are essentially two small metal plates with a thin insulator between them. NRAM has terminals and electrodes roughly the same size as the plates in a DRAM, the nanotubes between them being so much smaller they add nothing to the overall size. However it seems there is a minimum size at which a DRAM can be built, below which there is simply not enough charge being stored on the plates. NRAM appears to be limited only by lithography [ citation needed ]. This means that NRAM may be able to become much denser than DRAM, perhaps also less expensive. Unlike DRAM, NRAM does not require power to "refresh" it, and will retain its memory even after power is removed. Thus the power needed to write and retain the memory state of the device is much lower than DRAM, which has to build up charge on the cell plates. This means that NRAM might compete with DRAM in terms of cost, but also require less power, and as a result also be much faster because write performance is largely determined by the total charge needed. NRAM can theoretically reach performance similar to SRAM, which is faster than DRAM but much less dense, and thus much more expensive.
Compared with other non-volatile random-access memory (NVRAM) technologies, NRAM has several advantages. In flash memory, the common form of NVRAM, each cell resembles a MOSFET transistor with a control gate (CG) modulated by a floating gate (FG) interposed between the CG and the FG. The FG is surrounded by an insulating dielectric, typically an oxide. Since the FG is electrically isolated by the surrounding dielectric, any electrons placed on the FG will be trapped on the FG which screens the CG from the channel of the transistor and modifies the threshold voltage (VT) of the transistor. By writing and controlling the amount of charge placed on the FG, the FG controls the conduction state of the MOSFET flash device depending on the VT of the cell selected. The current flowing through the MOSFET channel is sensed to determine the state of the cell forming a binary code where a 1 state (current flow) when an appropriate CG voltage is applied and a 0 state (no current flow) when the CG voltage is applied.
After being written to, the insulator traps electrons on the FG, locking it into the 0 state. However, in order to change that bit, the insulator has to be "overcharged" to erase any charge already stored in it. This requires higher voltage, about 10 volts, much more than a battery can provide. Flash systems include a "charge pump" that slowly builds up power and releases it at higher voltage. This process is not only slow, but degrades the insulators. For this reason flash has a limited number of writes before the device will no longer operate effectively.
NRAM reads and writes are both "low energy" in comparison to flash (or DRAM for that matter due to "refresh"), meaning NRAM could have longer battery life. It may also be much faster to write than either, meaning it may be used to replace both. Modern phones include flash memory for storing phone numbers, DRAM for higher performance working memory because flash is too slow, and some SRAM for even higher performance. Some NRAM could be placed on the CPU to act as the CPU cache, and more in other chips replacing both the DRAM and flash.
NRAM is one of a variety of new memory systems, many of which claim to be "universal" in the same fashion as NRAM – replacing everything from flash to DRAM to SRAM.
An alternative memory ready for use is ferroelectric RAM (FRAM or FeRAM). FeRAM adds a small amount of a ferro-electric material to a DRAM cell. The state of the field in the material encodes the bit in a non-destructive format. FeRAM has advantages of NRAM, although the smallest possible cell size is much larger than for NRAM. FeRAM is used in applications where the limited number of writes of flash is an issue. FeRAM read operations are destructive, requiring a restoring write operation afterwards.
Other more speculative memory systems include magnetoresistive random-access memory (MRAM) and phase-change memory (PRAM). MRAM is based on a grid of magnetic tunnel junctions. MRAM's reads the memory using the tunnel magnetoresistance effect, allowing it to read the memory both non-destructively and with very little power. Early MRAM used field induced writing,reached a limit in terms of size, which kept it much larger than flash devices. However, new MRAM techniques might overcome the size limitation to make MRAM competitive even with flash memory. The techniques are Thermal Assisted Switching (TAS), developed by Crocus Technology, and Spin-transfer torque on which Crocus, Hynix, IBM, and other companies were working in 2009.
PRAM is based on a technology similar to that in a writable CD or DVD, using a phase-change material that changes its magnetic or electrical properties instead of its optical ones. The PRAM material itself is scalable but requires a larger current source.
Nantero was founded in 2001, and headquartered in Woburn, Massachusetts. Due to the massive investment in flash semiconductor fabrication plants, no alternative memory has replaced flash in the marketplace, despite predictions as early as 2003 of the impending speed and density of NRAM. Space Shuttle Atlantis.In 2005, NRAM was promoted as universal memory, and Nantero predicted it would be in production by the end of 2006. In August 2008, Lockheed Martin acquired an exclusive license for government applications of Nantero's intellectual property. By early 2009, Nantero had 30 US patents and 47 employees, but was still in the engineering phase. In May 2009, a radiation-resistant version of NRAM was tested on the STS-125 mission of the US
The company was quiet until another round of funding and collaboration with the Belgian research center imec was announced in November 2012.Nantero raised a total of over $42 million through the November 2012 series D round. Investors included Charles River Ventures, Draper Fisher Jurvetson, Globespan Capital Partners, Stata Venture Partners and Harris & Harris Group. In May 2013, Nantero completed series D with an investment by Schlumberger. EE Times listed Nantero as one of "10 top startups to watch in 2013".
31 Aug 2016. Two Fujitsu semiconductor businesses are licensing Nantero NRAM technology with joint Nantero-Fujitsu development to produce chips in 2018. They will have several thousand times faster rewrites and many thousands of times more rewrite cycles than embedded flash memory.
Flash memory is an electronic (solid-state) non-volatile computer memory storage medium that can be electrically erased and reprogrammed. The two main types of flash memory are named after the NAND and NOR logic gates. The individual flash memory cells, consisting of floating-gate MOSFETs, exhibit internal characteristics similar to those of the corresponding gates.
Dynamic random-access memory (DRAM) is a type of random access semiconductor memory that stores each bit of data in a memory cell consisting of a tiny capacitor and a transistor, both typically based on metal-oxide-semiconductor (MOS) technology. The capacitor can either be charged or discharged; these two states are taken to represent the two values of a bit, conventionally called 0 and 1. The electric charge on the capacitors slowly leaks off, so without intervention the data on the chip would soon be lost. To prevent this, DRAM requires an external memory refresh circuit which periodically rewrites the data in the capacitors, restoring them to their original charge. This refresh process is the defining characteristic of dynamic random-access memory, in contrast to static random-access memory (SRAM) which does not require data to be refreshed. Unlike flash memory, DRAM is volatile memory, since it loses its data quickly when power is removed. However, DRAM does exhibit limited data remanence.
Non-volatile random-access memory (NVRAM) is random-access memory that is non-volatile. This is in contrast to dynamic random-access memory (DRAM) and static random-access memory (SRAM), which both maintain data only for as long as power is applied.
Magnetoresistive random-access memory (MRAM) is a type of non-volatile random-access memory which stores data in magnetic domains. Developed in the mid-1980s, proponents have argued that magnetoresistive RAM will eventually surpass competing technologies to become a dominant or even universal memory. Presently, other memory technologies such as flash RAM and DRAM have practical advantages that have so far kept MRAM in a niche role in the market. It is currently in production by Everspin Technologies, and other companies, including GlobalFoundries and Samsung, have announced in 2016 product plans. A recent, comprehensive review article on magnetoresistance and magnetic random access memories is available as an open access paper in Materials Today.
Non-volatile memory (NVM) or non-volatile storage is a type of computer memory that can retrieve stored information even after having been power cycled. In contrast, volatile memory needs constant power in order to retain data. Examples of non-volatile memory include flash memory, read-only memory (ROM), ferroelectric RAM, most types of magnetic computer storage devices, optical discs, and early computer storage methods such as paper tape and punched cards.
Phase-change memory (also known as PCM, PCME, PRAM, PCRAM, OUM and C-RAM or CRAM is a type of non-volatile random-access memory. PRAMs exploit the unique behaviour of chalcogenide glass. In the older generation of PCM, heat produced by the passage of an electric current through a heating element generally made of TiN was used to either quickly heat and quench the glass, making it amorphous, or to hold it in its crystallization temperature range for some time, thereby switching it to a crystalline state. PCM also has the ability to achieve a number of distinct intermediary states, thereby having the ability to hold multiple bits in a single cell, but the difficulties in programming cells in this way has prevented these capabilities from being implemented in other technologies with the same capability.
Reading is an action performed by computers, to acquire data from a source and place it into their volatile memory for processing. Computers may read information from a variety of sources, such as magnetic storage, the Internet, or audio and video input ports. Reading is one of the core functions of a Turing machine.
Ferroelectric RAM is a random-access memory similar in construction to DRAM but using a ferroelectric layer instead of a dielectric layer to achieve non-volatility. FeRAM is one of a growing number of alternative non-volatile random-access memory technologies that offer the same functionality as flash memory.
Hybrid solar cells combine advantages of both organic and inorganic semiconductors. Hybrid photovoltaics have organic materials that consist of conjugated polymers that absorb light as the donor and transport holes. Inorganic materials in hybrid cells are used as the acceptor and electron transporter in the structure. The hybrid photovoltaic devices have a potential for not only low-cost by roll-to-roll processing but also for scalable solar power conversion.
SONOS, short for "silicon–oxide–nitride–oxide–silicon", more precisely, "polycrystalline silicon"—"silicon dioxide"—"silicon nitride"—"siicon dioxide"—"silicon", is a cross sectional structure of MOSFET, realized by P.C.Y. Chen in 1977. This structure is often used for non-volatile memories, such as EEPROM and flash memories. It is sometimes used for TFT LCD displays. It is one of CTF (charge trap flash) variants. It is distinguished from traditional non-volatile memory structures by the use of silicon nitride (Si3N4 or Si9N10) instead of "polysilicon-based FG (floating-gate)" for the charge storage material. A further variant is "SHINOS" ("silicon"—"hi-k"—"nitride"—"oxide"—"silicon"), which is substituted top oxide layer with high-κ material. Another advanced variant is "MONOS" ("metal–oxide–nitride–oxide–silicon"). Companies offering SONOS-based products include Cypress Semiconductor, Macronix, Toshiba, United Microelectronics Corporation and Floadia.
Resistive random-access memory is a type of non-volatile (NV) random-access (RAM) computer memory that works by changing the resistance across a dielectric solid-state material, often referred to as a memristor. This technology bears some similarities to conductive-bridging RAM (CBRAM), and phase-change memory (PCM).
In nanotechnology, a carbon nanobud is a material that combines carbon nanotubes and spheroidal fullerenes, both allotropes of carbon, in the same structure, forming "buds" attached to the tubes. Carbon nanobuds were discovered and synthesized in 2006.
The programmable metallization cell, or PMC, is a non-volatile computer memory developed at Arizona State University. PMC a technology developed to replace the widely used flash memory, providing a combination of longer lifetimes, lower power, and better memory density. Infineon Technologies, who licensed the technology in 2004, refers to it as conductive-bridging RAM, or CBRAM. CBRAM became a registered trademark of Adesto Technologies in 2011. NEC has a variant called "Nanobridge" and Sony calls their version "electrolytic memory".
Organic photovoltaic devices (OPVs) are fabricated from thin films of organic semiconductors, such as polymers and small-molecule compounds, and are typically on the order of 100 nm thick. Because polymer based OPVs can be made using a coating process such as spin coating or inkjet printing, they are an attractive option for inexpensively covering large areas as well as flexible plastic surfaces. A promising low cost alternative to conventional solar cells made of crystalline silicon, there is a large amount of research being dedicated throughout industry and academia towards developing OPVs and increasing their power conversion efficiency.
Random-access memory is a form of computer memory that can be read and changed in any order, typically used to store working data and machine code. A random-access memory device allows data items to be read or written in almost the same amount of time irrespective of the physical location of data inside the memory. In contrast, with other direct-access data storage media such as hard disks, CD-RWs, DVD-RWs and the older magnetic tapes and drum memory, the time required to read and write data items varies significantly depending on their physical locations on the recording medium, due to mechanical limitations such as media rotation speeds and arm movement.
A carbon nanotube field-effect transistor (CNTFET) refers to a field-effect transistor that utilizes a single carbon nanotube or an array of carbon nanotubes as the channel material instead of bulk silicon in the traditional MOSFET structure. First demonstrated in 1998, there have been major developments in CNTFETs since.
Single-walled carbon nanotubes have the ability to conduct electricity. This conduction can be ballistic, diffusive, or based on scattering. When ballistic in nature conductance can be treated as if the electrons experience no scattering.
The memory cell is the fundamental building block of computer memory. The memory cell is an electronic circuit that stores one bit of binary information and it must be set to store a logic 1 and reset to store a logic 0. Its value is maintained/stored until it is changed by the set/reset process. The value in the memory cell can be accessed by reading it.
In nanotechnology, carbon nanotube interconnects refer to the proposed use of carbon nanotubes in the interconnects between the elements of an integrated circuit. Carbon nanotubes (CNTs) can be thought of as single atomic layer graphite sheets rolled up to form seamless cylinders. Depending on the direction on which they are rolled, CNTs can be semiconducting or metallic. Metallic carbon nanotubes have been identified as a possible interconnect material for the future technology generations and to replace copper interconnects. Electron transport can go over long nanotube lengths, 1 μm, enabling CNTs to carry very high currents (i.e. up to a current density of 109 A∙cm−2) with essentially no heating due to nearly one dimensional electronic structure. Despite the current saturation in CNTs at high fields, the mitigation of such effects is possible due to encapsulated nanowires.
Vertically aligned carbon nanotube arrays (VANTAs) are a unique microstructure consisting of carbon nanotubes oriented along their longitudinal axis normal to a substrate surface. These VANTAs effectively preserve and often accentuate the unique anisotropic properties of individual carbon nanotubes and possess a morphology that may be precisely controlled. VANTAs are consequently widely useful in a range of current and potential device applications.