Nano-RAM

Last updated

Nano-RAM is a proprietary computer memory technology from the company Nantero. It is a type of nonvolatile random-access memory based on the position of carbon nanotubes deposited on a chip-like substrate. In theory, the small size of the nanotubes allows for very high density memories. Nantero also refers to it as NRAM.

Contents

Technology

The first generation Nantero NRAM technology was based on a three-terminal semiconductor device where a third terminal is used to switch the memory cell between memory states. The second generation NRAM technology is based on a two-terminal memory cell. The two-terminal cell has advantages such as a smaller cell size, better scalability to sub-20 nm nodes (see semiconductor device fabrication), and the ability to passivate the memory cell during fabrication.

In a non-woven fabric matrix of carbon nanotubes (CNTs), crossed nanotubes can either be touching or slightly separated depending on their position. When touching, the carbon nanotubes are held together by Van der Waals forces. [1] Each NRAM "cell" consists of an interlinked network of CNTs located between two electrodes as illustrated in Figure 1. The CNT fabric is located between two metal electrodes, which is defined and etched by photolithography, and forms the NRAM cell.

Carbon nanotube fabric NRAM fabric.png
Carbon nanotube fabric

The NRAM acts as a resistive non-volatile random-access memory (RAM) and can be placed in two or more resistive modes depending on the resistive state of the CNT fabric. When the CNTs are not in contact the resistance state of the fabric is high and represents an "off" or "0" state. When the CNTs are brought into contact, the resistance state of the fabric is low and represents an "on" or "1" state. NRAM acts as a memory because the two resistive states are very stable. In the 0 state, the CNTs (or a portion of them) are not in contact and remain in a separated state due to the stiffness of the CNTs resulting in a high resistance or low current measurement state between the top and bottom electrodes. In the 1 state, the CNTs (or a portion of them) are in contact and remain contacted due to Van der Waals forces between the CNTs, resulting in a low resistance or high current measurement state between the top and bottom electrodes. Note that other sources of resistance such as contact resistance between electrode and CNT can be significant and also need to be considered.

To switch the NRAM between states, a small voltage greater than the read voltage is applied between top and bottom electrodes. If the NRAM is in the 0 state, the voltage applied will cause an electrostatic attraction between the CNTs close to each other causing a SET operation. After the applied voltage is removed, the CNTs remain in a 1 or low resistance state due to physical adhesion (Van der Waals force) with an activation energy (Ea) of approximately 5eV. If the NRAM cell is in the 1 state, applying a voltage greater than the read voltage will generate CNT phonon excitations with sufficient energy to separate the CNT junctions. This is the phonon driven RESET operation. The CNTs remain in the OFF or high resistance state due to the high mechanical stiffness (Young's Modulus 1 TPa) with an activation energy (Ea) much greater than 5 eV. Figure 2 illustrates both states of an individual pair of CNTs involved in the switch operation. Due to the high activation energy (> 5eV) required for switching between states, the NRAM switch resists outside interference like radiation and operating temperature that can erase or flip conventional memories like DRAM.

Figure 2: Carbon nanotube contact points NRAM contact point.png
Figure 2: Carbon nanotube contact points

NRAMs are fabricated by depositing a uniform layer of CNTs onto a prefabricated array of drivers such as transistors as shown in Figure 1. The bottom electrode of the NRAM cell is in contact with the underlying via (electronics) connecting the cell to the driver. The bottom electrode may be fabricated as part of the underlying via or it may be fabricated simultaneously with the NRAM cell, when the cell is photolithographically defined and etched. Before the cell is photolithographically defined and etched, the top electrode is deposited as a metal film onto the CNT layer so that the top metal electrode is patterned and etched during the definition of the NRAM cell. Following the dielectric passivation and fill of the array, the top metal electrode is exposed by etching back the overlying dielectric using a smoothing process such as chemical-mechanical planarization. With the top electrode exposed, the next level of metal wiring interconnect is fabricated to complete the NRAM array. Figure 3 illustrates one circuit method to select a single cell for writing and reading. Using a cross-grid interconnect arrangement, the NRAM and driver, (the cell), forms a memory array similar to other memory arrays. A single cell can be selected by applying the proper voltages to the word line (WL), bit line (BL), and select lines (SL) without disturbing the other cells in the array. Alternatively between the bottom electrode and top metal layer they may be two layers of CNTs: one with uniformly arranged CNTs, and another with randomly arranged CNTs. The uniformly arranged CNTs are used to protect the randomly arranged CNTs from the top metal layer. [2]

Figure 3: CNT switch CNT switch.svg
Figure 3: CNT switch

Characteristics

NRAM has a density, at least in theory, similar to that of DRAM. DRAM includes capacitors, which are essentially two small metal plates with a thin insulator between them. NRAM has terminals and electrodes roughly the same size as the plates in a DRAM, the nanotubes between them being so much smaller they add nothing to the overall size. However it seems there is a minimum size at which a DRAM can be built, below which there is simply not enough charge being stored on the plates. NRAM appears to be limited only by lithography [ citation needed ]. This means that NRAM may be able to become much denser than DRAM, perhaps also less expensive. Unlike DRAM, NRAM does not require power to "refresh" it, and will retain its memory even after power is removed. Thus the power needed to write and retain the memory state of the device is much lower than DRAM, which has to build up charge on the cell plates. This means that NRAM might compete with DRAM in terms of cost, but also require less power, and as a result also be much faster because write performance is largely determined by the total charge needed. NRAM can theoretically reach performance similar to SRAM, which is faster than DRAM but much less dense, and thus much more expensive.

Comparison with other non-volatile memory

Compared with other non-volatile random-access memory (NVRAM) technologies, NRAM has several advantages. In flash memory, the common form of NVRAM, each cell resembles a MOSFET transistor with a control gate (CG) modulated by a floating gate (FG) interposed between the CG and the FG. The FG is surrounded by an insulating dielectric, typically an oxide. Since the FG is electrically isolated by the surrounding dielectric, any electrons placed on the FG will be trapped on the FG which screens the CG from the channel of the transistor and modifies the threshold voltage (VT) of the transistor. By writing and controlling the amount of charge placed on the FG, the FG controls the conduction state of the MOSFET flash device depending on the VT of the cell selected. The current flowing through the MOSFET channel is sensed to determine the state of the cell forming a binary code where a 1 state (current flow) when an appropriate CG voltage is applied and a 0 state (no current flow) when the CG voltage is applied.

After being written to, the insulator traps electrons on the FG, locking it into the 0 state. However, in order to change that bit, the insulator has to be "overcharged" to erase any charge already stored in it. This requires higher voltage, about 10 volts, much more than a battery can provide. Flash systems include a "charge pump" that slowly builds up power and releases it at higher voltage. This process is not only slow, but degrades the insulators. For this reason flash has a limited number of writes before the device will no longer operate effectively.

NRAM reads and writes are both "low energy" in comparison to flash (or DRAM for that matter due to "refresh"), meaning NRAM could have longer battery life. It may also be much faster to write than either, meaning it may be used to replace both. Modern phones include flash memory for storing phone numbers, DRAM for higher performance working memory because flash is too slow, and some SRAM for even higher performance. Some NRAM could be placed on the CPU to act as the CPU cache, and more in other chips replacing both the DRAM and flash.

NRAM is one of a variety of new memory systems, many of which claim to be "universal" in the same fashion as NRAM – replacing everything from flash to DRAM to SRAM.

An alternative memory ready for use is ferroelectric RAM (FRAM or FeRAM). FeRAM adds a small amount of a ferro-electric material to a DRAM cell. The state of the field in the material encodes the bit in a non-destructive format. FeRAM has advantages of NRAM, although the smallest possible cell size is much larger than for NRAM. FeRAM is used in applications where the limited number of writes of flash is an issue. FeRAM read operations are destructive, requiring a restoring write operation afterwards.

Other more speculative memory systems include magnetoresistive random-access memory (MRAM) and phase-change memory (PRAM). MRAM is based on a grid of magnetic tunnel junctions. MRAM's reads the memory using the tunnel magnetoresistance effect, allowing it to read the memory both non-destructively and with very little power. Early MRAM used field induced writing, [3] reached a limit in terms of size, which kept it much larger than flash devices. However, new MRAM techniques might overcome the size limitation to make MRAM competitive even with flash memory. The techniques are Thermal Assisted Switching (TAS), [4] developed by Crocus Technology, and Spin-transfer torque on which Crocus, Hynix, IBM, and other companies were working in 2009. [5]

PRAM is based on a technology similar to that in a writable CD or DVD, using a phase-change material that changes its magnetic or electrical properties instead of its optical ones. The PRAM material itself is scalable but requires a larger current source.

History

Nantero, Inc.
Company typePrivate
IndustrySemiconductors, nanotechnology
Founded2001
Headquarters
Woburn, Massachusetts
,
US
ProductsNano-RAM
Website www.nantero.com

Nantero was founded in 2001, and headquartered in Woburn, Massachusetts. Due to the massive investment in flash semiconductor fabrication plants, no alternative memory has replaced flash in the marketplace, despite predictions as early as 2003 of the impending speed and density of NRAM. [6] [7]

In 2005, NRAM was promoted as universal memory, and Nantero predicted it would be in production by the end of 2006. [8] In August 2008, Lockheed Martin acquired an exclusive license for government applications of Nantero's intellectual property. [9]

By early 2009, Nantero had 30 US patents and 47 employees, but was still in the engineering phase. [10] In May 2009, a radiation-resistant version of NRAM was tested on the STS-125 mission of the US Space Shuttle Atlantis. [11]

The company was quiet until another round of funding and collaboration with the Belgian research center imec was announced in November 2012. [12] [13] Nantero raised a total of over $42 million through the November 2012 series D round. [14] Investors included Charles River Ventures, Draper Fisher Jurvetson, Globespan Capital Partners, Stata Venture Partners and Harris & Harris Group. In May 2013, Nantero completed series D with an investment by Schlumberger. [15] EE Times listed Nantero as one of "10 top startups to watch in 2013". [16]

31 Aug 2016: Two Fujitsu semiconductor businesses are licensing Nantero NRAM technology with joint Nantero–Fujitsu development to produce chips, announced in 2018. They are announced to have several thousand times faster rewrites and many thousands of times more rewrite cycles than embedded flash memory. [17] As of 2024, these products are still announced but have not reached the market.

See also

Related Research Articles

<span class="mw-page-title-main">Static random-access memory</span> Type of computer memory

Static random-access memory is a type of random-access memory (RAM) that uses latching circuitry (flip-flop) to store each bit. SRAM is volatile memory; data is lost when power is removed.

Non-volatile random-access memory (NVRAM) is random-access memory that retains data without applied power. This is in contrast to dynamic random-access memory (DRAM) and static random-access memory (SRAM), which both maintain data only for as long as power is applied, or forms of sequential-access memory such as magnetic tape, which cannot be randomly accessed but which retains data indefinitely without electric power.

Magnetoresistive random-access memory (MRAM) is a type of non-volatile random-access memory which stores data in magnetic domains. Developed in the mid-1980s, proponents have argued that magnetoresistive RAM will eventually surpass competing technologies to become a dominant or even universal memory. Currently, memory technologies in use such as flash RAM and DRAM have practical advantages that have so far kept MRAM in a niche role in the market.

Non-volatile memory (NVM) or non-volatile storage is a type of computer memory that can retain stored information even after power is removed. In contrast, volatile memory needs constant power in order to retain data.

Phase-change memory is a type of non-volatile random-access memory. PRAMs exploit the unique behaviour of chalcogenide glass. In PCM, heat produced by the passage of an electric current through a heating element generally made of titanium nitride is used to either quickly heat and quench the glass, making it amorphous, or to hold it in its crystallization temperature range for some time, thereby switching it to a crystalline state. PCM also has the ability to achieve a number of distinct intermediary states, thereby having the ability to hold multiple bits in a single cell, but the difficulties in programming cells in this way has prevented these capabilities from being implemented in other technologies with the same capability.

Reading is an action performed by computers, to acquire data from a source and place it into their volatile memory for processing. Computers may read information from a variety of sources, such as magnetic storage, the Internet, or audio and video input ports. Reading is one of the core functions of a Turing machine.

<span class="mw-page-title-main">Ferroelectric RAM</span> Novel type of computer memory

Ferroelectric RAM is a random-access memory similar in construction to DRAM but using a ferroelectric layer instead of a dielectric layer to achieve non-volatility. FeRAM is one of a growing number of alternative non-volatile random-access memory technologies that offer the same functionality as flash memory. An FeRAM chip contains a thin film of ferroelectric material, often lead zirconate titanate, commonly referred to as PZT. The atoms in the PZT layer change polarity in an electric field, thereby producing a power-efficient binary switch. However, the most important aspect of the PZT is that it is not affected by power disruption or magnetic interference, making FeRAM a reliable nonvolatile memory.

Hybrid solar cells combine advantages of both organic and inorganic semiconductors. Hybrid photovoltaics have organic materials that consist of conjugated polymers that absorb light as the donor and transport holes. Inorganic materials in hybrid cells are used as the acceptor and electron transporter in the structure. The hybrid photovoltaic devices have a potential for not only low-cost by roll-to-roll processing but also for scalable solar power conversion.

SONOS, short for "silicon–oxide–nitride–oxide–silicon", more precisely, "polycrystalline silicon"—"silicon dioxide"—"silicon nitride"—"silicon dioxide"—"silicon", is a cross sectional structure of MOSFET (metal–oxide–semiconductor field-effect transistor), realized by P.C.Y. Chen of Fairchild Camera and Instrument in 1977. This structure is often used for non-volatile memories, such as EEPROM and flash memories. It is sometimes used for TFT LCD displays. It is one of CTF (charge trap flash) variants. It is distinguished from traditional non-volatile memory structures by the use of silicon nitride (Si3N4 or Si9N10) instead of "polysilicon-based FG (floating-gate)" for the charge storage material. A further variant is "SHINOS" ("silicon"—"hi-k"—"nitride"—"oxide"—"silicon"), which is substituted top oxide layer with high-κ material. Another advanced variant is "MONOS" ("metal–oxide–nitride–oxide–silicon"). Companies offering SONOS-based products include Cypress Semiconductor, Macronix, Toshiba, United Microelectronics Corporation and Floadia.

Nanoelectronics refers to the use of nanotechnology in electronic components. The term covers a diverse set of devices and materials, with the common characteristic that they are so small that inter-atomic interactions and quantum mechanical properties need to be studied extensively. Some of these candidates include: hybrid molecular/semiconductor electronics, one-dimensional nanotubes/nanowires or advanced molecular electronics.

Resistive random-access memory is a type of non-volatile (NV) random-access (RAM) computer memory that works by changing the resistance across a dielectric solid-state material, often referred to as a memristor. One major advantage of ReRAM over other NVRAM technologies is the ability to scale below 10nm.

The programmable metallization cell, or PMC, is a non-volatile computer memory developed at Arizona State University. PMC, a technology developed to replace the widely used flash memory, providing a combination of longer lifetimes, lower power, and better memory density. Infineon Technologies, who licensed the technology in 2004, refers to it as conductive-bridging RAM, or CBRAM. CBRAM became a registered trademark of Adesto Technologies in 2011. NEC has a variant called "Nanobridge" and Sony calls their version "electrolytic memory".

Organic photovoltaic devices (OPVs) are fabricated from thin films of organic semiconductors, such as polymers and small-molecule compounds, and are typically on the order of 100 nm thick. Because polymer based OPVs can be made using a coating process such as spin coating or inkjet printing, they are an attractive option for inexpensively covering large areas as well as flexible plastic surfaces. A promising low cost alternative to conventional solar cells made of crystalline silicon, there is a large amount of research being dedicated throughout industry and academia towards developing OPVs and increasing their power conversion efficiency.

Universal memory refers to a computer data storage device combining the cost benefits of DRAM, the speed of SRAM, the non-volatility of flash memory along with infinite durability, and longevity. Such a device, if it ever becomes possible to develop, would have a far-reaching impact on the computer market. Some doubt that such a type of memory will ever be possible.

<span class="mw-page-title-main">Transparent conducting film</span> Optically transparent and electrically conductive material

Transparent conducting films (TCFs) are thin films of optically transparent and electrically conductive material. They are an important component in a number of electronic devices including liquid-crystal displays, OLEDs, touchscreens and photovoltaics. While indium tin oxide (ITO) is the most widely used, alternatives include wider-spectrum transparent conductive oxides (TCOs), conductive polymers, metal grids and random metallic networks, carbon nanotubes (CNT), graphene, nanowire meshes and ultra thin metal films.

A carbon nanotube field-effect transistor (CNTFET) is a field-effect transistor that utilizes a single carbon nanotube (CNT) or an array of carbon nanotubes as the channel material, instead of bulk silicon, as in the traditional MOSFET structure. There have been major developments since CNTFETs were first demonstrated in 1998.

Everspin Technologies, Inc. is a publicly traded semiconductor company headquartered in Chandler, Arizona, United States. It develops and manufactures discrete magnetoresistive RAM or magnetoresistive random-access memory (MRAM) products, including Toggle MRAM and Spin-Transfer Torque MRAM (STT-MRAM) product families. It also licenses its technology for use in embedded MRAM (eMRAM) applications, magnetic sensor applications as well as performs backend foundry services for eMRAM.

A NVDIMM or non-volatile DIMM is a type of persistent random-access memory for computers using widely used DIMM form-factors. Non-volatile memory is memory that retains its contents even when electrical power is removed, for example from an unexpected power loss, system crash, or normal shutdown. Properly used, NVDIMMs can improve application performance and system crash recovery time. They enhance solid-state drive (SSD) endurance and reliability.

<span class="mw-page-title-main">Memory cell (computing)</span> Part of computer memory

The memory cell is the fundamental building block of computer memory. The memory cell is an electronic circuit that stores one bit of binary information and it must be set to store a logic 1 and reset to store a logic 0. Its value is maintained/stored until it is changed by the set/reset process. The value in the memory cell can be accessed by reading it.

<span class="mw-page-title-main">UltraRAM</span>

UltraRAM is a brand name and a storage device technology that is under development. The Physics and Engineering department of Lancaster University in collaboration with Department of Physics at Warwick published a paper in the journal of advanced electronic materials suggesting an improvement in non volatile memory technology. It has been described as a memory storage technology that "combines the non-volatility of a data storage memory, like flash, with the speed, energy-efficiency, and endurance of a working memory, like DRAM" which means it could retain data like a hard drive. While the Lancaster team performed some basic experiments to demonstrate the principles in action, UltraRAM remains mostly theoretical at the moment. The Lancaster University researchers say that further work is ongoing to improve quality, fine-tune the fabrication process, and implement and scale UltraRAM devices.

References

  1. ↑ "What is DRAM's Future?". 9 April 2020.
  2. ↑ "What is DRAM's Future?". 9 April 2020.
  3. ↑ Slaughter, J. M.; Rizzo, N. D.; Mancoff, F. B.; Whig, R.; Smith, K.; Aggarwal, S.; Tehrani, S. (2010). "Toggle and Spin- Toggle and Spin-Torque MRAM: Status and OutlooK" (PDF). Magnetic Society of Japan. 5. Everspin Technologies: 171. S2CID   112533665 . Retrieved 2 December 2022.
  4. ↑ The Emergence of Practical MRAM "Archived copy" (PDF). Archived from the original (PDF) on 2011-04-27. Retrieved 2009-07-20.{{cite web}}: CS1 maint: archived copy as title (link)
  5. ↑ Mark LaPedus (June 18, 2009). "Tower invests in Crocus, tips MRAM foundry deal". EE Times. Retrieved July 10, 2013.
  6. ↑ "A new type of computer memory uses carbon, rather than silicon". The Economist. May 8, 2003. Retrieved July 10, 2013.
  7. ↑ John Leyden (May 13, 2003). "On ultra-fast carbon memory: Nanotube". The Register. Retrieved July 20, 2013.
  8. ↑ "Nanotube 'Universal Memory' A Turn-On For Computers". Museum of Science Current Science and Technology Center. Archived from the original on February 4, 2005. Retrieved July 14, 2013.
  9. ↑ LaPedus, Mark (August 13, 2008). "Lockheed buys Nantero's government unit" . Retrieved August 20, 2013.
  10. ↑ Efrain Viscarolasaga (January 22, 2009). "Nantero's semiconductors pull high patent power ranking". Mass High Tech. Retrieved July 10, 2013.
  11. ↑ "Lockheed Martin Tests Carbon Nanotube-Based Memory Devices on NASA Shuttle Mission". Press release. November 18, 2009. Retrieved July 14, 2013.
  12. ↑ "Nantero, imec Collaborate on Development of Carbon-Nanotube-Based Memory". AZOM: The A to Z of Materials. November 1, 2012. Retrieved August 20, 2013.
  13. ↑ Mellow, Chris (November 6, 2012). "Flash-killer nanotube memory firm teams with Belgians to try again: 3 yrs late, and counting - but now moving 'even faster'". The Register. Retrieved July 10, 2013.
  14. ↑ Resende, Patricia (November 28, 2012). "Nantero gets $10M to move product into commercialization". Mass High Tech. Retrieved July 10, 2013.
  15. ↑ "Nantero Secures Second Closing of Series D; Company Adds Major Strategic Investors". May 29, 2013. Retrieved August 20, 2013.
  16. ↑ Clarke, Peter (December 21, 2012). "10 top startups to watch in 2013". EE Times. Retrieved July 10, 2013.
  17. ↑ Mellor, Chris (31 August 2016). "Deep inside Nantero's non-volatile carbon nanotube RAM tech". The Register.
This page is based on this Wikipedia article
Text is available under the CC BY-SA 4.0 license; additional terms may apply.
Images, videos and audio are available under their respective licenses.