Execute in place

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In computer science, execute in place (XIP) is a method of executing programs directly from long term storage rather than copying it into RAM. It is an extension of using shared memory to reduce the total amount of memory required.


Its general effect is that the program text consumes no writable memory, saving it for dynamic data, and that all instances of the program are run from a single copy.

For this to work, several criteria have to be met:

The storage requirements are usually met by using NOR flash memory, which can be addressed as individual words for read operations, although it is a bit slower than normal system RAM in most setups.

Typically, the first stage boot loader is an XIP program that is linked to run at the address at which the flash chip(s) are mapped at power-up and contains a minimal program to set up the system RAM (which depends on the components used on the individual boards and cannot be generalized enough so that the proper sequence could be embedded into the processor hardware) and then loads the second stage bootloader or the OS kernel into RAM.

During this initialization, writable memory may not be available, so all computations have to be performed within the processor registers. For this reason, first stage boot loaders tend to be written in assembler language and only do the minimum to provide a normal execution environment for the next program. Some processors either embed a small amount of SRAM in the chip itself [1] , or allow using the onboard cache memory as RAM [2] , to make this first stage boot loader easier to write using high-level language.

For a kernel or bootloader, address space generally is assigned internally, so in order to use XIP for them, it is sufficient to instruct the linker to place unmodifiable and modifiable data in different address ranges and provide a mechanism for the modifiable data to be copied to writable memory before any code is run that assumes that data can be accessed normally. This can be done as part of the previous stage, or within a small code segment at the beginning of the program.

If address space is assigned externally, such as in an application program that is run on a system that does not provide virtual memory, the compiler needs to access all modifiable data by adding an offset to a pointer to a private copy of the data area. In this case, the external loader is responsible for setting up the instance specific memory areas.

XIP places requirements on file systems that are often difficult to meet. In systems without a page table, the entire file must be stored within consecutive bytes and must not be fragmented, while flash based file systems often aim to distribute data into sectors of the flash chip that have the least erase cycles and even out the wear on the chip, prolonging its lifetime.

All these complications and the speed tradeoff mean that XIP is generally only used for first stage bootloaders or when RAM is in extremely short supply. In particular, second through fourth generation video game consoles connect the ROM cartridge's address and data bus to that of the console, [3] which lets (for example) the Atari 2600 work with only the 128 bytes of RAM in its joystick interface IC.

A relatively new file system for Linux, called AXFS (Advanced XIP File System), aims to overcome some of the shortcomings associated with XIP, especially in regard to the in-place execution of user-space applications. It makes for instance possible to split up an executable binary file into "XIP regions", thus avoiding the restriction of fragmentation that was mentioned above.

A NetBSD implementation is also under development. [4]

See also

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  1. Samsung S3C2416X have 64kB embedded SRAM available on the system bus
  2. Broadcom BCM2835 uses its Level 2 Cache as boot loader RAM before SDRAM is initialized
  3. USpatent 4485457A,Richard K. Balaska, Robert L. Hunter, and Scott S. Robinson,"Memory system including RAM and page switchable ROM",issued 1984-11-27, assigned to CBS Inc.
  4. Uebayashi, Masao (2010-04-05). "eXecute-In-Place (XIP) Support for NetBSD" (PDF). BSDCan.