Edward B. Eichelberger

Last updated

Edward B. Eichelberger (born February 8, 1934, in Norfolk, VA) is an American engineer and wrestler. He holds the distinctions of IBM Fellow and IEEE Fellow (1986) for contributions to VLSI chip design, integrated circuit design, and electronic design automation. [1] Eichelberger shared with Thomas W. Williams (engineer) the 1989 IEEE Computer Society W. Wallace McDowell Award [1] “for developing the level-sensitive scan technique of testing solid-state logic circuits and for leading, defining, and promoting design for testability concepts.” In 2000, Eichelberger received the IEEE Test Technology Technical Council's Lifetime Contribution Medal. [2]

Contents

In 2009, Eichelberger was inducted in the National Wrestling Hall of Fame. [3]

Education and college wrestling

As a wrestler, Eichelberger won three state championships for Granby High School. [3] While at Lehigh University, he achieved a career record of 55-3-1 in college wrestling and was Lehigh's first three-time All-America champion. [3] Eichelberger obtained a B.S. degree in electrical engineering from Lehigh University in 1956. He then worked at IBM on solid state circuit design for three years. Eichelberger received a Ph.D. in electrical engineering from Princeton University in 1963.

Career

Eichelberger worked at IBM on chip design, circuit design, electronic design automation and circuit test automation from 1956 until 1994. [3] He received 25 patents. Among his remarkable contributions was a 1965 paper on hazard detection in combinational and sequential circuits. [4] In 1973, he was honored by the IBM Outstanding Contribution Award for the level-sensitive scan design (LSSD) technique. [5] His development of Weighted Random Patterns [6] was recognized with the IBM Outstanding Innovation Award. [1]

Computer History Museum recorded Eichelberger's oral history. [7]

Related Research Articles

<span class="mw-page-title-main">Digital electronics</span> Electronic circuits that utilize digital signals

Digital electronics is a field of electronics involving the study of digital signals and the engineering of devices that use or produce them. This is in contrast to analog electronics which work primarily with analog signals. Despite the name, digital electronics designs includes important analog design considerations.

Electronic design automation (EDA), also referred to as electronic computer-aided design (ECAD), is a category of software tools for designing electronic systems such as integrated circuits and printed circuit boards. The tools work together in a design flow that chip designers use to design and analyze entire semiconductor chips. Since a modern semiconductor chip can have billions of components, EDA tools are essential for their design; this article in particular describes EDA specifically with respect to integrated circuits (ICs).

ATPG is an electronic design automation method or technology used to find an input sequence that, when applied to a digital circuit, enables automatic test equipment to distinguish between the correct circuit behavior and the faulty circuit behavior caused by defects. The generated patterns are used to test semiconductor devices after manufacture, or to assist with determining the cause of failure. The effectiveness of ATPG is measured by the number of modeled defects, or fault models, detectable and by the number of generated patterns. These metrics generally indicate test quality and test application time. ATPG efficiency is another important consideration that is influenced by the fault model under consideration, the type of circuit under test, the level of abstraction used to represent the circuit under test, and the required test quality.

In electronics and computing, a soft error is a type of error where a signal or datum is wrong. Errors may be caused by a defect, usually understood either to be a mistake in design or construction, or a broken component. A soft error is also a signal or datum which is wrong, but is not assumed to imply such a mistake or breakage. After observing a soft error, there is no implication that the system is any less reliable than before. One cause of soft errors is single event upsets from cosmic rays.

<span class="mw-page-title-main">Boundary scan</span>


Boundary scan is a method for testing interconnects on printed circuit boards or sub-blocks inside an integrated circuit. Boundary scan is also widely used as a debugging method to watch integrated circuit pin states, measure voltage, or analyze sub-blocks inside an integrated circuit.

Asynchronous circuit is a sequential digital logic circuit that does not use a global clock circuit or signal generator to synchronize its components. Instead, the components are driven by a handshaking circuit which indicates a completion of a set of instructions. Handshaking works by simple data transfer protocols. Many synchronous circuits were developed in early 1950s as part of bigger asynchronous systems. Asynchronous circuits and theory surrounding is a part of several steps in integrated circuit design, a field of digital electronics engineering.

Design for testing or design for testability (DFT) consists of IC design techniques that add testability features to a hardware product design. The added features make it easier to develop and apply manufacturing tests to the designed hardware. The purpose of manufacturing tests is to validate that the product hardware contains no manufacturing defects that could adversely affect the product's correct functioning.

Rent's rule pertains to the organization of computing logic, specifically the relationship between the number of external signal connections to a logic block with the number of logic gates in the logic block, and has been applied to circuits ranging from small digital circuits to mainframe computers. Put simply, it states that there is a simple power law relationship between these two values.

Giovanni De Micheli is a research scientist in electronics and computer science. He is credited for the invention of the Network on a Chip design automation paradigm and for the creation of algorithms and design tools for Electronic Design Automation (EDA). He is Professor and Director of the Integrated Systems laboratory at École Polytechnique Fédérale de Lausanne (EPFL), Switzerland. Previously, he was Professor of Electrical Engineering at Stanford University. He was Director of the Electrical Engineering Institute at EPFL from 2008 to 2019 and program leader of the Swiss Federal Nano-Tera.ch program. He holds a Nuclear Engineer degree, a M.S. and a Ph.D. degree in Electrical Engineering and Computer Science under Alberto Sangiovanni-Vincentelli.

Edward Joseph McCluskey was a professor at Stanford University. He was a pioneer in the field of Electrical Engineering.

A Hardware Trojan (HT) is a malicious modification of the circuitry of an integrated circuit. A hardware Trojan is completely characterized by its physical representation and its behavior. The payload of an HT is the entire activity that the Trojan executes when it is triggered. In general, Trojans try to bypass or disable the security fence of a system: for example, leaking confidential information by radio emission. HTs also could disable, damage or destroy the entire chip or components of it.

John Patrick Hayes is an Irish-American computer scientist and electrical engineer, the Claude E. Shannon Chair of Engineering Science at the University of Michigan. He supervised over 35 doctoral students, coauthored seven books and over 340 peer-reviewed publications. His Erdös number is 2.

Prabhu Goel is an Indian American researcher, entrepreneur and businessman, known for having developed the PODEM Automatic test pattern generation and Verilog hardware description language.

Vishwani D. Agrawal is the James J. Danaher Professor of Electrical and Computer Engineering at Auburn University. He has over four decades of industry and university experience, including working at Bell Labs, Murray Hill, NJ, Rutgers University, TRW and IIT, Delhi. He is well known as a cofounder and long-term mentor of the International Conference on VLSI Design held annually in India since 1985.

<span class="mw-page-title-main">David Atienza</span> Spanish physicist and materials scientist

David Atienza Alonso is a Spanish/Swiss scientist in the disciplines of computer and electrical engineering. His research focuses on hardware‐software co‐design and management for energy‐efficient and thermal-aware computing systems, always starting from a system‐level perspective to the actual electronic design. He is a full professor of electrical and computer engineering at the Swiss Federal Institute of Technology in Lausanne (EPFL) and the head of the Embedded Systems Laboratory (ESL). He is an IEEE Fellow (2016), and an ACM Fellow (2022).

Vijaykrishnan Narayanan is the A. Robert Noll Chair Professor of Computer Science and Engineering and Electrical Engineering, Evan Pugh University Professor and the Associate Dean for Innovation at The Pennsylvania State University. He also serves as the director of the Penn State Center for Artificial Intelligence Foundations and Engineering Systems, and as the interim director of limited submission for the University's Office of the Senior Vice President of Research.

Yervant Zorian is an American electrical engineer known for his work on Integrated circuit testing. He is an IEEE Fellow for contributions to built-in self-test of complex devices and systems since 1999. Zorian won the 2005 Hans Karlsson Award and is a Chief Architect and Fellow at Synopsys. Zorian is also the President of Synopsys Armenia.

Thomas W. Williams was an American engineer, Chief Scientist and fellow at Synopsys. He is known for his contributions to electronic design, automation and testing of electronic systems.

<span class="mw-page-title-main">Igor L. Markov</span> American computer scientist and engineer

Igor Leonidovich Markov is an American professor, computer scientist and engineer. Markov is known for results in quantum computation, work on limits of computation, research on algorithms for optimizing integrated circuits and on electronic design automation, as well as artificial intelligence. Additionally, Markov is an American non-profit executive responsible for aid to Ukraine worth over a hundred million dollars.

S.Y.H. Su was professor of Computer Science known for his contributions in Hardware description languages and hardware testing. After serving at several institutions, he joined Binghamton University in 1978, from where he retired.

References

  1. 1 2 3 "Edward B. Eichelberger, Award Recipient". IEEE Computer Society. Retrieved August 22, 2023.
  2. "IEEE TTTC Lifetime Contribution Medal". ieee-tttc.org. Retrieved August 23, 2023.
  3. 1 2 3 4 "Edward B. Eichelberger". National Wrestling Hall of Fame. 2009.
  4. Eichelberger, Edward B. (1965). "Hazard Detection in Combinational and Sequential Switching Circuits". IBM J. Res. Dev. 9 (2): 90–99.
  5. Eichelberger, Edward B.; Lindbloom, Eric (1983). "Random-Pattern Coverage Enhancement and Diagnosis for LSSD Logic Self-Test". IBM J. Res. Dev. 27 (3): 265–272.
  6. Waicukauski, John A.; Lindbloom, Eric; Eichelberger, Edward B.; Forlenza, Orazio P. (1989). "A Method for Generating Weighted Random Test Patterns". IBM J. Res. Dev. 33 (2): 149–161.
  7. Oral History of Edward B. Eichelberger on YouTube