Probe card

Last updated
Typical probe card Probe card.JPG
Typical probe card

A probe card (commonly referred to as a DUT board) [lower-alpha 1] is used in automated integrated circuit testing. It is an interface between an electronic test system and a semiconductor wafer.

Contents

Use and manufacture

A probe card or DUT board is a printed circuit board (PCB), and is the interface between the integrated circuit and a test head, which in turn attaches to automatic test equipment (ATE) (or "tester"). [2] Typically, the probe card is mechanically docked to a Wafer testing prober and electrically connected to the ATE . Its purpose is to provide an electrical path between the test system and the circuits on the wafer, thereby permitting the testing and validation of the circuits at the wafer level, usually before they are diced and packaged. It normally comprises a PCB and some form of contact elements, usually metallic. [lower-alpha 2] [3]

A semiconductor manufacturer will typically require a new probe card for each new device wafer and for device shrinks (when the manufacturer reduces the size of the device while keeping its functionality) because the probe card is effectively a custom connector that takes the universal pattern of a given tester and translates the signals to connect to electrical pads on the wafer. For testing of Dynamic random-access memory (DRAM) and Flash memory (FLASH) devices, these pads are typically made of aluminum and are 40–90 um per side. Other devices may have flat pads, or raised bumps or pillars made of copper, copper alloys or many types of solders such as lead-tin, tin-silver and others.

A tektronix pin-grid array probe card DUT board 1.jpg
A tektronix pin-grid array probe card

The probe card must make good electrical contact to these pads or bumps during the testing of the device. When the testing of the device is complete, the prober will index the wafer to the next device to be tested.

Normally a probe card is inserted into a wafer prober, inside which the position of the wafer to be tested will be adjusted to ensure a precise contact between the probe card and wafer. Once the probe card and the wafer are loaded, a camera in the prober will optically locate several tips on the probe card and several marks or pads on the wafer, and using this information it will align the pads on the device under test (DUT) to the probe card contacts.

Design and types

Probe cards are broadly classified into needle type, vertical type, and MEMS (Micro Electro-Mechanical System) [4] type depending on shape and forms of contact elements. MEMS type is the most advanced technology currently available. The most advanced type of probe card currently can test an entire 12" wafer with one touchdown.

Probe cards or DUT boards are designed to meet both the mechanical and electrical requirements of the particular chip and the specific test equipment to be used. One type of DUT board is used for testing the individual die of a silicon wafer before they are cut free and packaged, and another type is used for testing packaged IC's.

Efficiency factors

160 Pin DUT PCB 160pin-DUT-PCB.jpg
160 Pin DUT PCB

Probe card efficiency is affected by many factors. Perhaps the most important factor impacting probe card efficiency is the number of DUTs that can be tested in parallel. Many wafers today are still tested one device at a time. If one wafer had 1000 of these devices and the time required to test one device was 10 seconds and the time for the prober to move from one device to another device was 1 second, then to test an entire wafer would take 1000 x 11 seconds = 11,000 seconds or roughly 3 hours. If however, the probe card and the tester could test 16 devices in parallel (with 16 times the electrical connections) then the test time would be reduced by almost exactly 16 times (to about 11 minutes). [lower-alpha 3]

Advanced Tester Resource Enhancement (ATRE) [5] is a powerful means of increasing the number of DUTs that can be tested by a probe card in parallel (or in one touchdown during which probe card needles remain in contact with the wafer DUTs). ATRE allows the sharing of tester resources among DUTs using active components, which have the ability to connect and disconnect DUTs from the tester resources. Without ATRE, a single tester resource (power, DC or AC signal) would normally only go directly to one DUT. However by installing ATRE-configured relays (switches) onto the probe card PCB, the tester resource can split or branch out to multiple DUTs. For example in a x4 sharing configuration, 1 power signal is fed into 4 relays whose outputs go to 4 DUTs, respectively. Then by turning each relay ON and OFF sequentially, the tester can test each of the 4 DUTs in turn during the same touchdown (without having to move the prober from one device to the other). Therefore a tester that has only 256 power signals will appear to have its resources expanded or enhanced so as to enable it to test 1024 DUTs in one touchdown, thanks to the 1024 onboard relays in the x4 sharing scheme implemented on the probe card. ATRE brings dramatic savings in terms of test time and cost, as it can allow a chip manufacturer or test house to validate more DUTs in one touchdown without the need to purchase a more advanced tester equipped with more resources.

Contamination issues

Another major factor is debris that accumulates on the tips of the probe needles. Normally these are made of tungsten or tungsten/rhenium alloys or advanced palladium based alloys like PdCuAg. [6] Some modern probe cards have contact tips manufactured by MEMS technologies. [7]

Irrespective of the probe tip material, contamination builds up on the tips as a result of successive touchdown events (where the probe tips make physical contact with the bond pads of the die). Accumulation of debris has an adverse effect on the critical measurement of contact resistance. To return a used probe card to a contact resistance that is acceptable, the probe tips must be spotless. Cleaning can be done offline using an NWR style laser to reclaim the tips by selectively removing the contamination. Online cleaning can be used during testing to optimize the testing results within the wafer or within wafer lots.

Notes

  1. Besides Device Under Testing board (DUT), probe cards may also be called Probecard Interface Boards (PIBs) or Device Interface Boards (DIBs); DUT refers to the circuit being tested. [1]
  2. Atypically, contact elements may also be of other materials than metal
  3. Note that because now the probe card has 16 devices, as the prober touches down on the round wafer, it may not always contact an active device and will therefore be a little less than 16 times as fast to test one wafer.

Related Research Articles

<span class="mw-page-title-main">Printed circuit board</span> Board to support and connect electronic components

A printed circuit board is a medium used to connect electronic components to one another in a controlled manner. It takes the form of a laminated sandwich structure of conductive and insulating layers: each of the conductive layers is designed with an artwork pattern of traces, planes and other features etched from one or more sheet layers of copper laminated onto and/or between sheet layers of a non-conductive substrate. Electrical components may be fixed to conductive pads on the outer layers in the shape designed to accept the component's terminals, generally by means of soldering, to both electrically connect and mechanically fasten them to it. Another manufacturing process adds vias: plated-through holes that allow interconnections between layers.

<span class="mw-page-title-main">Electronic test equipment</span> Testing appliance for electronics systems

Electronic test equipment is used to create signals and capture responses from electronic devices under test (DUTs). In this way, the proper operation of the DUT can be proven or faults in the device can be traced. Use of electronic test equipment is essential to any serious work on electronics systems.

<span class="mw-page-title-main">Flip chip</span> Technique that flips a microchip upside down to connect it

Flip chip, also known as controlled collapse chip connection or its abbreviation, C4, is a method for interconnecting dies such as semiconductor devices, IC chips, integrated passive devices and microelectromechanical systems (MEMS), to external circuitry with solder bumps that have been deposited onto the chip pads. The technique was developed by General Electric's Light Military Electronics Department, Utica, New York. The solder bumps are deposited on the chip pads on the top side of the wafer during the final wafer processing step. In order to mount the chip to external circuitry, it is flipped over so that its top side faces down, and aligned so that its pads align with matching pads on the external circuit, and then the solder is reflowed to complete the interconnect. This is in contrast to wire bonding, in which the chip is mounted upright and fine wires are welded onto the chip pads and lead frame contacts to interconnect the chip pads to external circuitry.

Wafer testing is a step performed during semiconductor device fabrication after BEOL process is finished. During this step, performed before a wafer is sent to die preparation, all individual integrated circuits that are present on the wafer are tested for functional defects by applying special test patterns to them. The wafer testing is performed by a piece of test equipment called a wafer prober. The process of wafer testing can be referred to in several ways: Wafer Final Test (WFT), Electronic Die Sort (EDS) and Circuit Probe (CP) are probably the most common.

<span class="mw-page-title-main">Automatic test equipment</span> Apparatus used in hardware testing that carries out a series of tests automatically

Automatic test equipment or automated test equipment (ATE) is any apparatus that performs tests on a device, known as the device under test (DUT), equipment under test (EUT) or unit under test (UUT), using automation to quickly perform measurements and evaluate the test results. An ATE can be a simple computer-controlled digital multimeter, or a complicated system containing dozens of complex test instruments capable of automatically testing and diagnosing faults in sophisticated electronic packaged parts or on wafer testing, including system on chips and integrated circuits.

A via is an electrical connection between copper layers in a printed circuit board. Essentially a via is a small drilled hole that goes through two or more adjacent layers; the hole is plated with copper that forms electrical connection through the insulation that separates the copper layers.

<span class="mw-page-title-main">Bed of nails tester</span> Electronic test fixture used for in-circuit testing

A bed of nails tester is a traditional electronic test fixture used for in-circuit testing. It has numerous pins inserted into holes in an epoxy phenolic glass cloth laminated sheet (G-10) which are aligned using tooling pins to make contact with test points on a printed circuit board and are also connected to a measuring unit by wires. Named by analogy with a real-world bed of nails, these devices contain an array of small, spring-loaded pogo pins; each pogo pin makes contact with one node in the circuitry of the DUT. By pressing the DUT down against the bed of nails, reliable contact can be quickly and simultaneously made with hundreds or even thousands of individual test points within the circuitry of the DUT. The hold-down force may be provided manually or by means of a vacuum or a mechanical presser, thus pulling the DUT downwards onto the nails.

A device under test (DUT), also known as equipment under test (EUT) and unit under test (UUT), is a manufactured product undergoing testing, either at first manufacture or later during its life cycle as part of ongoing functional testing and calibration checks. This can include a test after repair to establish that the product is performing in accordance with the original product specification.

<span class="mw-page-title-main">Flat no-leads package</span> Integrated circuit package with contacts on all 4 sides, on the underside of the package

Flat no-leads packages such as quad-flat no-leads (QFN) and dual-flat no-leads (DFN) physically and electrically connect integrated circuits to printed circuit boards. Flat no-leads, also known as micro leadframe (MLF) and SON, is a surface-mount technology, one of several package technologies that connect ICs to the surfaces of PCBs without through-holes. Flat no-lead is a near chip scale plastic encapsulated package made with a planar copper lead frame substrate. Perimeter lands on the package bottom provide electrical connections to the PCB. Flat no-lead packages usually, but not always, include an exposed thermally conductive pad to improve heat transfer out of the IC. Heat transfer can be further facilitated by metal vias in the thermal pad. The QFN package is similar to the quad-flat package (QFP), and a ball grid array (BGA).

SPEA is an Italian company that designs and manufactures Automatic Test Equipment (ATE) for testing MEMS, Sensors, microchips and Printed circuit board.

<span class="mw-page-title-main">Pogo pin</span> Type of electrical connector mechanism

A pogo pin or spring-loaded pin is a type of electrical connector mechanism that is used in many modern electronic applications and in the electronics testing industry. They are used for their improved durability over other electrical contacts, and the resilience of their electrical connection to mechanical shock and vibration.

<span class="mw-page-title-main">Mechanical probe station</span>

A mechanical probe station is used to physically acquire signals from the internal nodes of a semiconductor device. The probe station utilizes manipulators which allow the precise positioning of thin needles on the surface of a semiconductor device. If the device is being electrically stimulated, the signal is acquired by the mechanical probe and is displayed on an oscilloscope or SMU. The mechanical probe station is often used in the failure analysis of semiconductor devices.

In-circuit testing (ICT) is an example of white box testing where an electrical probe tests a populated printed circuit board (PCB), checking for shorts, opens, resistance, capacitance, and other basic quantities which will show whether the assembly was correctly fabricated. It may be performed with a "bed of nails" test fixture and specialist test equipment, or with a fixtureless in-circuit test setup.

<span class="mw-page-title-main">Bead probe technology</span> Technique used for in-circuit testing

Bead probe technology (BPT) is technique used to provide electrical access to printed circuit board (PCB) circuitry for performing in-circuit testing (ICT). It makes use of small beads of solder placed onto the board's traces to allow measuring and controlling of the signals using a test probe. This permits test access to boards on which standard ICT test pads are not feasible due to space constraints.

In the manufacture of electronic printed circuit boards, flying probes are used for testing both bare circuit boards and boards loaded with components. Flying probes were introduced in the late 1980’s. Flying probes can be found in many manufacturing and assembly operations. A flying probe tester uses one or more test probes to make contact with the circuit board under test; the probes are moved from place to place on the circuit board to carry out tests of multiple conductors or components. Flying probe testers are an alternative to bed of nails testers, which use multiple contacts to simultaneously contact the board and which rely on electrical switching to carry out measurements.

Non contact wafer testing is a normal step in semiconductor device fabrication, used to detect defects in integrated circuits (IC) before they are assembled during the IC packaging step.

<span class="mw-page-title-main">Contact pad</span>

Contact pads or bond pads are small, conductive surface areas of a printed circuit board (PCB) or die of an integrated circuit. They are often made of gold, copper, or aluminum and measure mere micrometres wide. Pads are positioned on the edges of die, to facilitate connections without shorting. Contact pads exist to provide a larger surface area for connections to a microchip or PCB, allowing for the input and output of data and power.

Circuit Check is an American company with about 225 employees and seven direct operations in six countries. Headquartered in Maple Grove, Minnesota, it is one of the largest manufacturers of electronic and mechanical test fixtures in North America, . The company also manufactures Automatic Test Equipment for end-of-line manufacturing test. The company uses either a Microsoft Excel-driven "CCITest" software platform, or the National Instruments LabVIEW software platform. They have a variety of clients in different industries which include: Automotive, Military & Aerospace, Medical, Industrial, and Computer Networking.

In the electronics industry, embedded instrumentation refers to the integration of test and measurement instrumentation into semiconductor chips. Embedded instrumentation differs from embedded system, which are electronic systems or subsystems that usually comprise the control portion of a larger electronic system. Instrumentation embedded into chips is employed in a variety of electronic test applications, including validating and testing chips themselves, validating, testing and debugging the circuit boards where these chips are deployed, and troubleshooting systems once they have been installed in the field.

Glossary of microelectronics manufacturing terms

References

  1. "Performance Test Terminology for EtherNet/IP Devices" (PDF). Archived from the original (PDF) on 2016-09-14. Retrieved 2022-01-24.
  2. "ATE Load Boards/DUT Boards/Interface Boards". www.eesemi.com. Retrieved 2022-01-24.
  3. Sayil, Selahattin (2018). Contactless VLSI Measurement and Testing Techniques. Springer International Publishing. pp. 1–3. doi:10.1007/978-3-319-69673-7. ISBN   978-3-319-69672-0.
  4. William Mann. ""Leading Edge" of Wafer Level Testing" (PDF).
  5. Michael Huebner (FormFactor) (2013). "Use of Resource Sharing Techniques to Increase Parallel Test and Test Coverage in Wafer Test" (PDF). IEEE SWTW.
  6. "Materials for Probe Needles". heraeus.com. Retrieved 9 June 2020.
  7. "Vertical MEMS Probe Technology For Advanced Packaging" (PDF). formfactor.com. Retrieved 9 June 2020.