Sam Naffziger

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Sam Naffziger
Born
Samuel Naffziger
Alma mater California Institute of Technology (BS)
Stanford University (MSc)
Employer AMD

Samuel Naffziger is an American electrical engineer who has been employed at Advanced Micro Devices in Fort Collins, Colorado since 2006. He was named a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) in 2014 for his leadership in the development of power management and low-power processor technologies. [1] He is also the Senior Vice President and Product Technology Architect at AMD. [2]

Contents

Education

Naffziger received a Bachelor of Science degree in electrical engineering from the California Institute of Technology and a Master of Science in computer engineering from Stanford University. [3]

Career

Early career

For eight years, Naffziger led the Itanium design team at Hewlett-Packard before moving to Intel in 2002. [4] At Intel, Naffziger played a leading role in the introduction of two major Itanium models at the International Solid State Circuits Conference, the McKinley processor in 2002 and Montecito in 2005. [5]

2006-present: Advanced Micro Devices

Naffziger was an architect lead on AMD's Ryzen processors that launched in March 2017. [6] He was the lead advocate for AMD's Ryzen and Epyc lines to move to a modular, chiplet-based approach. [7] Towards the end of 2017, Naffziger began to lead the AMD graphics team in bringing a chiplet architecture to graphics with the RDNA 3 architecture, released in 2022. [8]

Academic works

Related Research Articles

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Advanced Micro Devices, Inc. (AMD) is an American multinational corporation and semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets.

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<span class="mw-page-title-main">Itanium</span> Family of 64-bit Intel microprocessors

Itanium is a discontinued family of 64-bit Intel microprocessors that implement the Intel Itanium architecture. The Itanium architecture originated at Hewlett-Packard (HP), and was later jointly developed by HP and Intel. Launched in June 2001, Intel initially marketed the processors for enterprise servers and high-performance computing systems. In the concept phase, engineers said "we could run circles around PowerPC...we could kill the x86." Early predictions were that IA-64 would expand to the lower-end servers, supplanting Xeon, and eventually penetrate into the personal computers, eventually to supplant reduced instruction set computing (RISC) and complex instruction set computing (CISC) architectures for all general-purpose applications.

x86 Family of instruction set architectures

x86 is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel based on the Intel 8086 microprocessor and its 8088 variant. The 8086 was introduced in 1978 as a fully 16-bit extension of Intel's 8-bit 8080 microprocessor, with memory segmentation as a solution for addressing more memory than can be covered by a plain 16-bit address. The term "x86" came into being because the names of several successors to Intel's 8086 processor end in "86", including the 80186, 80286, 80386 and 80486 processors. Colloquially, their names were "186", "286", "386" and "486".

IA-64 is the instruction set architecture (ISA) of the discontinued Itanium family of 64-bit Intel microprocessors. The basic ISA specification originated at Hewlett-Packard (HP), and was subsequently implemented by Intel in collaboration with HP. The first Itanium processor, codenamed Merced, was released in 2001.

<span class="mw-page-title-main">Multi-chip module</span> Electronic assembly containing multiple integrated circuits that behaves as a unit

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<span class="mw-page-title-main">Zen (first generation)</span> 2017 AMD 14-nanometre processor microarchitecture

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<span class="mw-page-title-main">Zen 2</span> 2019 AMD 7-nanometre processor microarchitecture

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<span class="mw-page-title-main">Ryzen</span> AMD brand for microprocessors

Ryzen is a brand of multi-core x86-64 microprocessors designed and marketed by Advanced Micro Devices (AMD) for desktop, mobile, server, and embedded platforms based on the Zen microarchitecture. It consists of central processing units (CPUs) marketed for mainstream, enthusiast, server, and workstation segments and accelerated processing units (APUs) marketed for mainstream and entry-level segments and embedded systems applications.

<span class="mw-page-title-main">Epyc</span> AMD brand for server microprocessors

Epyc is a brand of multi-core x86-64 microprocessors designed and sold by AMD, based on the company's Zen microarchitecture. Introduced in June 2017, they are specifically targeted for the server and embedded system markets.

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<span class="mw-page-title-main">Zen 4</span> 2022 AMD 5-nanometer processor microarchitecture

Zen 4 is the codename for a CPU microarchitecture designed by AMD, released on September 27, 2022. It is the successor to Zen 3 and uses TSMC's N6 process for I/O dies, N5 process for CCDs, and N4 process for APUs. Zen 4 powers Ryzen 7000 performance desktop processors, Ryzen 8000G series mainstream desktop APUs, and Ryzen Threadripper 7000 series HEDT and workstation processors. It is also used in extreme mobile processors, thin & light mobile processors, as well as EPYC 8004/9004 server processors.

<span class="mw-page-title-main">Zen 3</span> 2020 AMD 7-nanometer processor microarchitecture

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A 2.5D integrated circuit is an advanced packaging technique that combines multiple integrated circuit dies in a single package without stacking them into a three-dimensional integrated circuit (3D-IC) with through-silicon vias (TSVs). The term "2.5D" originated when 3D-ICs with TSVs were quite new and still very difficult. Chip designers realized that many of the advantages of 3D integration could be approximated by placing bare dies side by side on an interposer instead of stacking them vertically. If the pitch is very fine and the interconnect very short, the assembly can be packaged as a single component with better size, weight, and power characteristics than a comparable 2D circuit board assembly. This half-way 3D integration was facetiously named "2.5D" and the name stuck. Since then, 2.5D has proven to be far more than just "half-way to 3D." Some benefits:

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References

  1. "2014 elevated fellow". IEEE Fellows Directory. Archived from the original on December 31, 2014. Retrieved April 12, 2017.
  2. "Sam Naffziger". AMD. Retrieved April 3, 2023.
  3. "AMD Senior VP and Low-Power Guru, Samuel Naffziger, Addresses the Looming Electronics Power Challenge". All About Circuits. Retrieved April 3, 2023.
  4. Kanellos, Michael (January 25, 2002). "Intel's Itanium: Plan B in the works". ZDNet. Retrieved April 3, 2023.
  5. Shankland, Stephen (March 29, 2006). "AMD lures high-ranking Itanium designer". ZDNet. Retrieved April 3, 2023.
  6. Chuang, Tamara (March 3, 2017). "AMD unveils faster, half-price computer chip". The Denver Post. Retrieved April 3, 2023.
  7. Alcorn, Paul; Walton, Jarred (June 23, 2022). "Into the GPU Chiplet Era: An Interview With AMD's Sam Naffziger". Tom's Hardware. Retrieved April 3, 2023.
  8. Brosdahl, Peter (November 22, 2022). "AMD Lead Engineer Sam Naffziger Explains Advantages of RDNA3 Chiplet Design". The FPS Review. Retrieved April 3, 2023.