Todd Austin

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Todd Austin
Todd Austin.jpg
Alma mater University of Wisconsin-Madison (PhD)

Rochester Institute of Technology (MS)

University of Wisconsin-Madison (BS)
Awards B. Ramakrishna Rau Award [1] (2024)

IEEE MICRO Test of Time Award [2] (2018)

Distinguished Faculty Achievement Award, University of Michigan [3] (2018)

Contents

IEEE Fellow (2017)[ citation needed ]

IEEE Symposium on Security and Privacy Distinguished Paper Award [4] (2016)

University of Michigan College of Engineering Research Excellence Award [5] (2015)

Richard Newton GSRC Industrial Impact Award [6] (2012)

Richard Newton GSRC Industrial Impact Award [7] (2008)

Maurice Wilkes Award (2007)[ citation needed ]

Alfred P. Sloan Research Fellow [8] (2002)

NSF CAREER Award (2001)
Scientific career
Institutions Xerox

Intel

University of Michigan

Agita Labs
Thesis Hardware and Software Mechanisms for Reducing Load Latency
Academic advisorsGurindar S. Sohi

Todd M. Austin is an American computer scientist and educator who is a Professor of Computer Science and Engineering at the University of Michigan. He is recognized for his work in computer architecture, computer security, VLSI design, and system verification. He is the co-author of the textbook Structured Computer Organization (6th Edition) [9] with Andrew Tanenbaum. wi

Career

Austin was an Associate Professor from June 2003 to August 2009 and an Assistant Professor from July 1999 to June 2003.[ citation needed ]

Since September 2009, Austin has served as a Professor of Computer Science and Engineering at the University of Michigan. [10] He also worked in the administration of the Center for Applications Driving Architectures (ADA) from January 2019 until the end of 2022 , under the title "Center Evangelist". [11] Since June 2018, Austin has served as the director of the Ethiopia-Michigan Collaborative Consortium (EMC²). [12] He is also a co-creator and co-director of African Undergraduate Research Adventure (AURA) program, [13] which offers undergraduate students from African countries an opportunity to get hands-on experience with research at the University of Michigan. From January 2012 to December 2017, he served as Director of the Center for Future Architectures Research (C-FAR), [14] a multi-university center.

Industry

Austin worked as an Associate Engineer at Xerox Corporation from January 1988 to April 1990.[ citation needed ] He was a Senior Computer Architect at Intel Corporation from April 1996 to May 1999.[ citation needed ]

Austin is the cofounder and CEO of Agita Labs since November 2018. [15] Agita Labs is a firm offering security solutions that implement many of the ideas explored in Austin's research to companies in industry seeking a zero-trust data sharing model.

Contributions to computer architecture

Austin's research is primarily in the area of computer architecture. His research interests include system design, hardware and software verification, and performance analysis tools and techniques. [10]

Among his most notable works are the development of the SimpleScalar Tool Set, [16] a widely used collection of computer architecture performance analysis tools, and the design of the DIVA and RAZOR architectures. DIVA (Dynamic Instruction Verification Architecture) is a dynamic verification approach that aims to significantly reduce the burden of verification for microprocessors by incorporating functional checking circuitry. [17] RAZOR is another architecture that focuses on achieving reliable and low-power operation. [18] Austin has also contributed to benchmark suites for embedded systems, such as MiBench, [19] and research into secure processors like Morpheus. [20] In recognition of his innovative contributions in computer architecture including the SimpleScalar Toolkit and the DIVA and Razor architectures, he has received many awards including the ACM Maurice Wilkes Award in 2007 and B. Ramakrishna Rau Award in 2024.[ citation needed ]

References

  1. "B. Ramakrishna Rau Award". IEEE computer society. 9 April 2018. Retrieved 11 June 2025.
  2. "ACM SIGMICRO". ACM SIGMICRO.
  3. "Distinguished Faculty Achievement Awards". Rackham Graduate School: University of Michigan. University of Michigan. Retrieved 11 June 2025.
  4. "37th IEEE Symposium on Security and Privacy". IEEE Symposium on Security and Privacy. Retrieved 11 June 2025.
  5. "Four CSE Faculty Selected for 2014-15 College of Engineering Awards". University of Michigan. Retrieved 11 June 2025.
  6. "Todd Austin Receives A. Richard Newton GSRC Industrial Impact Award for 2012". Computer Science and Engineering. University of Michigan. Retrieved 11 June 2025.
  7. "Austin and Blaauw Receive 2008 Richard Newton GSRC Industrial Impact Award". Computer Science and Engineering. University of Michigan. Retrieved 11 June 2025.
  8. "Fellows Database". Sloan Foundation. Retrieved 11 June 2025.
  9. Austin, Todd (2012). STRUCTURED COMPUTER ORGANIZATION (6th ed.). Pearson Education. p. 3. ISBN   978-0-13-291652-3.
  10. 1 2 "EECS Electrical Engineering and computer science university of Michigan". EECS directory.
  11. "Application Driving Architectures team". Application Driving Architectures.
  12. "asc - the first decade" (PDF). pp. 14–15.
  13. "Todd Austin and Valeria Bertacco receive North Campus Deans' MLK Spirit Award". Computer Science and Engineering. Retrieved 2025-06-12.
  14. Lovos, Milagros (2024-08-22). "Todd Austin". IEEE Computer Society. Retrieved 2025-06-11.
  15. "Agita labs Meet the team".
  16. Burger, Doug; Austin, Todd M. (1997-06-01). "The SimpleScalar tool set, version 2.0". SIGARCH Comput. Archit. News. 25 (3): 13–25. doi:10.1145/268806.268810. ISSN   0163-5964.
  17. Austin, T.M. (1999). "DIVA: A reliable substrate for deep submicron microarchitecture design". MICRO-32. Proceedings of the 32nd Annual ACM/IEEE International Symposium on Microarchitecture. pp. 196–207. doi:10.1109/MICRO.1999.809458. ISBN   0-7695-0437-X.
  18. Ernst, D.; Das, S.; Lee, S.; Blaauw, D.; Austin, T.; Mudge, T.; Kim, Nam Sung; Flautner, K. (2004). "Razor: circuit-level correction of timing errors for low-power operation". IEEE Micro. 24 (6): 10–20. Bibcode:2004IMicr..24f..10E. doi:10.1109/MM.2004.85. ISSN   1937-4143.
  19. Guthaus, M.R.; Ringenberg, J.S.; Ernst, D.; Austin, T.M.; Mudge, T.; Brown, R.B. (2001). "MiBench: A free, commercially representative embedded benchmark suite". Proceedings of the Fourth Annual IEEE International Workshop on Workload Characterization. WWC-4 (Cat. No.01EX538). pp. 3–14. doi:10.1109/WWC.2001.990739. ISBN   0-7803-7315-4.
  20. Gallagher, Mark; Biernacki, Lauren; Chen, Shibo; Aweke, Zelalem Birhanu; Yitbarek, Salessawi Ferede; Aga, Misiker Tadesse; Harris, Austin; Xu, Zhixing; Kasikci, Baris; Bertacco, Valeria; Malik, Sharad; Tiwari, Mohit; Austin, Todd (2019-04-04). "Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn". Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems. ASPLOS '19. New York, NY, USA: Association for Computing Machinery. pp. 469–484. doi:10.1145/3297858.3304037. ISBN   978-1-4503-6240-5.