Triple fault

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On the x86 computer architecture, a triple fault is a special kind of exception generated by the CPU when an exception occurs while the CPU is trying to invoke the double fault exception handler, which itself handles exceptions occurring while trying to invoke a regular exception handler.


x86 processors beginning with the 80286 will cause a shutdown cycle to occur when a triple fault is encountered. This typically causes the motherboard hardware to initiate a CPU reset, which, in turn, causes the whole computer to reboot. [1] [2]

Possible causes of triple faults

Triple faults indicate a problem with the operating system kernel or device drivers. In modern operating systems, a triple fault is typically caused by a buffer overflow or underflow in a device driver which writes over the interrupt descriptor table (IDT). If the IDT is corrupted, when the next interrupt happens, the processor will be unable to call either the needed interrupt handler or the double fault handler because the descriptors in the IDT are corrupted.[ citation needed ]

Virtual machines

In QEMU, a triple fault produces a dump of the virtual machine in the console, with the instruction pointer set to the instruction that triggered the first exception.

When using Intel VT-x, a triple fault causes a VM exit, with exit reason 2. The exit reason is saved to the VMCS and may be handled by the VMM software.

Other uses

The Intel 80286 processor was the first x86 processor to introduce the now-ubiquitous protected mode. However, the 286 could not revert to the basic 8086-compatible "real mode" without resetting the processor, which can only be done using hardware external to the CPU. On the IBM AT and compatibles, the documented method of doing this was to use a special function on the Intel 8042 keyboard controller, which would assert the RESET pin of the processor. However, intentionally triple-faulting the CPU was found to cause the transition to occur much faster and more cleanly, permitting multitasking operating systems to switch back and forth at high speed. [3]

Some operating system kernels, such as Linux, still use triple faults as a last effort in their rebooting process if an ACPI reboot fails. This is done by setting the IDT register to 0 and then issuing an interrupt. [1] Since the table now has length 0, all attempts to access it fail and the processor generates a triple fault.

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Intel 80286 Microprocessor model

The Intel 80286 is a 16-bit microprocessor that was introduced on February 1, 1982. It was the first 8086-based CPU with separate, non-multiplexed address and data buses and also the first with memory management and wide protection abilities. The 80286 used approximately 134,000 transistors in its original nMOS (HMOS) incarnation and, just like the contemporary 80186, it could correctly execute most software written for the earlier Intel 8086 and 8088 processors.

x86 Family of instruction set architectures

x86 is a family of instruction set architectures initially developed by Intel based on the Intel 8086 microprocessor and its 8088 variant. The 8086 was introduced in 1978 as a fully 16-bit extension of Intel's 8-bit 8080 microprocessor, with memory segmentation as a solution for addressing more memory than can be covered by a plain 16-bit address. The term "x86" came into being because the names of several successors to Intel's 8086 processor end in "86", including the 80186, 80286, 80386 and 80486 processors.

Real mode, also called real address mode, is an operating mode of all x86-compatible CPUs. The mode gets its name from the fact that addresses in real mode always correspond to real locations in memory. Real mode is characterized by a 20-bit segmented memory address space and unlimited direct software access to all addressable memory, I/O addresses and peripheral hardware. Real mode provides no support for memory protection, multitasking, or code privilege levels.

x86 memory segmentation refers to the implementation of memory segmentation in the Intel x86 computer instruction set architecture. Segmentation was introduced on the Intel 8086 in 1978 as a way to allow programs to address more than 64 KB (65,536 bytes) of memory. The Intel 80286 introduced a second version of segmentation in 1982 that added support for virtual memory and memory protection. At this point the original model was renamed real mode, and the new version was named protected mode. The x86-64 architecture, introduced in 2003, has largely dropped support for segmentation in 64-bit mode.

In computing, protected mode, also called protected virtual address mode, is an operational mode of x86-compatible central processing units (CPUs). It allows system software to use features such as virtual memory, paging and safe multi-tasking designed to increase an operating system's control over application software.

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A general protection fault (GPF) in the x86 instruction set architectures (ISAs) is a fault initiated by ISA-defined protection mechanisms in response to an access violation caused by some running code, either in the kernel or a user program. The mechanism is first described in Intel manuals and datasheets for the Intel 80286 CPU, which was introduced in 1983; it is also described in section 9.8.13 in the Intel 80386 programmer's reference manual from 1986. A general protection fault is implemented as an interrupt. Some operating systems may also classify some exceptions not related to access violations, such as illegal opcode exceptions, as general protection faults, even though they have nothing to do with memory protection. If a CPU detects a protection violation, it stops executing the code and sends a GPF interrupt. In most cases, the operating system removes the failing process from the execution queue, signals the user, and continues executing other processes. If, however, the operating system fails to catch the general protection fault, i.e. another protection violation occurs before the operating system returns from the previous GPF interrupt, the CPU signals a double fault, stopping the operating system. If yet another failure occurs, the CPU is unable to recover; since 80286, the CPU enters a special halt state called "Shutdown", which can only be exited through a hardware reset. The IBM PC AT, the first PC-compatible system to contain an 80286, has hardware that detects the Shutdown state and automatically resets the CPU when it occurs. All descendants of the PC AT do the same, so in a PC, a triple fault causes an immediate system reset.

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On the x86 architecture, a double fault exception occurs if the processor encounters a problem while trying to service a pending interrupt or exception. An example situation when a double fault would occur is when an interrupt is triggered but the segment in which the interrupt handler resides is invalid. If the processor encounters a problem when calling the double fault handler, a triple fault is generated and the processor shuts down.

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Protection ring Layer of protection in computer systems

In computer science, hierarchical protection domains, often called protection rings, are mechanisms to protect data and functionality from faults and malicious behavior. This approach is diametrically opposite to that of capability-based security.

The Interrupt Descriptor Table (IDT) is a data structure used by the x86 architecture to implement an interrupt vector table. The IDT is used by the processor to determine the correct response to interrupts and exceptions.

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In computing, rebooting is the process by which a running computer system is restarted, either intentionally or unintentionally. Reboots can be either cold, in which the power to the system is physically turned off and back on again causing an initial boot of the machine, or warm in which the system restarts without the need to interrupt the power. The term restart is used to refer to a reboot when the operating system closes all programs and finalizes all pending input and output operations before initiating a soft reboot.


  1. 1 2 Collins, Robert (2000). "Triple Faulting the CPU". Productivity Enhancements and Programming Tricks. Archived from the original on 2017-09-09. Retrieved 2015-11-22.
  2. Collins, Robert (2000). "ELEGANT RESET". Archived from the original on 2017-09-09. Retrieved 2017-09-09.
  3. Osterman, Larry (2005-02-08). "Faster Syscall Trap redux". Larry Osterman's WebLog. MSDN Blogs. Archived from the original on 2017-09-09. Retrieved 2010-07-23.