An aligner, or mask aligner, is a system that produces integrated circuits (IC) using the photolithography process. It holds the photomask over the silicon wafer while a bright light is shone through the mask and onto the photoresist. The "alignment" refers to the ability to place the mask over precisely the same location repeatedly as the chip goes through multiple rounds of lithography.
Aligners were a major part of IC manufacture from the 1960s into the late 1970s, when they began to be replaced by the stepper. [1] [2] Currently, mask aligners are still used in academia and research, as projects often involve devices made using photolithography in smaller batches. [3]
There are several distinct generations of aligner technology. The early contact aligners placed the mask in direct contact with the top surface of the wafer, which often damaged the pattern when the mask was lifted off again. Used only briefly, proximity aligners held the mask slightly above the surface to avoid this problem, but were difficult to work with and required considerable manual adjustment. Finally, the Micralign projection aligner, introduced by Perkin-Elmer in 1973, held the mask entirely separate from the chip and made the adjustment of the image much simpler. [1] [2] Through these stages of development, yields improved from perhaps 10% to about 70%, leading to a corresponding reduction in chip prices. [1] [2]
A typical mask aligner consists of the following parts:
The projection aligner is similar to the wafer stepper in concept, but with one key difference. The aligner uses a mask that holds the pattern for the entire wafer, which may require large masks. The stepper uses a smaller mask on the wafer repeatedly, and steps across the surface to repeat the pattern of the chip layer. [5] [6] This reduces mask costs dramatically and allows a single wafer to be used for different integrated circuit layouts or mask designs in a single run. More importantly, by focussing the light source onto a single area of the wafer, the stepper can produce much higher resolutions, thus allowing for smaller features on chips (minimum feature size). The disadvantage to the stepper is that each chip on the wafer has to be individually imaged, and thus the process of exposing the wafer as a whole is much slower.
MEMS is the technology of microscopic devices incorporating both electronic and moving parts. MEMS are made up of components between 1 and 100 micrometres in size, and MEMS devices generally range in size from 20 micrometres to a millimetre, although components arranged in arrays can be more than 1000 mm2. They usually consist of a central unit that processes data and several components that interact with the surroundings.
Photolithography is a process used in the manufacturing of integrated circuits. It involves using light to transfer a pattern onto a substrate, typically a silicon wafer.
Flip chip, also known as controlled collapse chip connection or its abbreviation, C4, is a method for interconnecting dies such as semiconductor devices, IC chips, integrated passive devices and microelectromechanical systems (MEMS), to external circuitry with solder bumps that have been deposited onto the chip pads. The technique was developed by General Electric's Light Military Electronics Department, Utica, New York. The solder bumps are deposited on the chip pads on the top side of the wafer during the final wafer processing step. In order to mount the chip to external circuitry, it is flipped over so that its top side faces down, and aligned so that its pads align with matching pads on the external circuit, and then the solder is reflowed to complete the interconnect. This is in contrast to wire bonding, in which the chip is mounted upright and fine wires are welded onto the chip pads and lead frame contacts to interconnect the chip pads to external circuitry.
A photomask is an opaque plate with transparent areas that allow light to shine through in a defined pattern. Photomasks are commonly used in photolithography for the production of integrated circuits to produce a pattern on a thin wafer of material. In semiconductor manufacturing, a mask is sometimes called a reticle.
The planar process is a manufacturing process used in the semiconductor industry to build individual components of a transistor, and in turn, connect those transistors together. It is the primary process by which silicon integrated circuit chips are built, and it is the most commonly used method of producing junctions during the manufacture of semiconductor devices. The process utilizes the surface passivation and thermal oxidation methods.
Masklesslithography (MPL) is a photomask-less photolithography-like technology used to project or focal-spot write the image pattern onto a chemical resist-coated substrate by means of UV radiation or electron beam.
Nanolithography (NL) is a growing field of techniques within nanotechnology dealing with the engineering of nanometer-scale structures on various materials.
In semiconductor fabrication, a resist is a thin layer used to transfer a circuit pattern to the semiconductor substrate which it is deposited upon. A resist can be patterned via lithography to form a (sub)micrometer-scale, temporary mask that protects selected areas of the underlying substrate during subsequent processing steps. The material used to prepare said thin layer is typically a viscous solution. Resists are generally proprietary mixtures of a polymer or its precursor and other small molecules that have been specially formulated for a given lithography technology. Resists used during photolithography are called photoresists.
A stepper or wafer stepper is a device used in the manufacture of integrated circuits (ICs). It is an essential part of the process of photolithography, which creates millions of microscopic circuit elements on the surface of silicon wafers out of which chips are made. It is similar in operation to a slide projector or a photographic enlarger. The ICs that are made form the heart of computer processors, memory chips, and many other electronic devices.
Resolution enhancement technologies are methods used to modify the photomasks in the lithographic processes used to make integrated circuits to compensate for limitations in the optical resolution of the projection systems. These processes allow the creation of features well beyond the limit that would normally apply due to the Rayleigh criterion. Modern technologies allow the creation of features on the order of 5 nanometers (nm), far below the normal resolution possible using deep ultraviolet (DUV) light.
Mask data preparation (MDP), also known as layout post processing, is the procedure of translating a file containing the intended set of polygons from an integrated circuit layout into set of instructions that a photomask writer can use to generate a physical mask. Typically, amendments and additions to the chip layout are performed in order to convert the physical layout into data for mask production.
Contact lithography, also known as contact printing, is a form of photolithography whereby the image to be printed is obtained by illumination of a photomask in direct contact with a substrate coated with an imaging photoresist layer.
In semiconductor electronics fabrication technology, a self-aligned gate is a transistor manufacturing approach whereby the gate electrode of a MOSFET is used as a mask for the doping of the source and drain regions. This technique ensures that the gate is naturally and precisely aligned to the edges of the source and drain.
Microlithography is a general name for any manufacturing process that can create a minutely patterned thin film of protective materials over a substrate, such as a silicon wafer, in order to protect selected areas of it during subsequent etching, deposition, or implantation operations. The term is normally used for processes that can reliably produce features of microscopic size, such as 10 micrometres or less. The term nanolithography may be used to designate processes that can produce nanoscale features, such as less than 100 nanometres.
Computational lithography is the set of mathematical and algorithmic approaches designed to improve the resolution attainable through photolithography. Computational lithography came to the forefront of photolithography technologies in 2008 when the semiconductor industry faced challenges associated with the transition to a 22 nanometer CMOS microfabrication process and has become instrumental in further shrinking the design nodes and topology of semiconductor transistor manufacturing.
In photolithography, off-axis illumination is an optical system setup in which the incoming light strikes a photomask at an oblique angle rather than perpendicularly to it, that is to say, the incident light is not parallel to the axis of the optical system.
Suss Microtec is a supplier of equipment and process solutions for the semiconductor, nano and microsystems technology and related markets with headquarters in Garching near Munich.
Multibeam is an American corporation that engages in the design, manufacture, and sale of semiconductor processing equipment used in the fabrication of integrated circuits. Headquartered in Santa Clara, in the Silicon Valley, Multibeam is led by Dr. David K. Lam, the founder and first CEO of Lam Research.
The Perkin-Elmer Micralign was a family of aligners introduced in 1973. Micralign was the first projection aligner, a concept that dramatically improved semiconductor fabrication. According to the Chip History Center, it "literally made the modern IC industry".
Glossary of microelectronics manufacturing terms
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