Photomask

Last updated
A photomask. This photomask has 20 copies, also called layers, of the same circuit pattern or design. Semiconductor photomask.jpg
A photomask. This photomask has 20 copies, also called layers, of the same circuit pattern or design.
A schematic illustration of a photomask (top) and an IC layer printed using it (bottom) Mask illustration.svg
A schematic illustration of a photomask (top) and an IC layer printed using it (bottom)

A photomask (also simply called a mask) is an opaque plate with transparent areas that allow light to shine through in a defined pattern. Photomasks are commonly used in photolithography for the production of integrated circuits (ICs or "chips") to produce a pattern on a thin wafer of material (usually silicon). In semiconductor manufacturing, a mask is sometimes called a reticle. [1] [2]

Contents

In photolithography, several masks are used in turn, each one reproducing a layer of the completed design, and together known as a mask set. A curvilinear photomask has patterns with curves, which is a departure from conventional photomasks which only have patterns that are completely vertical or horizontal, known as manhattan geometry. These photomasks require special equipment to manufacture. [3]

History

For IC production in the 1960s and early 1970s, an opaque rubylith film laminated onto a transparent mylar sheet was used. The design of one layer was cut into the rubylith, initially by hand on an illuminated drafting table (later by machine (plotter)) and the unwanted rubylith was peeled off by hand, forming the master image of that layer of the chip, often called "artwork". Increasingly complex and thus larger chips required larger and larger rubyliths, eventually even filling the wall of a room, and artworks were to be photographically reduced to produce photomasks (Eventually this whole process was replaced by the optical pattern generator to produce the master image). At this point the master image could be arrayed into a multi-chip image called a reticle. The reticle was originally a 10X larger image of a single chip.

The reticle was by step-and-repeater photolithography and etching used to produce a photomask with image-size the same as the final chip. The photomask might be used directly in the fab or be used as master-photomask to produce the final actual working photomasks.

As feature size shrank, the only way to properly focus the image was to place it in direct contact with the wafer. These contact aligners often lifted some of the photoresist off the wafer and onto the photomask and it had to be cleaned or discarded. This drove the adoption of reverse master photomasks (see above), which were used to produce (with contact photolithography and etching) the needed many actual working photomasks. Later, projection photo-lithography meant photomask lifetime was indefinite. Still later direct-step-on-wafer stepper photo-lithography used reticles directly and ended the use of photomasks.

Photomask materials changed over time. Initially soda glass [4] was used with silver halide opacity. Later borosilicate [5] and then fused silica to control expansion, and chromium which has better opacity to ultraviolet light were introduced. The original pattern generators have since been replaced by electron beam lithography and laser-driven mask writer or maskless lithography systems which generate reticles directly from the original computerized design.

Overview

A simulated photomask. The thicker features are the integrated circuit that is desired to be printed on the wafer. The thinner features are assists that do not print themselves but help the integrated circuit print better out-of-focus. The zig-zag appearance of the photomask is because optical proximity correction was applied to it to create a better print. OpcedPhotomask.png
A simulated photomask. The thicker features are the integrated circuit that is desired to be printed on the wafer. The thinner features are assists that do not print themselves but help the integrated circuit print better out-of-focus. The zig-zag appearance of the photomask is because optical proximity correction was applied to it to create a better print.

Lithographic photomasks are typically transparent fused silica plates covered with a pattern defined with a chromium (Cr) or Fe2O3 metal absorbing film. [6] Photomasks are used at wavelengths of 365 nm, 248 nm, and 193 nm. Photomasks have also been developed for other forms of radiation such as 157 nm, 13.5 nm (EUV), X-ray, electrons, and ions; but these require entirely new materials for the substrate and the pattern film. [6]

A set of photomasks, each defining a pattern layer in integrated circuit fabrication, is fed into a photolithography stepper or scanner, and individually selected for exposure. In multi-patterning techniques, a photomask would correspond to a subset of the layer pattern.

Historically in photolithography for the mass production of integrated circuit devices, there was a distinction between the term photoreticle or simply reticle, and the term photomask. In the case of a photomask, there is a one-to-one correspondence between the mask pattern and the wafer pattern. The mask covered the entire surface of the wafer which was exposed in its entirety in one shot. This was the standard for the 1:1 mask aligners that were succeeded by steppers and scanners with reduction optics. [7] As used in steppers and scanners which use image projection, [8] the reticle commonly contains only one copy, also called one layer of the designed VLSI circuit. (However, some photolithography fabrications utilize reticles with more than one layer placed side by side onto the same mask, used as copies to create several identical integrated circuits from one photomask). In modern usage, the terms reticle and photomask are synonymous. [9]

In a modern stepper or scanner, the pattern in the photomask is projected and shrunk by four or five times onto the wafer surface. [10] To achieve complete wafer coverage, the wafer is repeatedly "stepped" from position to position under the optical column or the stepper lens until full exposure of the wafer is achieved. A photomask with several copies of the integrated circuit design is used to reduce the number of steppings required to expose the entire wafer, thus increasing productivity.

Features 150 nm or below in size generally require phase-shifting to enhance the image quality to acceptable values. This can be achieved in many ways. The two most common methods are to use an attenuated phase-shifting background film on the mask to increase the contrast of small intensity peaks, or to etch the exposed quartz so that the edge between the etched and unetched areas can be used to image nearly zero intensity. In the second case, unwanted edges would need to be trimmed out with another exposure. The former method is attenuated phase-shifting, and is often considered a weak enhancement, requiring special illumination for the most enhancement, while the latter method is known as alternating-aperture phase-shifting, and is the most popular strong enhancement technique.

As leading-edge semiconductor features shrink, photomask features that are 4× larger must inevitably shrink as well. This could pose challenges since the absorber film will need to become thinner, and hence less opaque. [11] A 2005 study by IMEC found that thinner absorbers degrade image contrast and therefore contribute to line-edge roughness, using state-of-the-art photolithography tools. [12] One possibility is to eliminate absorbers altogether and use "chromeless" masks, relying solely on phase-shifting for imaging. [13] [14]

The emergence of immersion lithography has a strong impact on photomask requirements. The commonly used attenuated phase-shifting mask is more sensitive to the higher incidence angles applied in "hyper-NA" lithography, due to the longer optical path through the patterned film. [15] During manufacturing, inspection using a special form of microscopy called CD-SEM (Critical-Dimension Scanning Electron Microscopy) is used to measure critical dimensions on photomasks which are the dimensions of the patterns on a photomask. [16]

EUV lithography

EUV photomasks work by reflecting light, [17] which is achieved by using multiple alternating layers of molybdenum and silicon.

Mask error enhancement factor (MEEF)

Leading-edge photomasks (pre-corrected) images of the final chip patterns are magnified by four times. This magnification factor has been a key benefit in reducing pattern sensitivity to imaging errors. However, as features continue to shrink, two trends come into play: the first is that the mask error factor begins to exceed one, i.e., the dimension error on the wafer may be more than 1/4 the dimension error on the mask, [18] and the second is that the mask feature is becoming smaller, and the dimension tolerance is approaching a few nanometers. For example, a 25 nm wafer pattern should correspond to a 100 nm mask pattern, but the wafer tolerance could be 1.25 nm (5% spec), which translates into 5 nm on the photomask. The variation of electron beam scattering in directly writing the photomask pattern can easily well exceed this. [19] [20]

Pellicles

The term "pellicle" is used to mean "film", "thin film", or "membrane." Beginning in the 1960s, thin film stretched on a metal frame, also known as a "pellicle", was used as a beam splitter for optical instruments. It has been used in a number of instruments to split a beam of light without causing an optical path shift due to its small film thickness. In 1978, Shea et al. at IBM patented a process to use the "pellicle" as a dust cover to protect a photomask or reticle. In the context of this entry, "pellicle" means "thin film dust cover to protect a photomask".

Particle contamination can be a significant problem in semiconductor manufacturing. A photomask is protected from particles by a pellicle –a thin transparent film stretched over a frame that is glued over one side of the photomask. The pellicle is far enough away from the mask patterns so that moderate-to-small sized particles that land on the pellicle will be too far out of focus to print. Although they are designed to keep particles away, pellicles become a part of the imaging system and their optical properties need to be taken into account. Pellicles material are Nitrocellulose and made for various Transmission Wavelengths. Current pellicles are made from polysilicon, and companies are exploring other materials for high-NA EUV and future chip making processes. [21] [22]

Pellicle Mounting Machine MLI Pellicle Mounting Machine MLI.jpg
Pellicle Mounting Machine MLI

Leading commercial photomask manufacturers

The SPIE Annual Conference, Photomask Technology reports the SEMATECH Mask Industry Assessment which includes current industry analysis and the results of their annual photomask manufacturers survey. The following companies are listed in order of their global market share (2009 info): [23]

Major chipmakers such as Intel, Globalfoundries, IBM, NEC, TSMC, UMC, Samsung, and Micron Technology, have their own large maskmaking facilities or joint ventures with the abovementioned companies.

The worldwide photomask market was estimated as $3.2 billion in 2012 [24] and $3.1 billion in 2013. Almost half of the market was from captive mask shops (in-house mask shops of major chipmakers). [25]

The costs of creating new mask shop for 180 nm processes were estimated in 2005 as $40 million, and for 130 nm - more than $100 million. [26]

The purchase price of a photomask, in 2006, could range from $250 to $100,000 [27] for a single high-end phase-shift mask. As many as 30 masks (of varying price) may be required to form a complete mask set. As modern chips are built in several layers stacked on top of each other, at least one mask is required for each of these layers.

See also

Related Research Articles

Photolithography is a process used in the manufacturing of integrated circuits. It involves using light to transfer a pattern onto a substrate, typically a silicon wafer.

<span class="mw-page-title-main">Immersion lithography</span> Photolithography technique where there is a layer of water between a lens and a microchip

Immersion lithography is a technique used in semiconductor manufacturing to enhance the resolution and accuracy of the lithographic process. It involves using a liquid medium, typically water, between the lens and the wafer during exposure. By using a liquid with a higher refractive index than air, immersion lithography allows for smaller features to be created on the wafer.

<span class="mw-page-title-main">Electron-beam lithography</span> Lithographic technique that uses a scanning beam of electrons

Electron-beam lithography is the practice of scanning a focused beam of electrons to draw custom shapes on a surface covered with an electron-sensitive film called a resist (exposing). The electron beam changes the solubility of the resist, enabling selective removal of either the exposed or non-exposed regions of the resist by immersing it in a solvent (developing). The purpose, as with photolithography, is to create very small structures in the resist that can subsequently be transferred to the substrate material, often by etching.

Masklesslithography (MPL) is a photomask-less photolithography-like technology used to project or focal-spot write the image pattern onto a chemical resist-coated substrate by means of UV radiation or electron beam.

Nanolithography (NL) is a growing field of techniques within nanotechnology dealing with the engineering of nanometer-scale structures on various materials.

<span class="mw-page-title-main">Extreme ultraviolet lithography</span> Lithography using 13.5 nm UV light

Extreme ultraviolet lithography is a new technology used in the semiconductor industry for manufacturing integrated circuits (ICs). It is a type of photolithography that uses extreme ultraviolet (EUV) light to create intricate patterns on silicon wafers.

Next-generation lithography or NGL is a term used in integrated circuit manufacturing to describe the lithography technologies in development which are intended to replace current techniques. Driven by Moore's law in the semiconductor industries, the shrinking of the chip size and critical dimension continues. The term applies to any lithography method which uses a shorter-wavelength light or beam type than the current state of the art, such as X-ray lithography, electron beam lithography, focused ion beam lithography, and nanoimprint lithography. The term may also be used to describe techniques which achieve finer resolution features from an existing light wavelength.

In semiconductor fabrication, a resist is a thin layer used to transfer a circuit pattern to the semiconductor substrate which it is deposited upon. A resist can be patterned via lithography to form a (sub)micrometer-scale, temporary mask that protects selected areas of the underlying substrate during subsequent processing steps. The material used to prepare said thin layer is typically a viscous solution. Resists are generally proprietary mixtures of a polymer or its precursor and other small molecules that have been specially formulated for a given lithography technology. Resists used during photolithography are called photoresists.

<span class="mw-page-title-main">Stepper</span> Photolithographic Tool

A stepper or wafer stepper is a device used in the manufacture of integrated circuits (ICs). It is an essential part of the process of photolithography, which creates millions of microscopic circuit elements on the surface of silicon wafers out of which chips are made. It is similar in operation to a slide projector or a photographic enlarger. The ICs that are made form the heart of computer processors, memory chips, and many other electronic devices.

<span class="mw-page-title-main">Phase-shift mask</span> Resolution-improving photomask

Phase-shift masks are photomasks that take advantage of the interference generated by phase differences to improve image resolution in photolithography. There exist alternating and attenuated phase shift masks. A phase-shift mask relies on the fact that light passing through a transparent media will undergo a phase change as a function of its optical thickness.

<span class="mw-page-title-main">Optical proximity correction</span> Photolithography enhancement technique

Optical proximity correction (OPC) is a photolithography enhancement technique commonly used to compensate for image errors due to diffraction or process effects. The need for OPC is seen mainly in the making of semiconductor devices and is due to the limitations of light to maintain the edge placement integrity of the original design, after processing, into the etched image on the silicon wafer. These projected images appear with irregularities such as line widths that are narrower or wider than designed, these are amenable to compensation by changing the pattern on the photomask used for imaging. Other distortions such as rounded corners are driven by the resolution of the optical imaging tool and are harder to compensate for. Such distortions, if not corrected for, may significantly alter the electrical properties of what was being fabricated. Optical proximity correction corrects these errors by moving edges or adding extra polygons to the pattern written on the photomask. This may be driven by pre-computed look-up tables based on width and spacing between features or by using compact models to dynamically simulate the final pattern and thereby drive the movement of edges, typically broken into sections, to find the best solution,. The objective is to reproduce the original layout drawn by the designer on the semiconductor wafer as well as possible.

Resolution enhancement technologies are methods used to modify the photomasks in the lithographic processes used to make integrated circuits to compensate for limitations in the optical resolution of the projection systems. These processes allow the creation of features well beyond the limit that would normally apply due to the Rayleigh criterion. Modern technologies allow the creation of features on the order of 5 nanometers (nm), far below the normal resolution possible using deep ultraviolet (DUV) light.

Contact lithography, also known as contact printing, is a form of photolithography whereby the image to be printed is obtained by illumination of a photomask in direct contact with a substrate coated with an imaging photoresist layer.

A mask shop is a factory which manufactures photomasks for use in the semiconductor industry. There are two distinct types found in the trade. Captive mask shops are in-house operations owned by the biggest semiconductor corporations, while merchant mask shops make masks for most of the industry.

<span class="mw-page-title-main">Multiple patterning</span> Technique used to increase the number of structures a microchip may contain

Multiple patterning is a class of technologies for manufacturing integrated circuits (ICs), developed for photolithography to enhance the feature density. It is expected to be necessary for the 10 nm and 7 nm node semiconductor processes and beyond. The premise is that a single lithographic exposure may not be enough to provide sufficient resolution. Hence additional exposures would be needed, or else positioning patterns using etched feature sidewalls would be necessary.

Computational lithography is the set of mathematical and algorithmic approaches designed to improve the resolution attainable through photolithography. Computational lithography came to the forefront of photolithography technologies in 2008 when the semiconductor industry faced challenges associated with the transition to a 22 nanometer CMOS microfabrication process and has become instrumental in further shrinking the design nodes and topology of semiconductor transistor manufacturing.

In semiconductor manufacturing, the "7 nm" process is a term for the MOSFET technology node following the "10 nm" node, defined by the International Roadmap for Devices and Systems (IRDS), which was preceded by the International Technology Roadmap for Semiconductors (ITRS). It is based on FinFET technology, a type of multi-gate MOSFET technology. As of 2021, the IRDS Lithography standard gives a table of dimensions for "7 nm", with a few given below:

<span class="mw-page-title-main">Carl Zeiss SMT</span>

Carl Zeiss SMT GmbH comprises the Semiconductor Manufacturing Technology business group of ZEISS and develops and produces equipment for the manufacture of microchips. The company is majority owned by Carl Zeiss AG, with a 24.9% minority stake by ASML Holding.

<span class="mw-page-title-main">Aligner (semiconductor)</span> Aligns a photomask with features on a wafer

An aligner, or mask aligner, is a system that produces integrated circuits (IC) using the photolithography process. It holds the photomask over the silicon wafer while a bright light is shone through the mask and onto the photoresist. The "alignment" refers to the ability to place the mask over precisely the same location repeatedly as the chip goes through multiple rounds of lithography.

Glossary of microelectronics manufacturing terms

References

  1. ↑ "Reticle Manufacturing". KLA. Retrieved 2024-01-05.
  2. ↑ Diaz, S.L.M.; Fowler, J.W.; Pfund, M.E.; Mackulak, G.T.; Hickie, M. (November 2005). "Evaluating the Impacts of Reticle Requirements in Semiconductor Wafer Fabrication". IEEE Transactions on Semiconductor Manufacturing. 18 (4): 622–632. doi:10.1109/TSM.2005.858502. ISSN   0894-6507. S2CID   37911295.
  3. ↑ "The Quest for Curvilinear Photomasks". 15 April 2021.
  4. ↑ Introduction to Microfabrication. John Wiley & Sons. 29 October 2010. ISBN   978-1-119-99189-2.
  5. ↑ Handbook of Photomask Manufacturing Technology. CRC Press. 3 October 2018. ISBN   978-1-4200-2878-2.
  6. 1 2 Shubham, Kumar n (2021). Integrated circuit fabrication. Ankaj Gupta. Abingdon, Oxon. ISBN   978-1-000-39644-7. OCLC   1246513110.{{cite book}}: CS1 maint: location missing publisher (link)
  7. ↑ Rizvi, Syed (2005). "1.3 The Technology History of Masks". Handbook of Photomask Manufacturing Technology. CRC Press. p. 728. ISBN   9781420028782.
  8. ↑ Principles of Lithography. SPIE Press. 2005. ISBN   978-0-8194-5660-1.
  9. ↑ "Reticle".
  10. ↑ Lithography experts back higher magnification in photomasks to ease challenges // EETimes 2000
  11. ↑ Y. Sato et al., Proc. SPIE, vol. 4889, pp. 50-58 (2002).
  12. ↑ M. Yoshizawa et al., Proc. SPIE, vol. 5853, pp. 243-251 (2005)
  13. ↑ Toh, Kenny K.; Dao, Giang T.; Singh, Rajeev R.; Gaw, Henry T. (1991). "Chromeless phase-shifted masks: A new approach to phase-shifting masks". In Wiley, James N. (ed.). 10th Annual Symp on Microlithography. Vol. 1496. pp. 27–53. doi:10.1117/12.29750. S2CID   109009678.
  14. ↑ Eom, Tae-Seung; Lim, Chang M.; Kim, Seo-Min; Kim, Hee-Bom; Oh, Se-Young; Ma, Won-Kwang; Moon, Seung-Chan; Shin, Ki S. (2003). "Comparative study of chromeless and attenuated phase shift mask for 0.3-k 1 ArF lithography of DRAM". In Yen, Anthony (ed.). Optical Microlithography XVI. Vol. 5040. pp. 1310–1320. doi:10.1117/12.485452. S2CID   109838206.
  15. ↑ C. A. Mack et al., Proc. SPIE, vol. 5992, pp. 306-316 (2005)
  16. ↑ "CD-SEM: Critical-Dimension Scanning Electron Microscope".
  17. ↑ "Archived copy" (PDF). Archived from the original (PDF) on 2017-06-02. Retrieved 2019-06-23.{{cite web}}: CS1 maint: archived copy as title (link)
  18. ↑ E. Hendrickx et al., Proc. SPIE 7140, 714007 (2008).
  19. ↑ C-J. Chen et al., Proc. SPIE 5256, 673 (2003).
  20. ↑ W-H. Cheng and J. Farnsworth, Proc. SPIE 6607, 660724 (2007).
  21. ↑ https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/what-is-high-na-euv [ bare URL ]
  22. ↑ Chris A. Mack (November 2007). "Optical behavior of pellicles". Microlithography World. Retrieved 2008-09-13.
  23. ↑ Hughes, Greg; Henry Yun (2009-10-01). "Mask industry assessment: 2009". In Zurbrick, Larry S.; Montgomery, M. Warren (eds.). Photomask Technology 2009. Vol. 7488. pp. 748803–748803–13. Bibcode:2009SPIE.7488E..03H. doi:10.1117/12.832722. ISSN   0277-786X. S2CID   86650806.{{cite book}}: |journal= ignored (help)
  24. ↑ Chamness, Lara (May 7, 2013). "Semiconductor Photomask Market: Forecast $3.5 Billion in 2014". SEMI Industry Research and Statistics. Retrieved 6 September 2014.
  25. ↑ Tracy, Dan; Deborah Geiger (April 14, 2014). "SEMI Reports 2013 Semiconductor Photomask Sales of $3.1 Billion". SEMI. Retrieved 6 September 2014.
  26. ↑ Weber, Charles M.; Berglund, C. Neil (February 9, 2005). "The Mask Shop's Perspective". An Analysis of the Economics of Photomask Manufacturing Part – 1: The Economic Environment (PDF). ISMT Mask Automation Workshop. p. 6. Archived from the original (PDF) on 2016-03-03. Capital-intensive industry. Investment levels….. – ~$40M for 'conventional' (180-nm node or above) – >$100M for 'advanced' (130-nm node and beyond)
  27. ↑ Weber, C.M; Berglund, C.N.; Gabella, P. (13 November 2006). "Mask Cost and Profitability in Photomask Manufacturing: An Empirical Analysis" (PDF). IEEE Transactions on Semiconductor Manufacturing. 19 (4): 465–474. doi:10.1109/TSM.2006.883577. S2CID   2236552. doi:10.1109/TSM.2006.883577; page 23 table 1
This page is based on this Wikipedia article
Text is available under the CC BY-SA 4.0 license; additional terms may apply.
Images, videos and audio are available under their respective licenses.