Immersion lithography is a technique used in semiconductor manufacturing to enhance the resolution and accuracy of the lithographic process. It involves using a liquid medium, typically water, between the lens and the wafer during exposure. By using a liquid with a higher refractive index than air, immersion lithography allows for smaller features to be created on the wafer. [1]
Immersion lithography replaces the usual air gap between the final lens and the wafer surface with a liquid medium that has a refractive index greater than one. The angular resolution is increased by a factor equal to the refractive index of the liquid. Current immersion lithography tools use highly purified water for this liquid, achieving feature sizes below 45 nanometers. [2]
The idea for immersion lithography was patented in 1984 by Takanashi et al. [3] It was also proposed by Taiwanese engineer Burn J. Lin and realized in the 1980s. [4] In 2004, IBM's director of silicon technology, Ghavam Shahidi, announced that IBM planned to commercialize lithography based on light filtered through water. [5] Immersion lithography is now[ when? ] being extended to sub-20nm nodes through the use of multiple patterning.
The ability to resolve features in optical lithography is directly related to the numerical aperture of the imaging equipment, the numerical aperture being the sine of the maximum refraction angle multiplied by the refractive index of the medium through which the light travels. The lenses in the highest resolution "dry" photolithography scanners focus light in a cone whose boundary is nearly parallel to the wafer surface. As it is impossible to increase resolution by further refraction, additional resolution is obtained by inserting an immersion medium with a higher index of refraction between the lens and the wafer. The blurriness is reduced by a factor equal to the refractive index of the medium. For example, for water immersion using ultraviolet light at 193 nm wavelength, the index of refraction is 1.44. [6]
The resolution enhancement from immersion lithography is about 30–40% depending on materials used. However,[ clarification needed ] the depth of focus, or tolerance in wafer topography flatness, is improved compared to the corresponding "dry" tool at the same resolution. [7]
Defect concerns, e.g., water left behind (watermarks) and loss of resist-water adhesion (air gap or bubbles), have led to considerations of using a topcoat layer directly on top of the photoresist. [8] This topcoat would serve as a barrier for chemical diffusion between the liquid medium and the photoresist. In addition, the interface between the liquid and the topcoat would be optimized for watermark reduction. At the same time, defects from topcoat use should be avoided.
As of 2005, Topcoats had been tuned for use as antireflection coatings, especially for hyper-NA (NA>1) cases. [9]
By 2008, defect counts on wafers printed by immersion lithography had reached zero level capability. [10]
As of 2000, Polarization effects due to high angles of interference in the photoresist were considered as features approach 40 nm. [11] Hence, illumination sources generally need to be azimuthally polarized to match the pole illumination for ideal line-space imaging. [12]
As of 1996, this was achieved through higher stage speeds, [13] [14] which in turn, as of 2013 were allowed by higher power ArF laser pulse sources. [15] Specifically, the throughput is directly proportional to stage speed V, which is related to dose D and rectangular slit width S and slit intensity Iss (which is directly related to pulse power) by V=Iss*S/D. The slit height is the same as the field height. The slit width S, in turn, is limited by the number of pulses to make the dose (n), divided by the frequency of the laser pulses (f), at the maximum scan speed Vmax by S=Vmax*n/f. [13] At a fixed frequency f and pulse number n, the slit width will be proportional to the maximum stage speed. Hence, throughput at a given dose is improved by increasing maximum stage speed as well as increasing pulse power.
According to ASML s product information about twinscan-nxt1980di, immersion lithography tools currently[ when? ] boasted the highest throughputs (275 WPH) as targeted for high volume manufacturing. [16]
The resolution limit for a 1.35 NA immersion tool operating at 193 nm wavelength is 36 nm. Going beyond this limit to sub-20nm nodes requires multiple patterning. [17] At the 20nm foundry and memory nodes and beyond, double patterning and triple patterning are already being used[ when? ] with immersion lithography for the densest layers.
Photolithography is a process used in the manufacturing of integrated circuits. It involves using light to transfer a pattern onto a substrate, typically a silicon wafer.
A photoresist is a light-sensitive material used in several processes, such as photolithography and photoengraving, to form a patterned coating on a surface. This process is crucial in the electronics industry.
In optics, the refractive index of an optical medium is a dimensionless number that gives the indication of the light bending ability of that medium.
A photomask is an opaque plate with transparent areas that allow light to shine through in a defined pattern. Photomasks are commonly used in photolithography for the production of integrated circuits to produce a pattern on a thin wafer of material. In semiconductor manufacturing, a mask is sometimes called a reticle.
Electron-beam lithography is the practice of scanning a focused beam of electrons to draw custom shapes on a surface covered with an electron-sensitive film called a resist (exposing). The electron beam changes the solubility of the resist, enabling selective removal of either the exposed or non-exposed regions of the resist by immersing it in a solvent (developing). The purpose, as with photolithography, is to create very small structures in the resist that can subsequently be transferred to the substrate material, often by etching.
Masklesslithography (MPL) is a photomask-less photolithography-like technology used to project or focal-spot write the image pattern onto a chemical resist-coated substrate by means of UV radiation or electron beam.
Nanolithography (NL) is a growing field of techniques within nanotechnology dealing with the engineering of nanometer-scale structures on various materials.
Extreme ultraviolet lithography is a new technology used in the semiconductor industry for manufacturing integrated circuits (ICs). It is a type of photolithography that uses extreme ultraviolet (EUV) light to create intricate patterns on silicon wafers.
A stepper or wafer stepper is a device used in the manufacture of integrated circuits (ICs). It is an essential part of the process of photolithography, which creates millions of microscopic circuit elements on the surface of silicon wafers out of which chips are made. It is similar in operation to a slide projector or a photographic enlarger. The ICs that are made form the heart of computer processors, memory chips, and many other electronic devices.
Nanoimprint lithography (NIL) is a method of fabricating nanometer-scale patterns. It is a simple nanolithography process with low cost, high throughput and high resolution. It creates patterns by mechanical deformation of imprint resist and subsequent processes. The imprint resist is typically a monomer or polymer formulation that is cured by heat or UV light during the imprinting. Adhesion between the resist and the template is controlled to allow proper release.
ASML Holding N.V. is a Dutch multinational corporation founded in 1984. ASML specializes in the development and manufacturing of photolithography machines which are used to produce computer chips.
Phase-shift masks are photomasks that take advantage of the interference generated by phase differences to improve image resolution in photolithography. There exist alternating and attenuated phase shift masks. A phase-shift mask relies on the fact that light passing through a transparent media will undergo a phase change as a function of its optical thickness.
Optical proximity correction (OPC) is a photolithography enhancement technique commonly used to compensate for image errors due to diffraction or process effects. The need for OPC is seen mainly in the making of semiconductor devices and is due to the limitations of light to maintain the edge placement integrity of the original design, after processing, into the etched image on the silicon wafer. These projected images appear with irregularities such as line widths that are narrower or wider than designed, these are amenable to compensation by changing the pattern on the photomask used for imaging. Other distortions such as rounded corners are driven by the resolution of the optical imaging tool and are harder to compensate for. Such distortions, if not corrected for, may significantly alter the electrical properties of what was being fabricated. Optical proximity correction corrects these errors by moving edges or adding extra polygons to the pattern written on the photomask. This may be driven by pre-computed look-up tables based on width and spacing between features or by using compact models to dynamically simulate the final pattern and thereby drive the movement of edges, typically broken into sections, to find the best solution,. The objective is to reproduce the original layout drawn by the designer on the semiconductor wafer as well as possible.
Contact lithography, also known as contact printing, is a form of photolithography whereby the image to be printed is obtained by illumination of a photomask in direct contact with a substrate coated with an imaging photoresist layer.
A solid immersion lens (SIL) has higher magnification and higher numerical aperture than common lenses by filling the object space with a high-refractive-index solid material. SIL was originally developed for enhancing the spatial resolution of optical microscopy. There are two types of SIL:
Multiple patterning is a class of technologies for manufacturing integrated circuits (ICs), developed for photolithography to enhance the feature density. It is expected to be necessary for the 10 nm and 7 nm node semiconductor processes and beyond. The premise is that a single lithographic exposure may not be enough to provide sufficient resolution. Hence additional exposures would be needed, or else positioning patterns using etched feature sidewalls would be necessary.
Plasmonic nanolithography is a nanolithographic process that utilizes surface plasmon excitations such as surface plasmon polaritons (SPPs) to fabricate nanoscale structures. SPPs, which are surface waves that propagate in between planar dielectric-metal layers in the optical regime, can bypass the diffraction limit on the optical resolution that acts as a bottleneck for conventional photolithography.
Computational lithography is the set of mathematical and algorithmic approaches designed to improve the resolution attainable through photolithography. Computational lithography came to the forefront of photolithography technologies in 2008 when the semiconductor industry faced challenges associated with the transition to a 22 nanometer CMOS microfabrication process and has become instrumental in further shrinking the design nodes and topology of semiconductor transistor manufacturing.
In semiconductor manufacturing, the "7 nm" process is a term for the MOSFET technology node following the "10 nm" node, defined by the International Roadmap for Devices and Systems (IRDS), which was preceded by the International Technology Roadmap for Semiconductors (ITRS). It is based on FinFET technology, a type of multi-gate MOSFET technology. As of 2021, the IRDS Lithography standard gives a table of dimensions for "7 nm", with a few given below:
Three-dimensional (3D) microfabrication refers to manufacturing techniques that involve the layering of materials to produce a three-dimensional structure at a microscopic scale. These structures are usually on the scale of micrometers and are popular in microelectronics and microelectromechanical systems.
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