Maskless lithography

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Masklesslithography (MPL) is a photomask-less photolithography-like technology used to project or focal-spot write the image pattern onto a chemical resist-coated substrate (e.g. wafer) by means of UV radiation or electron beam. [1]

Contents

In microlithography, typically UV radiation casts an image of a time constant mask onto a photosensitive emulsion (or photoresist). [2] Traditionally, mask aligners, steppers, scanners, and other kinds of non-optical techniques are used for high speed microfabrication of microstructures, but in case of MPL, some of these become redundant.

Maskless lithography has two approaches to project a pattern: rasterized and vectorized. In the first one it utilizes generation of a time-variant intermittent image on an electronically modifiable (virtual) mask that is projected with known means (also known as laser direct imaging and other synonyms). In the vectored approach, direct writing is achieved by radiation that is focused to a narrow beam that is scanned in vector form across the resist. The beam is then used to directly write the image into the photoresist, one or more pixels at a time. Also combinations of the two approaches are known, and it is not limited to optical radiation, but also extends into the UV, includes electron-beams and also mechanical or thermal ablation via MEMS devices.

Advantages

The MPL advantage is a high speed parallel manipulation of the pattern enabled by a large and cheap available computing capacity, which is not an issue with the standard approach that decouples to a slow, but precise structuring process for writing a mask from a fast and highly parallel copy process to achieve high replication throughputs as demanded by industry.

A key advantage of maskless lithography is the ability to change lithography patterns from one run to the next, without incurring the cost of generating a new photomask. This may prove useful for double patterning or compensation of non-linear material behavior (e.g. when utilizing cheaper, non-crystalline substrate or to compensate for random placement errors of preceding structures).

Disadvantages

The main disadvantages are complexity and costs for the replication process, the limitation of rasterization in respect to oversampling causes aliasing artefact, especially with smaller structures (which may affect yield), while direct vector writing is limited in throughput. Also the digital throughput of such systems forms a bottleneck for high resolutions, i.e. structuring a 300mm diameter wafer with its area of ~707cm² requires about 10 TiB of data in a rasterized format without oversampling and thus suffers from step-artefacts (aliasing). Oversampling by a factor of 10 to reduce these artefacts adds another two orders of magnitude 1 PiB per single wafer that has to be transferred in ~1 min to the substrate to achieve high volume manufacturing speeds. Industrial maskless lithography is therefore currently only widely found for structuring lower resolution substrates, like in PCB-panel production, where resolutions ~50µm are most common (at ~2000 times lower throughput demand on the components).

Forms

Currently, the main forms of maskless lithography are electron beam and optical. In addition, focused ion beam (FIB) systems have established an important niche role in failure analysis and defect repair. Also, systems based on arrays of mechanical and thermally ablative probe tips have been demonstrated.

Electron beam (e-beam)

The most commonly used form of maskless lithography today is electron beam lithography. Its widespread use is due to the wide range of electron beam systems available accessing an equally wide range of electron beam energies (~10 eV to ~100 keV). This is already being used in wafer-level production at eASIC, which uses conventional direct-write electron beam lithography to customize a single via layer for low-cost production of ASICs.

Most maskless lithography systems currently being developed are based on the use of multiple electron beams. [3] The goal is to use the parallel scanning of the beams to speed up the patterning of large areas. However, a fundamental consideration here is to what degree electrons from neighboring beams can disturb one another (from Coulomb repulsion). Since the electrons in parallel beams are traveling equally fast, they will persistently repel one another, while the electron lenses act over only a portion of the electrons' trajectories.

Optical

Direct laser writing is a very popular form of optical maskless lithography, which offers flexibility, ease of use, and cost effectiveness in R&D processing (small batch production). The underlying technology uses spatial light modulating (SLM) micro-arrays based on glass to block laser pathway from reaching a substrate with a photoresist (in similar manner to digital micromirror devices). [4] [5] This equipment offers rapid patterning at sub-micrometer resolutions, and offers a compromise between performance and cost when working with feature sizes of approximately 200 nm or greater. Direct laser writing for microelectronics packaging, 3D electronics and heterogeneous integration were developed in 1995 at the Microelectronics and Computer Technology Corporation (or MCC) in Austin, Texas. [6] The MCC system was fully integrated with precision control for 3D surfaces and artificial intelligence software with real-time machine learning and included laser wavelengths for standard i-line resist and DUV 248nm. The MCC system also included circuit editing capabilities for isolating circuits on a programmable wafer design. In 1999, the MCC system was advanced for use in MEMS manufacturing. [7]

Interference lithography or holographic exposures are not maskless processes and therefore do not count as "maskless", although they have no 1:1 imaging system in between.

Plasmonic direct writing lithography uses localized surface plasmon excitations via scanning probes to directly expose the photoresist. [8]

For improved image resolution, ultraviolet light, which has a shorter wavelength than visible light, is used to achieve resolution down to around 100 nm. The main optical maskless lithography systems in use today are the ones developed for generating photomasks for the semiconductor and LCD industries.

In 2013, a group at Swinburne University of Technology published their achievement of 9 nm feature size and 52 nm pitch, using a combination of two optical beams of different wavelengths. [9]

DLP technology can also be used for maskless lithography. [10]

Focused ion beam

Focused ion beam systems are commonly used today for sputtering away defects or uncovering buried features. The use of ion sputtering must take into account the redeposition of sputtered material.

Proton beam writing

Proton beam writing (or p-beam writing) is a direct-write lithography process that uses a focused beam of high energy (MeV) protons to pattern resist material at nanodimensions. [11] The process, although similar in many ways to direct writing using electrons, nevertheless offers some interesting and unique advantages.

Probe-tip contact

IBM Research has developed an alternative maskless lithography technique based on atomic force microscopy. [12] In addition, Dip Pen Nanolithography is a promising new approach for patterning submicrometer features.

Research

2000s

Technologies that enable maskless lithography is already used for the production of photomasks and in limited wafer-level production. There are some obstacles ahead of its use in high-volume manufacturing. First, there is a wide diversity of maskless techniques. Even within the electron-beam category, there are several vendors (Multibeam, Mapper Lithography, Canon, Advantest, Nuflare, JEOL) with entirely different architectures and beam energies. Second, throughput targets exceeding 10 wafers per hour still need to be met. Third, the capacity and ability to handle the large data volume (Tb-scale) needs to be developed and demonstrated.[ citation needed ]

In recent years DARPA and NIST have reduced support for maskless lithography in the U.S. [13]

There was a European program that would push the insertion of maskless lithography for IC manufacturing at the 32-nm half-pitch node in 2009. [14] Project name was MAGIC, or "MAskless lithoGraphy for IC manufacturing", in frame of EC 7th Framework Programme (FP7). [15]

Due to the increased mask costs for multiple patterning, maskless lithography is once again prompts relevant research in this field.

DARPA (United States)

Since at least 2001 DARPA has invested in a variety of maskless patterning technologies including parallel e-beam arrays, parallel scanning probe arrays, and an innovative e-beam lithography tool to enable low-volume manufacturing process. The technology is codenamed as Gratings of Regular Arrays and Trim Exposures (GRATE) (previously known as Cost Effective Low Volume Nanofabrication). [16] [17] [18]

Economics

Foundries

In 2018 the Dutch and Russia jointly funded (Rusnano) company Mapper Lithography producing multi e-beam maskless lithography MEMS components went bankrupt and was acquired by ASML Holding, a major competitor at the time. [19] The foundry producing devices is located near Moscow, Russia. As of early 2019 it was run by Mapper LLC. [20] The Mapper Lithography originally was created at Delft University of Technology in 2000.[ citation needed ]

Related Research Articles

<span class="mw-page-title-main">MEMS</span> Very small devices that incorporate moving components

MEMS is the technology of microscopic devices incorporating both electronic and moving parts. MEMS are made up of components between 1 and 100 micrometres in size, and MEMS devices generally range in size from 20 micrometres to a millimetre, although components arranged in arrays can be more than 1000 mm2. They usually consist of a central unit that processes data and several components that interact with the surroundings.

Photolithography is a process used in the manufacturing of integrated circuits. It involves using light to transfer a pattern onto a substrate, typically a silicon wafer.

<span class="mw-page-title-main">Photoresist</span> Light-sensitive material used in making electronics

A photoresist is a light-sensitive material used in several processes, such as photolithography and photoengraving, to form a patterned coating on a surface. This process is crucial in the electronics industry.

<span class="mw-page-title-main">Photomask</span> Photolithographic Tool

A photomask is an opaque plate with transparent areas that allow light to shine through in a defined pattern. Photomasks are commonly used in photolithography for the production of integrated circuits to produce a pattern on a thin wafer of material. In semiconductor manufacturing, a mask is sometimes called a reticle.

<span class="mw-page-title-main">Immersion lithography</span> Photolithography technique where there is a layer of water between a lens and a microchip

Immersion lithography is a technique used in semiconductor manufacturing to enhance the resolution and accuracy of the lithographic process. It involves using a liquid medium, typically water, between the lens and the wafer during exposure. By using a liquid with a higher refractive index than air, immersion lithography allows for smaller features to be created on the wafer.

<span class="mw-page-title-main">Electron-beam lithography</span> Lithographic technique that uses a scanning beam of electrons

Electron-beam lithography is the practice of scanning a focused beam of electrons to draw custom shapes on a surface covered with an electron-sensitive film called a resist (exposing). The electron beam changes the solubility of the resist, enabling selective removal of either the exposed or non-exposed regions of the resist by immersing it in a solvent (developing). The purpose, as with photolithography, is to create very small structures in the resist that can subsequently be transferred to the substrate material, often by etching.

Nanolithography (NL) is a growing field of techniques within nanotechnology dealing with the engineering of nanometer-scale structures on various materials.

<span class="mw-page-title-main">Extreme ultraviolet lithography</span> Lithography using 13.5 nm UV light

Extreme ultraviolet lithography is a cutting-edge technology used in the semiconductor industry for manufacturing integrated circuits (ICs). It is a type of photolithography that uses extreme ultraviolet (EUV) light to create intricate patterns on silicon wafers.

<span class="mw-page-title-main">Dip-pen nanolithography</span> Scanning probe lithographic technique

Dip pen nanolithography (DPN) is a scanning probe lithography technique where an atomic force microscope (AFM) tip is used to create patterns directly on a range of substances with a variety of inks. A common example of this technique is exemplified by the use of alkane thiolates to imprint onto a gold surface. This technique allows surface patterning on scales of under 100 nanometers. DPN is the nanotechnology analog of the dip pen, where the tip of an atomic force microscope cantilever acts as a "pen", which is coated with a chemical compound or mixture acting as an "ink", and put in contact with a substrate, the "paper".

In semiconductor fabrication, a resist is a thin layer used to transfer a circuit pattern to the semiconductor substrate which it is deposited upon. A resist can be patterned via lithography to form a (sub)micrometer-scale, temporary mask that protects selected areas of the underlying substrate during subsequent processing steps. The material used to prepare said thin layer is typically a viscous solution. Resists are generally proprietary mixtures of a polymer or its precursor and other small molecules that have been specially formulated for a given lithography technology. Resists used during photolithography are called photoresists.

<span class="mw-page-title-main">Stepper</span> Photolithographic Tool

A stepper is a device used in the manufacture of integrated circuits (ICs). It is an essential part of the process of photolithography, which creates millions of microscopic circuit elements on the surface of silicon wafers out of which chips are made. It is similar in operation to a slide projector or a photographic enlarger. The ICs that are made form the heart of computer processors, memory chips, and many other electronic devices.

<span class="mw-page-title-main">Nanoimprint lithography</span> Method of fabricating nanometer scale patterns using a special stamp

Nanoimprint lithography (NIL) is a method of fabricating nanometer-scale patterns. It is a simple nanolithography process with low cost, high throughput and high resolution. It creates patterns by mechanical deformation of imprint resist and subsequent processes. The imprint resist is typically a monomer or polymer formulation that is cured by heat or UV light during the imprinting. Adhesion between the resist and the template is controlled to allow proper release.

<span class="mw-page-title-main">Optical proximity correction</span> Photolithography enhancement technique

Optical proximity correction (OPC) is a photolithography enhancement technique commonly used to compensate for image errors due to diffraction or process effects. The need for OPC is seen mainly in the making of semiconductor devices and is due to the limitations of light to maintain the edge placement integrity of the original design, after processing, into the etched image on the silicon wafer. These projected images appear with irregularities such as line widths that are narrower or wider than designed, these are amenable to compensation by changing the pattern on the photomask used for imaging. Other distortions such as rounded corners are driven by the resolution of the optical imaging tool and are harder to compensate for. Such distortions, if not corrected for, may significantly alter the electrical properties of what was being fabricated. Optical proximity correction corrects these errors by moving edges or adding extra polygons to the pattern written on the photomask. This may be driven by pre-computed look-up tables based on width and spacing between features or by using compact models to dynamically simulate the final pattern and thereby drive the movement of edges, typically broken into sections, to find the best solution,. The objective is to reproduce the original layout drawn by the designer on the semiconductor wafer as well as possible.

Contact lithography, also known as contact printing, is a form of photolithography whereby the image to be printed is obtained by illumination of a photomask in direct contact with a substrate coated with an imaging photoresist layer.

<span class="mw-page-title-main">LIGA</span> Fabrication technology used to create high-aspect-ratio microstructures

LIGA is a fabrication technology used to create high-aspect-ratio microstructures. The term is a German acronym for Lithographie, Galvanoformung, Abformung – lithography, electroplating, and molding.

Plasmonic nanolithography is a nanolithographic process that utilizes surface plasmon excitations such as surface plasmon polaritons (SPPs) to fabricate nanoscale structures. SPPs, which are surface waves that propagate in between planar dielectric-metal layers in the optical regime, can bypass the diffraction limit on the optical resolution that acts as a bottleneck for conventional photolithography.

Computational lithography is the set of mathematical and algorithmic approaches designed to improve the resolution attainable through photolithography. Computational lithography came to the forefront of photolithography technologies in 2008 when the semiconductor industry faced challenges associated with the transition to a 22 nanometer CMOS microfabrication process and has become instrumental in further shrinking the design nodes and topology of semiconductor transistor manufacturing.

<span class="mw-page-title-main">X-ray lithography</span> Lithographic technique that uses X-rays instead of light

X-ray lithography is a process used in semiconductor device fabrication industry to selectively remove parts of a thin film of photoresist. It uses X-rays to transfer a geometric pattern from a mask to a light-sensitive chemical photoresist, or simply "resist," on the substrate to reach extremely small topological size of a feature. A series of chemical treatments then engraves the produced pattern into the material underneath the photoresist.

Multibeam is an American corporation that engages in the design, manufacture, and sale of semiconductor processing equipment used in the fabrication of integrated circuits. Headquartered in Santa Clara, in the Silicon Valley, Multibeam is led by Dr. David K. Lam, the founder and first CEO of Lam Research.

Glossary of microelectronics manufacturing terms

References

  1. ↑ Walsh, M.E.; Zhang, F.; Menon, R.; Smith, H.I. (2014). "Maskless photolithography". Nanolithography. pp. 179–193. doi:10.1533/9780857098757.179. ISBN   9780857095008.
  2. ↑ R. Menon et al., Materials Today, Feb. 2005, pp. 26-33 (2005).
  3. ↑ T. H. P. Chang et al., Microelectronic Engineering 57–58, pp. 117–135 (2001).
  4. ↑ Jung, Il Woong; Wang, Jen-Shiang; Solgaard, O. (August 2006). "Spatial Light Modulators for Maskless Lithography". IEEE/LEOS International Conference on Optical MEMS and Their Applications Conference, 2006. pp. 150–151. doi:10.1109/OMEMS.2006.1708309. ISBN   0-7803-9562-X. S2CID   25574690.
  5. ↑ Watson, G. P.; Aksyuk, V.; Simon, M. E.; Tennant, D. M.; Cirelli, R. A.; Mansfield, W. M.; Pardo, F.; Lopez, D. O.; Bolle, C. A.; Papazian, A. R.; Basavanhally, N. (2006). "Spatial light modulator for maskless optical projection lithography". Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 24 (6): 2852. Bibcode:2006JVSTB..24.2852W. doi:10.1116/1.2387156.
  6. ↑ Yee, I.; Miracky, R.; Reed, J.; Lunceford, B.; Minchuan Wang; Cobb, D.; Caldwell, G. (1997). "Flexible manufacturing of multichip modules for flip chip ICs". Proceedings 1997 IEEE Multi-Chip Module Conference. pp. 130–132. doi:10.1109/MCMC.1997.569357. ISBN   0-8186-7789-9. S2CID   111088663.
  7. ↑ Hilbert, C.; Nelson, R.; Reed, J.; Lunceford, B.; Somadder, A.; Hu, K.; Ghoshal, U. (1999). "Thermoelectric MEMS coolers". Eighteenth International Conference on Thermoelectrics. Proceedings, ICT'99 (Cat. No.99TH8407). pp. 117–122. doi:10.1109/ICT.1999.843347. ISBN   0-7803-5451-6. S2CID   46697625.
  8. ↑ Xie, Zhihua; Yu, Weixing; Wang, Taisheng; et al. (31 May 2011). "Plasmonic nanolithography: a review". Plasmonics. 6 (3): 565–580. doi:10.1007/s11468-011-9237-0. S2CID   119720143.
  9. ↑ Gan, Zongsong; Cao, Yaoyu; Evans, Richard A.; Gu, Min (October 2013). "Three-dimensional deep sub-diffraction optical beam lithography with 9 nm feature size". Nature Communications. 4 (1): 2061. Bibcode:2013NatCo...4.2061G. doi: 10.1038/ncomms3061 . PMID   23784312.
  10. ↑ "Maskless Lithography tool". NanoSystem Solutions, Inc. October 17, 2017.
  11. ↑ Möller, Sören (2020). Accelerator Technology – Applications in Science, Medicine, and Industry (1 ed.). Springer Nature. ISBN   978-3-030-62307-4.
  12. ↑ P. Vettiger et al., IBM J. Res. Dev. 44, pp. 323–340 (2000).
  13. ↑ "Darpa, NIST to end funding for U.S. maskless lithography". EETimes. January 19, 2005.
  14. ↑ EU forms new maskless litho group
  15. ↑ "CORDIS | European Commission". Archived from the original on 2008-03-28. Retrieved 2012-07-17.
  16. ↑ "Department of Defense Fiscal Year (FY) 2010 Budget Estimates" (PDF). May 2009.
  17. ↑ "StackPath". www.militaryaerospace.com. Retrieved 2021-06-19.
  18. ↑ Fritze, M.; Tyrrell, B.; Astolfi, D.; Yost, D.; Davis, P.; Wheeler, B.; Mallen, R.; Jarmolowicz, J.; Cann, S.; Chan, D.; Rhyins, P.; Carney, C.; Ferri, J.; Blachowicz, B. A. (2001). "Gratings of regular arrays and trim exposures for ultralarge scale integrated circuit phase-shift lithography". Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 19 (6): 2366. Bibcode:2001JVSTB..19.2366F. doi:10.1116/1.1408950.
  19. ↑ "ASML takes over Mapper Lithography after the bankruptcy". habr.com. 28 January 2019. Retrieved 2021-06-05.
  20. ↑ "ASML takes over Mapper Lithography after the bankruptcy". habr.com. 28 January 2019. Retrieved 2021-06-05.
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