Ambric

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Ambric, Inc. was a designer of computer processors that developed the Ambric architecture. Its Am2045 Massively Parallel Processor Array (MPPA) chips were primarily used in high-performance embedded systems such as medical imaging, video, and signal-processing.

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Ambric was founded in 2003 in Beaverton, Oregon by Jay Eisenlohr and Anthony Mark Jones. Eisenlohr previously founded and sold Rendition, Inc. to Micron Technology [ dead link ] for $93M, while Jones is a leading expert in analog, digital, and system IC design and is the named inventor on over 120 U.S. patents. Jones was also the founder of a number of companies prior to Ambric, and has since co-founded Vitek IP with technology and patent expert Dan Buri in 2019. Ambric developed and introduced the Am2045 and its software tools in 2007, but fell victim to the financial crisis of 2007–2008. Ambric's Am2045 and tools remained available through Nethra Imaging, Inc., [1] which closed in 2012.

Architecture and programming model

Ambric architecture is a massively parallel distributed memory multiprocessor, based on the Structural Object Programming Model. [2] [3] Each processor is programmed in conventional Java (a strict subset) and/or assembly code. The hundreds of processors on the chip send data and control messages to one another through an interconnect of reconfigurable, self-synchronizing channels, which provide both communication and synchronization. [4] The model of computation is very similar to a Kahn process network with bounded buffers.

Devices and tools

The Am2045 device has 336 32-bit RISC-DSP fixed-point processors and 336 2-kibibyte memories, which run at up to 300 MHz. [5] It has an Eclipse-based integrated development environment including editor, compiler, assemblers, simulator, configuration generator, source-code debugger and video/image-processing, signal-processing, and video-codec libraries.

Power and performance

The Am2045 delivers 1 TeraOPS (Operations Per Second) [6] and 50 Giga-MACs (Multply-Accumulates per second) of fixed-point processing with 6-12W of power consumed (dependent on the application).

Applications

Ambric's MPPA devices were used for high-definition, 2K and 4K video compression, transcoding and analysis, image recognition, medical imaging, signal-processing, software defined radio and other compute-intensive streaming media applications, [7] which otherwise would use FPGA, DSP and/or ASIC chips. The company claimed advantages such as higher performance and energy efficiency, scalability, higher productivity due to software programming rather than hardware design, and off-the-shelf availability.

Video codec libraries were available for a variety of professional camera and video editing formats such as DVCPRO HD, VC-3 (DNxHD), AVC-Intra and others.

An X-Ray customer system employs over 13,000 cores contained in 40 Am2045 chips, doing 3D reconstruction, in under 500W, in a single ATCA chassis. [8]

Other MPPAs include picoChip and IntellaSys, and the UC Davis's AsAP research chip. Companies that offer or offered products classified as manycore (a related classification) devices include Aspex Semiconductor, Cavium, ClearSpeed, Coherent Logix, SPI, and Tilera. The more established processor companies, Texas Instruments and Freescale, offer multicore products, but with a lower number of processors (typically 3–8) and use traditional shared-memory, timing-sensitive programming models.

Recognition

Microprocessor Report gave a 2006 MPR Analysts' Choice Award for Innovation for the Ambric-architecture "for the design concept and architecture of its massively parallel processor, the Am2045". [9]

In 2013, Ambric architecture received the Top 20 award from the IEEE International Symposium on Field-Programmable Custom Computing Machines, recognizing it as one of the 20 most significant publications in the 20-year history of the conference. [10]

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References

  1. ↑ "Ambric Lives On, in a Parallel Universe". edn.com. 2011-06-29. Retrieved 2024-05-08.
  2. ↑ Mike Butts, Anthony Mark Jones, Paul Wasson, "A Structural Object Programming Model, Architecture, Chip and Tools for Reconfigurable Computing", Proceedings of FCCM, April 2007, IEEE Computer Society
  3. ↑ Anthony Mark Jones, Mike Butts. "TeraOPS Hardware: A New Massively-Parallel MIMD Computing Fabric IC", IEEE Hot Chips Symposium, August 2006, IEEE Computer Society
  4. ↑ Mike Butts, "Synchronization through Communication in a Massively Parallel Processor Array", IEEE Micro, vol. 27, no. 5, pp. 32-40, September/October 2007, IEEE Computer Society
  5. ↑ "Design and Programming of the KiloCore Processor Arrays" (PDF). ucdavis.edu. 2020. Retrieved 2024-05-12.
  6. ↑ "Multimode sensor processing using Massively Parallel Processor Arrays (MPPAs)". design-reuse.com. 2008-03-18. Retrieved 2024-05-12.
  7. ↑ "Ambric Now Delivering the Am2045B, a New, Higher Performance, Lower Power Version of its Industry-leading TeraOPS-class MPPA Device". edn.com. 2007-11-15. Retrieved 2024-05-12.
  8. ↑ FPGA Gurus, EDN, "Ambric Lives On in a Parallel Universe", June 29. 2011,
  9. ↑ Microprocessor Report Announces First Group of Winners for the Eighth Annual MPR Analysts' Choice Awards, February 20, 2007, Archived 2007-10-31 at the Wayback Machine
  10. ↑ FCCM20 Endorsement of "A Structural Object Programming Model, Architecture, Chip and Tools for Reconfigurable Computing", April 2013.

Further reading

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