Azuro

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Azuro, Inc. is an electronic design automation (EDA) software company. Formerly headquartered in Santa Clara, California with a development office in Cambridge, England, it is now part of Cadence Design Systems.

Electronic design automation (EDA), also referred to as electronic computer-aided design (ECAD), is a category of software tools for designing electronic systems such as integrated circuits and printed circuit boards. The tools work together in a design flow that chip designers use to design and analyze entire semiconductor chips. Since a modern semiconductor chip can have billions of components, EDA tools are essential for their design.

Software non-tangible executable component of a computer

Computer software, or simply software, is a collection of data or computer instructions that tell the computer how to work. This is in contrast to physical hardware, from which the system is built and actually performs the work. In computer science and software engineering, computer software is all information processed by computer systems, programs and data. Computer software includes computer programs, libraries and related non-executable data, such as online documentation or digital media. Computer hardware and software require each other and neither can be realistically used on its own.

Santa Clara, California City in California

Santa Clara is a city in Santa Clara County, California. The city's population was 116,468 as of the 2010 United States Census, making it the ninth-most populous city in the San Francisco Bay Area. Located on the southern coast of San Francisco Bay immediately west of San Jose and 45 miles (72 km) southeast of San Francisco, the city was founded in 1777 with the establishment of Mission Santa Clara de Asís, the eighth of 21 California missions. The city was later incorporated in 1852. The mission, the city, and the county are all named for Saint Clare of Assisi.

Contents

Azuro develops software for the design of integrated circuits. Azuro specializes in clock network implementation. Azuro's PowerCentric product takes an innovative approach to clock network implementation that produces lower power clock networks with lower clock skew and shorter insertion delay using a smaller area of the integrated circuit than competing tools.

Integrated circuit electronic circuit manufactured by lithography; set of electronic circuits on one small flat piece (or "chip") of semiconductor material, normally silicon

An integrated circuit or monolithic integrated circuit is a set of electronic circuits on one small flat piece of semiconductor material that is normally silicon. The integration of large numbers of tiny transistors into a small chip results in circuits that are orders of magnitude smaller, faster, and less expensive than those constructed of discrete electronic components. The IC's mass production capability, reliability, and building-block approach to circuit design has ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. ICs are now used in virtually all electronic equipment and have revolutionized the world of electronics. Computers, mobile phones, and other digital home appliances are now inextricable parts of the structure of modern societies, made possible by the small size and low cost of ICs.

Clock network

A clock network or clock system is a set of synchronized clocks designed to always show exactly the same time by communicating with each other. Clock networks usually consist of a central master clock kept in sync with an official time source, and one or more slave clocks which receive and display the time from the master.

Clock skew is a phenomenon in synchronous digital circuit systems in which the same sourced clock signal arrives at different components at different times i.e. the instantaneous difference between the readings of any two clocks is called their skew.

Azuro has been particularly focussed on lower power design. In synchronous circuit designs all changes of state are coordinated by a clock, and this clock edge must be distributed to all parts of the chip. Since the clock signal is distributed throughout the entire circuit it can consume a large percentage of the energy used. Azuro's technology allows clock gating and clock network implementation to be combined as a single step, allowing the clock to be prevented from reaching parts of the chip where it is not needed more effectively than competing technologies. The company has a number of patents in the area of low power design, clock tree synthesis and power analysis.

A synchronous circuit is a digital circuit in which the changes in the state of memory elements are synchronized by a clock signal. In a sequential digital logic circuit, data is stored in memory devices called flip-flops or latches. The output of a flip-flop is constant until a pulse is applied to its "clock" input, upon which the input of the flip-flop is latched into its output. In a synchronous logic circuit, an electronic oscillator called the clock generates a string of pulses, the "clock signal". This clock signal is applied to every storage element, so in an ideal synchronous circuit, every change in the logical levels of its storage components is simultaneous. Ideally, the input to each storage element has reached its final value before the next clock occurs, so the behaviour of the whole circuit can be predicted exactly. Practically, some delay is required for each logical operation, resulting in a maximum speed at which each synchronous system can run.

In information technology and computer science, a program is described as stateful if it is designed to remember preceding events or user interactions; the remembered information is called the state of the system.

In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.

History

Azuro was founded in Cambridge in 2002 by Paul Cunningham and Steev Wilcox, using research from their doctoral studies. [1]

Cambridge City and non-metropolitan district in England

Cambridge is a university city and the county town of Cambridgeshire, England, on the River Cam approximately 50 miles (80 km) north of London. At the United Kingdom Census 2011, its population was 123,867 including 24,506 students. Cambridge became an important trading centre during the Roman and Viking ages, and there is archaeological evidence of settlement in the area as early as the Bronze Age. The first town charters were granted in the 12th century, although modern city status was not officially conferred until 1951.

On July 12, 2011 Cadence Design Systems announced that it had acquired Azuro for an undisclosed sum. [1] [2]

Cadence Design Systems American electronic design automation (EDA) software and engineering services company

Cadence Design Systems, Inc. is an American multinational electronic design automation (EDA) software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. The company produces software, hardware and silicon structures for designing integrated circuits, systems on chips (SoCs) and printed circuit boards.

See also

Design flows are the explicit combination of electronic design automation tools to accomplish the design of an integrated circuit. Moore's law has driven the entire IC implementation RTL to GDSII design flows from one which uses primarily stand-alone synthesis, placement, and routing algorithms to an integrated construction and analysis flows for design closure. The challenges of rising interconnect delay led to a new way of thinking about and integrating design closure tools.

Integrated circuit design Engineering process for electronic hardware

Integrated circuit design, or IC design, is a subset of electronics engineering, encompassing the particular logic and circuit design techniques required to design integrated circuits, or ICs. ICs consist of miniaturized electronic components built into an electrical network on a monolithic semiconductor substrate by photolithography.

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Very Large Scale Integration process of creating an integrated circuit by combining thousands of transistors into a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed

Very-large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining millions of transistors or devices into a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed. The microprocessor is a VLSI device. Before the introduction of VLSI technology most ICs had a limited set of functions they could perform. An electronic circuit might consist of a CPU, ROM, RAM and other glue logic. VLSI lets IC designers add all of these into one chip.

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Xilinx company

Xilinx, Inc. is an American technology company and is primarily a supplier of programmable logic devices. It is known for inventing the field-programmable gate array (FPGA) and as the semiconductor company that created the first fabless manufacturing model.

Formal equivalence checking process is a part of electronic design automation (EDA), commonly used during the development of digital integrated circuits, to formally prove that two representations of a circuit design exhibit exactly the same behavior.

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OrCAD electronic design automation software

OrCAD Systems Corporation was a software company that made OrCAD, a proprietary software tool suite used primarily for electronic design automation (EDA). The software is used mainly by electronic design engineers and electronic technicians to create electronic schematics, perform mixed-signal simulation and electronic prints for manufacturing printed circuit boards. OrCAD was taken over by Cadence Design Systems in 1999 and was integrated with Cadence Allegro since 2005.

In VLSI semiconductor manufacturing, the process of Design Closure is a part of the development workflow by which an integrated circuit design is modified from its initial description to meet a growing list of design constraints and objectives.

Timing closure is the process by which a logic design consisting of primitive elements such as combinatorial logic gates and sequential logic gates is modified to meet its timing requirements. Unlike in a computer program where there is no explicit delay to perform a calculation, logic circuits have intrinsic and well defined delays to propagate inputs to outputs. In simple cases, the user can compute the path delay between elements manually. If the design is more than a dozen or so elements this is impractical. For example, the time delay along a path from the output of a D-Flip Flop, through combinatorial logic gates, then into the next D-Flip Flop input must satisfy the time period between synchronizing clock pulses to the two flip flops. When the delay through the elements is greater than the clock cycle time, the elements are said to be on the critical path. The circuit will not function when the path delay exceeds the clock cycle delay so modifying the circuit to remove the timing failure is an important part of the logic design engineer's task.

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Physical design (electronics)

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EVE/ZeBu

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References

  1. 1 2 "Q&A: Former Azuro CEO Explains Clock Concurrent Optimization". Cadence. August 7, 2011.
  2. "Cadence acquires power specialist Azuro". EETimes. July 12, 2011.