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The HITAC S-810 is a vector supercomputer developed, manufactured and marketed by Hitachi. The first models, the S-810/10 and S-810/20, were announced in August 1982, making the S-810 was the second of the first three Japanese supercomputers, following the Fujitsu VP-200, which was announced July 1982, but predating the NEC SX-2, which was announced in April 1983. The S-810 was Hitachi's first supercomputer, although the company had previously built a vector processor, the IAP. The first system shipped was a top-end S-810/20 model, which was delivered to the University of Tokyo's Large Computer Center in October 1983. The S-810 was succeeded as Hitachi's top-end supercomputer by the HITAC S-820 announced in July 1987.
In computing, a vector processor or array processor is a central processing unit (CPU) that implements an instruction set containing instructions that operate on one-dimensional arrays of data called vectors, compared to scalar processors, whose instructions operate on single data items. Vector processors can greatly improve performance on certain workloads, notably numerical simulation and similar tasks. Vector machines appeared in the early 1970s and dominated supercomputer design through the 1970s into the 1990s, notably the various Cray platforms. The rapid fall in the price-to-performance ratio of conventional microprocessor designs led to the vector supercomputer's demise in the later 1990s.
A supercomputer is a computer with a high level of performance compared to a general-purpose computer. The performance of a supercomputer is commonly measured in floating-point operations per second (FLOPS) instead of million instructions per second (MIPS). Since 2017, there are supercomputers which can perform up to nearly a hundred quadrillion FLOPS. Since November 2017, all of the world's fastest 500 supercomputers run Linux-based operating systems. Additional research is being conducted in China, the United States, the European Union, Taiwan and Japan to build even faster, more powerful and more technologically superior exascale supercomputers.
Hitachi, Ltd. is a Japanese multinational conglomerate company headquartered in Chiyoda, Tokyo, Japan. It is the parent company of the Hitachi Group and forms part of the DKB Group of companies. Hitachi is a highly diversified company that operates eleven business segments: Information & Telecommunication Systems, Social Infrastructure, High Functional Materials & Components, Financial Services, Power Systems, Electronic Systems & Equipment, Automotive Systems, Railway & Urban Systems, Digital Media & Consumer Products, Construction Machinery and Other Components & Systems.
There were three models, the low-end S-810/5, the mid-range S-810/10, and the top-end S-810/20. They differ in the number of vector pipelines installed, the number of scalar registers, the number vector registers, and the amount of memory supported. Hitachi claimed that the S-810/5's peak performance was 160 MFLOPS, the S-810/10's was 315 MFLOPS, and the S-810/20's was 630 MFLOPS.
The S-810 implements a Hitachi-designed extension of the IBM System/370 instruction set architecture with 83 vector instructions (80 in the S-810/5 and S-810/10). The vector instructions are register-to-register, meaning that they do not directly reference memory. The scalar processor is a Hitachi HITAC M-280H mainframe with a 28 nanosecond (ns) cycle time (clock rate of approximately 35.71 MHz). In the S-810/20, there are 32 scalar registers, whereas the other models have 16. In all models, the scalar processor has a large 256 kilobyte cache.
International Business Machines Corporation (IBM) is an American multinational information technology company headquartered in Armonk, New York, with operations in over 170 countries. The company began in 1911, founded in Endicott, New York, as the Computing-Tabulating-Recording Company (CTR) and was renamed "International Business Machines" in 1924.
An instruction set architecture (ISA) is an abstract model of a computer. It is also referred to as architecture or computer architecture. A realization of an ISA is called an implementation. An ISA permits multiple implementations that may vary in performance, physical size, and monetary cost ; because the ISA serves as the interface between software and hardware. Software that has been written for an ISA can run on different implementations of the same ISA. This has enabled binary compatibility between different generations of computers to be easily achieved, and the development of computer families. Both of these developments have helped to lower the cost of computers and to increase their applicability. For these reasons, the ISA is one of the most important abstractions in computing today.
Scalar processors represent a class of computer processors. A scalar processor processes only one data item at a time, with typical data items being integers or floating point numbers. A scalar processor is classified as a SISD processor in Flynn's taxonomy.
The vector processor has a 14 ns cycle time (clock rate of approximately 71.43 MHz). The vector registers are 256 elements wide, and each element is 64 bits wide. The S-810/20 has 32 of these registers, whereas the other models have 16. These registers are implemented with 1 kilobit (Kbit) bipolar RAM integrated circuits (ICs) with a 4.5 ns access time. All models have eight 256-bit vector mask registers and 48 vector address registers. All models have three load pipelines and one load/store pipeline for accessing the main memory. The S-810/20 has two lanes, each with two add, one multiply followed by add, and one multiply or divide followed by add floating point pipelines, for a total of twelve. The S-810/10 has one lane with the same configuration as the S-810/20 and therefore a total of six pipelines. CPU logic is implemented with two emitter-coupled logic gate array IC types, a 550-gate part with a 250 picosecond (ps) gate delay and a 1,500-gate part with a 450 ps gate delay.
The kilobit is a multiple of the unit bit for digital information or computer storage. The prefix kilo- (symbol k) is defined in the International System of Units (SI) as a multiplier of 103 (1 thousand), and therefore,
A bipolar junction transistor is a type of transistor that uses both electron and hole charge carriers. In contrast, unipolar transistors, such as field-effect transistors, only use one kind of charge carrier. For their operation, BJTs use two junctions between two semiconductor types, n-type and p-type.
An integrated circuit or monolithic integrated circuit is a set of electronic circuits on one small flat piece of semiconductor material that is normally silicon. The integration of large numbers of tiny transistors into a small chip results in circuits that are orders of magnitude smaller, cheaper, and faster than those constructed of discrete electronic components. The IC's mass production capability, reliability and building-block approach to circuit design has ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. ICs are now used in virtually all electronic equipment and have revolutionized the world of electronics. Computers, mobile phones, and other digital home appliances are now inextricable parts of the structure of modern societies, made possible by the small size and low cost of ICs.
The main memory is implemented with 16 Kbit complementary metal–oxide–semiconductor static random access memory ICs with an access time of 40 ns. The S-810/20 supports 64 to 256 megabyte (MB) of main memory, whereas the other models support 32 to 128 MB.
The megabyte is a multiple of the unit byte for digital information. Its recommended unit symbol is MB. The unit prefix mega is a multiplier of 1000000 (106) in the International System of Units (SI). Therefore, one megabyte is one million bytes of information. This definition has been incorporated into the International System of Quantities.
A central processing unit (CPU), also called a central processor or main processor, is the electronic circuitry within a computer that carries out the instructions of a computer program by performing the basic arithmetic, logic, controlling, and input/output (I/O) operations specified by the instructions. The computer industry has used the term "central processing unit" at least since the early 1960s. Traditionally, the term "CPU" refers to a processor, more specifically to its processing unit and control unit (CU), distinguishing these core elements of a computer from external components such as main memory and I/O circuitry.
Kendall Square Research (KSR) was a supercomputer company headquartered originally in Kendall Square in Cambridge, Massachusetts in 1986, near Massachusetts Institute of Technology (MIT). It was co-founded by Steven Frank and Henry Burkhardt III, who had formerly helped found Data General and Encore Computer and was one of the original team that designed the PDP-8. KSR produced two models of supercomputer, the KSR1 and KSR2.
The Cray-1 was a supercomputer designed, manufactured and marketed by Cray Research. Announced in 1975, the first Cray-1 system was installed at Los Alamos National Laboratory in 1976. Eventually, over 100 Cray-1's were sold, making it one of the most successful supercomputers in history. It is perhaps best known for its unique shape, a relatively small C-shaped cabinet with a ring of benches around the outside covering the power supplies.
Single instruction, multiple data (SIMD) is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data points simultaneously. Such machines exploit data level parallelism, but not concurrency: there are simultaneous (parallel) computations, but only a single process (instruction) at a given moment. SIMD is particularly applicable to common tasks such as adjusting the contrast in a digital image or adjusting the volume of digital audio. Most modern CPU designs include SIMD instructions to improve the performance of multimedia use. SIMD is not to be confused with SIMT, which utilizes threads.
The Advanced Scientific Computer (ASC) is a supercomputer designed and manufactured by Texas Instruments (TI) between 1966 and 1973. The ASC's central processing unit (CPU) supported vector processing, a performance-enhancing technique which was key to its high-performance. The ASC, along with the Control Data Corporation STAR-100 supercomputer, were the first computers to feature vector processing. However, this technique's potential was not fully realized by either the ASC or STAR-100 due to an insufficient understanding of the technique; it was the Cray Research Cray-1 supercomputer, announced in 1975 that would fully realize and popularize vector processing. The more successful implementation of vector processing in the Cray-1 would demarcate the ASC as first-generation vector processors, with the Cray-1 belonging in the second.
The ILLIAC IV was the first massively parallel computer. The system was originally designed to have 256 64-bit floating point units (FPUs) and four central processing units (CPUs) able to process 1 billion operations per second. Due to budget constraints, only a single "quadrant" with 64 FPUs and a single CPU was built. Since the FPUs all had to process the same instruction – ADD
, SUB
etc. – in modern terminology the design would be considered to be single instruction, multiple data, or SIMD.
The Cray X-MP is a supercomputer designed, built and sold by Cray Research. It was announced in 1982 as the "cleaned up" successor to the 1975 Cray-1, and was the world's fastest computer from 1983 to 1985. The principal designer was Steve Chen.
The ETA10 is a line of vector supercomputers designed, manufactured, and marketed by ETA Systems, a spin-off division of Control Data Corporation (CDC). The ETA10 was announced in 1986, with the first deliveries made in early 1987. The system was an evolution of the CDC Cyber 205, which can trace its origins back to the CDC STAR-100.
The CDC Cyber range of mainframe-class supercomputers were the primary products of Control Data Corporation (CDC) during the 1970s and 1980s. In their day, they were the computer architecture of choice for scientific and mathematically intensive computing. They were used for modeling fluid flow, material science stress analysis, electrochemical machining analysis, probabilistic analysis, energy and academic computing, radiation shielding modeling, and other applications. The lineup also included the Cyber 18 and Cyber 1000 minicomputers. Like their predecessor, the CDC 6600, they were unusual in using the ones' complement binary representation.
The CDC STAR-100 is a vector supercomputer that was designed, manufactured, and marketed by Control Data Corporation (CDC). It was one of the first machines to use a vector processor to improve performance on appropriate scientific applications. It was also the first supercomputer to use integrated circuits and the first to be equipped with one million words of computer memory.
The SX-6 is a supercomputer built by NEC Corporation that debuted in 2001; the SX-6 was sold under license by Cray Inc. in the U.S. Each SX-6 single-node system contains up to eight vector processors, which share up to 64 GB of computer memory. The SX-6 processor is a single chip implementation containing a vector processor unit and a scalar processor fabricated in a 0.15 μm CMOS process with copper interconnects, whereas the SX-5 was a multi-chip implementation.
The Emotion Engine is a central processing unit developed and manufactured by Sony Computer Entertainment and Toshiba for use in the PlayStation 2 video game console. It was also used in early PlayStation 3 models sold in Japan and North America to provide PlayStation 2 game support. Mass production of the Emotion Engine began in 1999 and ended in late 2012 with the discontinuation of the PlayStation 2.
The VP2000 was the second series of vector supercomputers from Fujitsu. Announced in December 1988, they replaced Fujitsu's earlier FACOM VP Model E Series. The VP2000 was succeeded in 1995 by the VPP300, a massively parallel supercomputer with up to 256 vector processors.
The Fujitsu FACOM VP is a series of vector supercomputers designed, manufactured, and marketed by Fujitsu. Announced in July 1982, the FACOM VP were the first of the three initial Japanese commercial supercomputers, followed by the Hitachi HITAC S-810 in August 1982 and the NEC SX-2 in April 1983. The FACOM VP were sold until they were replaced by the VP2000 family in 1990. Developed with funding from the Ministry of International Trade and Industry, the FACOM VP was part of an effort designed to wrest control of the supercomputer market from the collection of small US-based companies like Cray Research. The FACOM VP was marketed in Japan by Fujitsu, where the majority of installations were located. Amdahl marketed the systems in the US and Siemens in Europe. The ending of the cold war during this period made the market for supercomputers dry up almost overnight, and the Japanese firms decided that their mass-production capabilities were better spent elsewhere.
The Cray J90 series was an air-cooled vector processor supercomputer first sold by Cray Research in 1994. The J90 evolved from the Cray Y-MP EL minisupercomputer, and is compatible with Y-MP software, running the same UNICOS operating system. The J90 supported up to 32 CMOS processors with a 10 ns clock. It supported up to 4 GB of main memory and up to 48 GB/s of memory bandwidth, giving it considerably less performance than the contemporary Cray T90, but making it a strong competitor to other technical computers in its price range. All input/output in a J90 system was handled by an IOS called IOS Model V. The IOS-V was based on the VME64 bus and SPARC I/O processors (IOPs) running the VxWorks RTOS. The IOS was programmed to emulate the IOS Model E, used in the larger Cray Y-MP systems, in order to minimize changes in the UNICOS operating system. By using standard VME boards, a wide variety of commodity peripherals could be used.
The TurboSPARC is a microprocessor that implements the SPARC V8 instruction set architecture (ISA) developed by Fujitsu Microelectronics, Inc. (FMI), the United States subsidiary of the Japanese multinational information technology equipment and services company Fujitsu Limited located in San Jose, California. It was a low-end microprocessor primarily developed as an upgrade for the Sun Microsystems microSPARC-II-based SPARCstation 5 workstation. It was introduced on 30 September 1996, with a 170 MHz version priced at US$499 in quantities of 1,000. The TurboSPARC was mostly succeeded in the low-end SPARC market by the UltraSPARC IIi in late 1997, but remained available.
The HITAC S-820 is a vector supercomputer developed, manufactured and marketed by Hitachi. Announced in July 1987, it was Hitachi's second supercomputer, succeeding the HITAC S-810. The S-820 is categorized as a second generation Japanese supercomputer.
The HITAC S-3000 is a family of vector supercomputers developed, manufactured and marketed by Hitachi. Announced in the early 1990s, the family succeeded the HITAC S-820. The S-3000 family comprised the low-end and mid-range S-3600 models and the high-end S-3800 models. Unlike Hitachi's previous generations of supercomputers, the S-3000 family was marketed outside Japan.
Numerical Wind Tunnel (数値風洞) was an early implementation of the vector parallel architecture developed in a joint project between National Aerospace Laboratory of Japan and Fujitsu. It was the first supercomputer with a sustained performance of close to 100 Gflop/s for a wide range of fluid dynamics application programs. It stood out at the top of the TOP500 during 1993-1996. With 140 cores, the Numerical Wind Tunnel reached a Rmax of 124.0 GFlop/s and a Rpeak of 235.8 GFlop/s in November 1993.