Intel 5 Series

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Intel 5 Series is a computing architecture introduced in 2008 that improves the efficiency and balances the use of communication channels in the motherboard. The architecture consists primarily of a central processing unit (CPU) (connected to the graphics card and memory) and a single chipset (connected to motherboard components). All motherboard communications and activities circle around these two devices.

Contents

The architecture is a product of adjustments made to the Intel 4 Series to deliver higher performance motherboards while maintaining efficiency and low power. The changes revolve around chipset and processor design, in conjunction with a rearrangement of functions and controllers. The result is the first major change in many years of computing.

Design concept

Intel 4 Series Motherboard Design Intel 4 Series arch.png
Intel 4 Series Motherboard Design

The concept of the architecture was to improve motherboard mechanics to keep pace with the CPU as it gained more speed and multiplied in number of cores. In the previous architecture, the CPU was communicating heavily with the motherboard's central component, the Northbridge chipset, as it was the intermediary between the CPU, memory, and, in most cases, graphics card. The CPU would communicate with the Northbridge chipset when it needed data from the memory or when it needed to output graphics to the display. This arrangement caused the communication channel known as the front-side bus (FSB) to be heavily used. It was not long till either the FSB would reach full capacity or operate inefficiently with more cores. With the memory controller and/or graphics core moved into the processor, the reliance of separate motherboard chipsets for these functions are reduced.

Ibex Peak

Intel 5 Series (Ibex Peak) Motherboard Solution Intel 5 Series architecture.png
Intel 5 Series (Ibex Peak) Motherboard Solution

The Ibex Peak chipset includes only Platform Controller Hub (PCH) per model, which provides peripheral connections, and display controllers for CPU with integrated graphics via Flexible Display Interface (excluding P-models). Additionally, the PCH is connected to the CPU via Direct Media Interface (DMI).

Taking advantage of Intel Nehalem CPUs with integrated graphics and PCI Express ports, the Intel Management Engine (ME) and a display controller for integrated graphics, once housed in north bridge, are moved into the Platform Controller Hub (PCH). The I/O Controller Hub (ICH) function is integrated into the PCH, removing the need for separate north bridge and south bridge.

Intel 5 Series Ibex Peak
ChipsetCode NamesSpec NumberPart numbersRelease DateBus InterfaceLink Speed [lower-alpha 1] PCI Express lanes PCI SATA USB FDI support TDP
3 Gbit/sv2.0
H55 Ibex Peak [1] [2] SLGZX(B3)BD82H55 (PCH)Jan 2010 DMI 2 GB/s6 PCIe 2.0 at 2.5 GT/sYes6 ports12 portsYes5.2 W
P55 SLH24 (B3),
SLGWV (B2)
BD82P55 (PCH)Sep 20098 PCIe 2.0 at 2.5 GT/s14 portsNo4.7 W
H57 SLGZL(B3)BD82H57 (PCH)Jan 2010Yes5.2 W
Q57 SLGZW(B3)BD82Q57 (PCH)5.1 W
Mobile Intel 5 Series
ModelTop marking
PM55 ExpressBD82PM55
QM57 ExpressBD82QM57
HM55 ExpressBD82HM55
HM57 ExpressBD82HM57
QS57 ExpressBD82QS57
Intel 3400 Series
ModelTop markingFab ME Firmware Version PCIe
3400 BD340065 nm6.02.0
3420 BD3420
3450 BD3450

Tylersburg

The Tylersburg family of chipsets is for Socket LGA 1366 supporting CPUs with triple channel memory controllers. Unlike the Ibex Peak chipsets, The Tylersburg family of chipsets do not include the PCH, and the I/O Hub mainly provides extra PCI Express 2.0 ports. Peripheral connections are provided by I/O Controller Hub (ICH) connected to the DMI interface. Intel 5 series IOH support ICH10, while Intel 5500 Series IOH support ICH9 or ICH10.

Single socket Nehalem-based chipset

Intel 5 Series
ChipsetCode NamesSpec NumberPart numbersRelease DateSocketBus Interface PCI Express lanes PCI Intel VT-d support SATA USB FDI support TDP
6 Gbit/s3 Gbit/sv3.0v2.0
X58 1TylersburgSLGBT (B2),
SLGMX (B3),
SLH3M (C2)
AC82X58 (IOH)November 2008 LGA 1366 QPI 36× PCIe 2.0 (IOH);
6× PCIe 1.1 (ICH)
YesYesNone6 portsNone12 portsNo28.6 W2

Dual socket Nehalem-based Xeon chipsets

The Nehalem-based Xeons for dual-socket systems, initially launched as the Xeon 55xx series, feature a very different system structure: the memory controllers are on the CPU, and the CPUs can communicate with one another as peers without going via the chipset. This means that the 5500 and 5520 (initial codename Tylersburg-EP) chipsets are essentially QPI to PCI Express interfaces; the 5520 is more intended for graphical workstations and the 5500 for servers that do not need vast amounts of PCI Express connectivity

Xeon 5500 series
Launch nameCodenameQPI portsQPI speedFast I/OIOCHOther featuresTop marking
5500 Tylersburg-24S,
Tylersburg-24D [3]
1,
2
4.8, 5.86 or 6.4 GT/s1 ×16 PCIe Gen 2, 2 ×4 PCIe Gen 1 to talk to southbridgeICH10 (ICH9 also possible)Integrated Management Engine with its own 100 Mbit Ethernet [4] AC5500 SLGMT 901036 (B-3), AC5500 SLH3N 904728 (C-2)
5520 Tylersburg-36S,
Tylersburg-36D
1,
2
4.8, 5.86 or 6.4 GT/s2 ×16 PCIe Gen 2, 1 ×4 PCIe Gen 1 to talk to southbridgeICH10 (ICH9 also possible)Integrated Management Engine with its own 100 Mbit Ethernet [4] AC5520 SLGMU 901037 (B-3), AC5520 SLH3P 904729 (C-2)

See also

Notes

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References

  1. Intel 5 Series Chipset
  2. Mobile Intel 5 Series Chipset
  3. "Intel X58 Extreme DX58SO motherboard review". Guru3D.com. Retrieved 30 April 2023.
  4. 1 2 "Intel® 5520 Chipset and Intel® 5500 Chipset" (PDF). intel.com. March 2009. Retrieved 30 April 2023.

Ibex Peak

Tylersburg