Northbridge (computing)

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A typical north/southbridge layout (2015) Chipset schematic.svg
A typical north/southbridge layout (2015)
A typical north/southbridge layout (2007) Motherboard diagram.svg
A typical north/southbridge layout (2007)

In computing, a northbridge (also host bridge, or memory controller hub) is one of two chips comprising the core logic chipset architecture on motherboards for older personal computers. A northbridge is connected directly to a CPU via the front-side bus (FSB) to handle high-performance tasks, and is usually used in conjunction with a slower southbridge [1] to manage communication between the CPU and other parts of the motherboard. [2]

Contents

Since the 2010s, die shrink and improved transistor density have allowed for increasing chipset integration, and the functions performed by northbridges are now often incorporated into other components (like southbridges or CPUs themselves). [3] [4] As of 2019, Intel and AMD had both released chipsets in which all northbridge functions had been integrated into the CPU. [4] Modern Intel Core processors have the northbridge integrated on the CPU die, where it is known as the uncore or system agent.

On older Intel based PCs, the northbridge was also named external memory controller hub (MCH) or graphics and memory controller hub (GMCH) if equipped with integrated graphics. Increasingly these functions became integrated into the CPU chip itself, [3] beginning with memory and graphics controllers. For Intel Sandy Bridge and AMD Accelerated Processing Unit processors introduced in 2011, all of the functions of the northbridge reside on the CPU. [5] The corresponding southbridge was renamed by Intel as the Platform Controller Hub and by AMD as the Fusion controller hub. AMD FX CPUs continued to require external northbridge and southbridge chips.

Historically, separation of functions between CPU, northbridge, and southbridge chips was necessary due to the difficulty of integrating all components onto a single chip die. [6] However, as CPU speeds increased over time, a bottleneck emerged due to limitations caused by data transmission between the CPU and its support chipset. [7] The trend for integrated northbridges began near the end of the 2000s — for example, the Nvidia GeForce 320M GPU in the 2010 MacBook Air was a northbridge/southbridge/GPU combo chip. [8]

Overview

The northbridge typically handles communications among the CPU, in some cases RAM, and PCI Express (or AGP) video cards, and the southbridge. [9] [10] Some northbridges also contain integrated video controllers, also known as a Graphics and Memory Controller Hub (GMCH) in Intel systems. Because different processors and RAM require different signaling, a given northbridge will typically work with only one or two classes of CPUs and generally only one type of RAM.

There are a few chipsets that support two types of RAM; generally, these are made available when there is a shift to a new standard. For example, the northbridge from the 2002 Nvidia nForce2 chipset only worked with Socket A processors combined with DDR SDRAM.

The Intel i875 chipset will only work with systems using Pentium 4 processors or Celeron processors that have a clock speed greater than 1.3 GHz and utilize DDR SDRAM, and the Intel i915G chipset only works with the Intel Pentium 4 and the Celeron, but it can use DDR or DDR2 memory.[ citation needed ]

PowerPC

Northbridge chips are most commonly found on X86-based PCs, but they can also be found on other platforms, such as the PowerPC platform. A common example of a northbridge on a PowerPC platform is in Apple's older PowerPC-based computers like the iMac G5, which utilized an IBM CPC945 Northbridge chip. According to an Apple Developer note, The Power Mac G5's northbridge chip connected to a "Mid Bridge", which then connected to a south bridge. [11]

A Kodiak chip: an implementation of IBM's CPC945 northbridge in an iMac G5, a PowerPC-architecture system. IBM CPC945 Northbridge (15420568058).jpg
A Kodiak chip: an implementation of IBM's CPC945 northbridge in an iMac G5, a PowerPC-architecture system.

Etymology

The name is derived from drawing the architecture in the fashion of a map. The CPU would be at the top of the map comparable to due north on most general purpose geographical maps. The CPU would be connected to the chipset via a fast bridge (the northbridge) located north of other system devices as drawn. The northbridge would then be connected to the rest of the chipset via a slow bridge (the southbridge) located south of other system devices as drawn.

Intel i815EP northbridge I815EP.png
Intel i815EP northbridge

Overclocking

The northbridge plays an important part in how far a computer can be overclocked, as its frequency is commonly used as a baseline for the CPU to establish its own operating frequency. This chip typically gets hotter as processor speed becomes faster, requiring more cooling. There is a limit to CPU overclocking, as digital circuits are limited by physical factors such as rise, fall, delay and storage times of the transistors, current gain bandwidth product, parasitic capacitance, and propagation delay, which increases with (among other factors) operating temperature; consequently most overclocking applications have software-imposed limits on the multiplier and external clock setting. Additionally, heat is a major limiting factor, as higher voltages are needed to properly activate field effect transistors inside CPUs and this higher voltage produces larger amounts of heat, requiring greater thermal solutions on the die.

Evolution

A part of an IBM T42 laptop motherboard IBM ThinkPad T42 Motherboard.jpg
A part of an IBM T42 laptop motherboard

The overall trend in processor design has been to integrate more functions onto fewer components, which decreases overall motherboard cost and improves performance. The memory controller, which handles communication between the CPU and RAM, was moved onto the processor die by AMD beginning with their AMD K8 processors and by Intel with their Nehalem processors. One of the advantages of having the memory controller integrated on the CPU die is to reduce latency from the CPU to memory.

Some northbridge chips have supported dual processors, for example Intel's 5000X memory controller used in the original Mac Pro from 2006.

Another example of this kind of change is Nvidia's nForce3 for AMD K8 systems. It combines all of the features of a normal southbridge with an Accelerated Graphics Port (AGP) port and connects directly to the CPU. On nForce4 boards it was marketed as a media communications processor (MCP).

AMD Accelerated Processing Unit processors feature full integration of northbridge functions onto the CPU chip, along with processor cores, memory controller, high speed PCI Express interface (usually for graphics card), and integrated graphics processing unit (iGPU). This was an evolution of the AMD K8, since the memory controller was integrated on the CPU die in the AMD64.

The northbridge was replaced by the system agent introduced by the Intel Sandy Bridge microarchitecture in 2011, which essentially handles all previous Northbridge functions. [12] Intel's Sandy Bridge processors feature full integration of northbridge functions onto the CPU chip, along with processor cores, memory controller, high speed PCI Express interface and integrated graphics processing unit (GPU). This was a further evolution of the Westmere architecture, which also featured a CPU and GPU in the same package. [13]

Recent AMD processors starting with the Zen 2 have moved some I/O functions out of the CPU die onto an I/O die on the same MCM package as the CPU. This die is not normally considered to be part of the Northbridge, since it is in the same package as the CPU, but it serves some of the same functions. [14]

See also

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<span class="mw-page-title-main">Front-side bus</span> Type of computer communication interface

The front-side bus (FSB) is a computer communication interface (bus) that was often used in Intel-chip-based computers during the 1990s and 2000s. The EV6 bus served the same function for competing AMD CPUs. Both typically carry data between the central processing unit (CPU) and a memory controller hub, known as the northbridge.

<span class="mw-page-title-main">Chipset</span> Electronic component to manage data flow of a CPU

In a computer system, a chipset is a set of electronic components on one or more integrated circuits that manages the data flow between the processor, memory and peripherals. The chipset is usually found on the motherboard of computers. Chipsets are usually designed to work with a specific family of microprocessors. Because it controls communications between the processor and external devices, the chipset plays a crucial role in determining system performance.

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<span class="mw-page-title-main">Southbridge (computing)</span> One of the two chips in the core logic chipset architecture on a PC motherboard

The southbridge is one of the two chips in the core logic chipset on older personal computer (PC) motherboards, the other being the northbridge. As of 2023, most personal computer devices no longer use a set of two chips, and instead have a single chip acting as the 'chipset', for example Intel's Z790 chipset.

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<span class="mw-page-title-main">Sandy Bridge</span> Intel processor microarchitecture

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<span class="mw-page-title-main">Platform Controller Hub</span> Family of Intels single-chip chipsets

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References

  1. "Southbridge". TechTarget. Retrieved January 4, 2016.
  2. "Definition of:Northbridge". PC Magazine. Retrieved September 26, 2015.
  3. 1 2 "Trustworthy x86 laptops? There is a way, says system-level security ace". The Register. Retrieved January 4, 2016.
  4. 1 2 "Northbridge". Computer Hope. October 7, 2019.
  5. "Intel i7 2600K (Sandy Bridge) Review". Overclockers.com. 2011-01-03. Retrieved 2015-05-07.
  6. "Chipset: Northbridge and Southbridge". Rigacci.org. 2006-01-27. Retrieved 2015-05-07.
  7. Kent, Allen (1999). Encyclopedia of computer science and technology. New York, NY [u.a.]: Dekker. p. 500. ISBN   9780824722937 . Retrieved September 26, 2015.
  8. The Macbook Air: A Sign of Things to Come – Digital Gravitas
  9. Jones, George (2004-10-22). "Motherboards & Core-Logic Chipsets: The Deep Stuff | What the North Bridge and South Bridge Do". InformIT.com. Retrieved 2015-05-07.
  10. George Jones - Maximum PC 2005 Buyer's Guide - Prentice Hall PTR - ISBN   0-7686-6312-1
  11. "Power Mac G5 Developer Note".
  12. "The Ring Bus & System Agent - Intel's Sandy Bridge Architecture Exposed". Anandtech.com. Retrieved 2015-05-07.
  13. "Intel Core i5 2500K and Core i7 2600K (Sandy Bridge) - Introduction". Legionhardware.com. Archived from the original on 2016-06-05. Retrieved 2015-05-07.
  14. "Chiplets Are the Future, but They Won't Replace Moore's Law".