Propagation delay

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Propagation delay is the time duration taken for a signal to reach its destination, for example in the electromagnetic field, a wire, gas, fluid or solid body.

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Physics

See also radio propagation, velocity factor, signal velocity and mechanical wave.

Electronics

Propagation delay timing diagram of a NOT gate Propagation delay timing diagram.svg
Propagation delay timing diagram of a NOT gate
A full adder has an overall gate delay of 3 logic gates from the inputs A and B to the carry output Cout shown in red. Full-Adder Propagation Delay.svg
A full adder has an overall gate delay of 3 logic gates from the inputs A and B to the carry output Cout shown in red.

Logic gates can have a gate delay ranging from picoseconds to more than 10 nanoseconds, depending on the technology being used. [1] It is the time between the gate input becoming stable and the gate output becoming stable. Manufacturers often refer to the time from the input changing to 50% of its final input level, to the output reaching 50% of its final output level; this may depend on the direction of the level change, in which case separate fall and rise delays tPHL and tPLH or tf and tr are given.

Reducing gate delays allows digital circuits to process data at a faster rate and improve overall performance. Determining the propagation delay of a combined circuit requires identifying the longest path of propagation delays from input to output, and adding each propagation delay along this path.

The principle of logical effort utilizes propagation delays to compare designs implementing the same logical statement. The difference in propagation delays of logic elements is the major contributor to glitches in asynchronous circuits as a result of race conditions.

All of these factors influence each other through an RC time constant: any increase in load capacitance increases C, heat-induced resistance the R factor, and supply threshold voltage increases will affect whether more than one time constants are required to reach the threshold. If the output of a logic gate is connected to a long trace or used to drive many other gates (high fanout) the propagation delay increases substantially.

Networking

In computer networks, propagation delay is the amount of time it takes for the head of the signal to travel from the sender to the receiver. It can be computed as the ratio between the link length and the propagation speed over the specific medium.

Propagation delay is equal to d / s where d is the distance and s is the wave propagation speed. In wireless communication, s=c, i.e. the speed of light. In copper wire, the speed s generally ranges from .59c to .77c. [3] [4] This delay is the major obstacle in the development of high-speed computers and is called the interconnect bottleneck in IC systems.

See also


Related Research Articles

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<span class="mw-page-title-main">CMOS</span> Technology for constructing integrated circuits

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References

  1. 1 2 Balch, Mark (2003). Mcgraw Hill - Complete Digital Design A Comprehensive Guide To Digital Electronics And Computer System Architecture. McGraw-Hill Professional. p. 430. ISBN   978-0-07-140927-8.
  2. "Logic Signal Voltage Levels". All About Circuits. Retrieved 1 June 2016.
  3. "What is propagation delay? (Ethernet Physical Layer)". Ethernet FAQ. 2010-10-21. Retrieved 2010-11-09.
  4. "Propagation Delay and Its Relationship to Maximum Cable Length". Networking Glossary. Archived from the original on 2011-02-20. Retrieved 2010-11-09.