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A digital timing diagram represents a set of signals in the time domain. [1] A timing diagram can contain many rows, usually one of them being the clock. It is a tool commonly used in digital electronics, hardware debugging, and digital communications. Besides providing an overall description of the timing relationships, the digital timing diagram can help find and diagnose digital logic hazards.
Most timing diagrams use the following conventions:
The timing diagram example on the right describes the Serial Peripheral Interface (SPI) Bus. Most SPI master nodes can set the clock polarity (CPOL) and clock phase (CPHA) with respect to the data. This timing diagram shows the clock for both values of CPOL and the values for the two data lines (MISO & MOSI) for each value of CPHA. Note that when CPHA=1, then the data is delayed by one-half clock cycle.
SPI operates in the following way:
When a slave's SS line is high, both its MISO and MOSI line should be high impedance to avoid disrupting a transfer to a different slave. Before SS being pulled low, the MISO & MOSI lines are indicated with a "z" for high impedance. Also, before the SS is pulled low, the "cycle #" row is meaningless and is shown greyed out.
Note that for CPHA=1, the MISO & MOSI lines are undefined until after the first clock edge and are also shown greyed out before that.
A more typical timing diagram has just a single clock and numerous data lines.
The following diagram software may be used to draw timing diagrams:
Peripheral Component Interconnect (PCI) is a local computer bus for attaching hardware devices in a computer and is part of the PCI Local Bus standard. The PCI bus supports the functions found on a processor bus but in a standardized format that is independent of any given processor's native bus. Devices connected to the PCI bus appear to a bus master to be connected directly to its own bus and are assigned addresses in the processor's address space. It is a parallel bus, synchronous to a single bus clock. Attached devices can take either the form of an integrated circuit fitted onto the motherboard or an expansion card that fits into a slot. The PCI Local Bus was first implemented in IBM PC compatibles, where it displaced the combination of several slow Industry Standard Architecture (ISA) slots and one fast VESA Local Bus (VLB) slot as the bus configuration. It has subsequently been adopted for other computer types. Typical PCI cards used in PCs include: network cards, sound cards, modems, extra ports such as Universal Serial Bus (USB) or serial, TV tuner cards and hard disk drive host adapters. PCI video cards replaced ISA and VLB cards until rising bandwidth needs outgrew the abilities of PCI. The preferred interface for video cards then became Accelerated Graphics Port (AGP), a superset of PCI, before giving way to PCI Express.
A shift register is a type of digital circuit using a cascade of flip-flops where the output of one flip-flop is connected to the input of the next. They share a single clock signal, which causes the data stored in the system to shift from one location to the next. By connecting the last flip-flop back to the first, the data can cycle within the shifters for extended periods, and in this configuration they were used as computer memory, displacing delay-line memory systems in the late 1960s and early 1970s.
I2C (Inter-Integrated Circuit; pronounced as “eye-squared-see” or “eye-two-see”), alternatively known as I2C or IIC, is a synchronous, multi-master/multi-slave (controller/target), single-ended, serial communication bus invented in 1982 by Philips Semiconductors. It is widely used for attaching lower-speed peripheral ICs to processors and microcontrollers in short-distance, intra-board communication.
In electronics and especially synchronous digital circuits, a clock signal is an electronic logic signal which oscillates between a high and a low state at a constant frequency and is used like a metronome to synchronize actions of digital circuits. In a synchronous logic circuit, the most common type of digital circuit, the clock signal is applied to all storage devices, flip-flops and latches, and causes them all to change state simultaneously, preventing race conditions.
DMX512 is a standard for digital communication networks that are commonly used to control lighting and effects. It was originally intended as a standardized method for controlling stage lighting dimmers, which, prior to DMX512, had employed various incompatible proprietary protocols. It quickly became the primary method for linking controllers to dimmers and special effects devices such as fog machines and intelligent lights.
Serial Peripheral Interface (SPI) is a de facto standard for synchronous serial communication, used primarily in embedded systems for short-distance wired communication between integrated circuits.
The System Management Bus is a single-ended simple two-wire bus for the purpose of lightweight communication. Most commonly it is found in chipsets of computer motherboards for communication with the power source for ON/OFF instructions. The exact functionality and hardware interfaces vary with vendors.
RS-485, also known as TIA-485(-A) or EIA-485, is a standard, originally introduced in 1983, defining the electrical characteristics of drivers and receivers for use in serial communications systems. Electrical signaling is balanced, and multipoint systems are supported. The standard is jointly published by the Telecommunications Industry Association and Electronic Industries Alliance (TIA/EIA). Digital communications networks implementing the standard can be used effectively over long distances and in electrically noisy environments. Multiple receivers may be connected to such a network in a linear, multidrop bus. These characteristics make RS-485 useful in industrial control systems and similar applications.
The media-independent interface (MII) was originally defined as a standard interface to connect a Fast Ethernet medium access control (MAC) block to a PHY chip. The MII is standardized by IEEE 802.3u and connects different types of PHYs to MACs. Being media independent means that different types of PHY devices for connecting to different media can be used without redesigning or replacing the MAC hardware. Thus any MAC may be used with any PHY, independent of the network signal transmission medium.
The Unibus was the earliest of several computer bus and backplane designs used with PDP-11 and early VAX systems manufactured by the Digital Equipment Corporation (DEC) of Maynard, Massachusetts. The Unibus was developed around 1969 by Gordon Bell and student Harold McFarland while at Carnegie Mellon University.
The Q-bus, also known as the LSI-11 Bus, is one of several bus technologies used with PDP and MicroVAX computer systems previously manufactured by the Digital Equipment Corporation of Maynard, Massachusetts.
I²S, is an electrical serial bus interface standard used for connecting digital audio devices together. It is used to communicate PCM audio data between integrated circuits in an electronic device. The I²S bus separates clock and serial data signals, resulting in simpler receivers than those required for asynchronous communications systems that need to recover the clock from the data stream. Alternatively I²S is spelled I2S or IIS. Despite the similar name, I²S is unrelated to the bidirectional I²C (IIC) bus.
XDR DRAM is a high-performance dynamic random-access memory interface. It is based on and succeeds RDRAM. Competing technologies include DDR2 and GDDR4.
In digital electronics, a tri-state or three-state buffer is a type of digital buffer that has three stable states: a high output state, a low output state, and a high-impedance state. In the high-impedance state, the output of the buffer is disconnected from the output bus, allowing other devices to drive the bus without interference from the tri-state buffer. This can be useful in situations where multiple devices are connected to the same bus and need to take turns accessing it. Systems implementing three-state logic on their bus are known as a three-state bus or tri-state bus.
The STEbus is a non-proprietary, processor-independent, computer bus with 8 data lines and 20 address lines. It was popular for industrial control systems in the late 1980s and early 1990s before the ubiquitous IBM PC dominated this market. STE stands for STandard Eurocard.
Serial general purpose input/output (SGPIO) is a four-signal bus used between a host bus adapter (HBA) and a backplane. Of the four signals, three are driven by the HBA and one by the backplane. Typically, the HBA is a storage controller located inside a server, desktop, rack or workstation computer that interfaces with hard disk drives or solid state drives to store and retrieve data. It is considered an extension of the general-purpose input/output (GPIO) concept.
Chip select (CS) or slave select (SS) is the name of a control line in digital electronics used to select one of integrated circuits out of several connected to the same computer bus, usually utilizing the three-state logic.
In utility and industrial electric power transmission and distribution systems, a numerical relay is a computer-based system with software-based protection algorithms for the detection of electrical faults. Such relays are also termed as microprocessor type protective relays. They are functional replacements for electro-mechanical protective relays and may include many protection functions in one unit, as well as providing metering, communication, and self-test functions.
Synchronous Serial Interface (SSI) is a widely used serial interface standard for industrial applications between a master (e.g. controller) and a slave (e.g. sensor). SSI is based on RS-422 standards and has a high protocol efficiency in addition to its implementation over various hardware platforms, making it very popular among sensor manufacturers. SSI was originally developed by Max Stegmann GmbH in 1984 for transmitting the position data of absolute encoders – for this reason, some servo/drive equipment manufacturers refer to their SSI port as a "Stegmann Interface". It was formerly covered by the German patent DE 34 45 617 which expired in 1990. It is very suitable for applications demanding reliability and robustness in measurements under varying industrial environments.
The UNI/O bus is an asynchronous serial bus created by Microchip Technology for low speed communication in embedded systems. The bus uses a master/slave configuration, requiring one signal to pass data between devices. The first devices supporting the UNI/O bus were released in May 2008.
