The C7 microprocessor from VIA Technologies is a seventh-generation CPU targeted at the consumer and embedded market.
Model Number | Frequency | L2-Cache | Front Side Bus | Multiplier | Voltage | TDP | Socket | Release Date | Part Number(s) |
---|---|---|---|---|---|---|---|---|---|
C7 1.0 | 1000 MHz | 128 KiB | 400 MT/s | 10× | V | 9 W | NanoBGA2 | May 27, 2005 | |
C7 1.3 | 1300 MHz | 128 KiB | 400 MT/s | 13× | 1.004 V | 10 W | NanoBGA2 | May 27, 2005 | |
C7 1.5 | 1500 MHz | 128 KiB | 400 MT/s | 15× | V | 12 W | NanoBGA2 | May 27, 2005 | |
C7 1.6 | 1600 MHz | 128 KiB | 400 MT/s | 16× | V | 15 W | NanoBGA2 | May 27, 2005 | |
C7 1.8 | 1800 MHz | 128 KiB | 800 MT/s | 9× | V | 18 W | NanoBGA2 | May 27, 2005 | |
C7 2.0 | 2000 MHz | 128 KiB | 800 MT/s | 10× | V | 20 W | NanoBGA2 | May 27, 2005 |
Model Number | Frequency | L2-Cache | Front Side Bus | Multiplier | Voltage | TDP | Socket | Release Date | Part Number(s) |
---|---|---|---|---|---|---|---|---|---|
C7-D 1.5 | 1500 MHz | 128 KiB | 400 MT/s | 15× | 1.084 V | 15 W | NanoBGA2 | September 13, 2006 | |
C7-D 1.8 | 1800 MHz | 128 KiB | 400 MT/s | 18× | V | 20 W | NanoBGA2 | September 13, 2006 | |
C7-D 2.0 | 2000 MHz | 128 KiB | 800 MT/s | 10× | V | W | NanoBGA2 |
Model Number | Clock Speed | L2 Cache | FSB Speed | Clock Multiplier | Voltage Range | TDP | Socket | Release Date |
---|---|---|---|---|---|---|---|---|
C7-M 754 | 1.5 GHz | 128 KB | 400 MHz | 15× | 1.004 V | 12 W | Socket 479 | June 1, 2005 |
C7-M 764 | 1.6 GHz | 128 KB | 400 MHz | 16× | 1.084 V | 15 W | Socket 479 | June 1, 2005 |
C7-M 765 | 1.6 GHz | 128 KB | 533 MHz | 12× | 1.084 V | 15 W | Socket 479 | June 1, 2005 |
C7-M 784 | 1.8 GHz | 128 KB | 400 MHz | 18× | 1.148 V | 18 W | Socket 479 | June 1, 2005 |
C7-M 785 | 1.86 GHz | 128 KB | 533 MHz | 14× | 1.148 V | 18 W | Socket 479 | June 1, 2005 |
C7-M 794 | 2 GHz | 128 KB | 400 MHz | 20× | 1.196 V | 20 W | Socket 479 | June 1, 2005 |
C7-M 795 | 2 GHz | 128 KB | 533 MHz | 15× | 1.148 V - 1.196 V | 20 W | Socket 479 | June 1, 2005 |
Model Number | Clock Speed | L2 Cache | FSB Speed | Clock Multiplier | Voltage Range | TDP | Socket | Release Date | Part Number(s) |
---|---|---|---|---|---|---|---|---|---|
C7-M ULV | 1 GHz | 128 KB | 400 MHz | 10× | 0.796 V | 3.5 W | Socket 479 | March 10, 2006 | |
C7-M ULV | 1.2 GHz | 128 KB | 400 MHz | 12× | 0.796 - 0.844 V | 5 W | Socket 479 | March 10, 2006 | |
C7-M ULV | 1.2 GHz | 128 KB | 800 MHz | 6x | 0.796 - 0.844 V | 5 W | Socket 479 | ? | |
C7-M ULV | 1.5 GHz | 128 KB | 400 MHz | 15× | 0.795 - 0.957 V | 7.5 W | Socket 479 | March 10, 2006 | |
C7-M ULV | 1.6 GHz | 128 KB | 400 MHz | 16x | 0.796 - 0.957 V | 7.5 W | Socket 479 | ? | |
C7-M ULV | 1.6 GHz | 128 KB | 800 MHz | 8× | 0.796 - 0.988 V | 8 W | Socket 479 | September 2007 |
VIA PadLock is a central processing unit (CPU) instruction set extension to the x86 microprocessor instruction set architecture (ISA) found on processors produced by VIA Technologies and Zhaoxin. Introduced in 2003 with the VIA Centaur CPUs, the additional instructions provide hardware-accelerated random number generation (RNG), Advanced Encryption Standard (AES), SHA-1, SHA256, and Montgomery modular multiplication.