BCDMOS is a complex circuit composed of bipolar, CMOS and DMOS devices. [1]
BCDMOS technology allows to drive discrete high voltage components (several hundred of operating voltage) at high frequency while keeping high integration with technology nodes down to 40 nm or 22 nm. Many applications still use process node of 0.35μm in 2023. [2]
Application of this type of circuits are find in automotive, audio amplifier, RF, industry, silicon photomultiplier (SiPM). [3]
SGS (now STmicroelectronics) invented the BCD (bipolar-CMOS-DMOS) technology - revolutionary at the time - in 1985 [1] and has continually developed it ever since. BCD is a family of silicon processes, each of which combines the strengths of three different process technologies onto a single chip. [4]
According to Maxim website,[ citation needed ] it is an innovative process characteristics that provides the following features:
According to Dongbu HiTek's news,[ citation needed ] it claims to launch the first 0.18-micrometre BCDMOS process in industry. The new process integrates logic, analog and hi-voltage functions to reduce size.
An integrated circuit (IC), also known as a microchip, computer chip, or simply chip, is a small electronic device made up of multiple interconnected electronic components such as transistors, resistors, and capacitors. These components are etched onto a small piece of semiconductor material, usually silicon. Integrated circuits are used in a wide range of electronic devices, including computers, smartphones, and televisions, to perform various functions such as processing and storing information. They have greatly impacted the field of electronics by enabling device miniaturization and enhanced functionality.
Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as computer processors, microcontrollers, and memory chips. It is a multiple-step photolithographic and physico-chemical process during which electronic circuits are gradually created on a wafer, typically made of pure single-crystal semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications.
In electronics, the metal–oxide–semiconductor field-effect transistor is a type of field-effect transistor (FET), most commonly fabricated by the controlled oxidation of silicon. It has an insulated gate, the voltage of which determines the conductivity of the device. This ability to change conductivity with the amount of applied voltage can be used for amplifying or switching electronic signals. The term metal–insulator–semiconductor field-effect transistor (MISFET) is almost synonymous with MOSFET. Another near-synonym is insulated-gate field-effect transistor (IGFET).
Complementary metal–oxide–semiconductor is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips, and other digital logic circuits. CMOS technology is also used for analog circuits such as image sensors, data converters, RF circuits, and highly integrated transceivers for many types of communication.
Bipolar CMOS (BiCMOS) is a semiconductor technology that integrates two semiconductor technologies, those of the bipolar junction transistor and the CMOS logic gate, into a single integrated circuit. In more recent times the bipolar processes have been extended to include high mobility devices using silicon–germanium junctions.
SiGe, or silicon–germanium, is an alloy with any molar ratio of silicon and germanium, i.e. with a molecular formula of the form Si1−xGex. It is commonly used as a semiconductor material in integrated circuits (ICs) for heterojunction bipolar transistors or as a strain-inducing layer for CMOS transistors. IBM introduced the technology into mainstream manufacturing in 1989. This relatively new technology offers opportunities in mixed-signal circuit and analog circuit IC design and manufacture. SiGe is also used as a thermoelectric material for high-temperature applications (>700 K).
Silicon on sapphire (SOS) is a hetero-epitaxial process for metal–oxide–semiconductor (MOS) integrated circuit (IC) manufacturing that consists of a thin layer of silicon grown on a sapphire wafer. SOS is part of the silicon-on-insulator (SOI) family of CMOS technologies.
In computer engineering, a logic family is one of two related concepts:
The 90 nm process refers to the technology used in semiconductor manufacturing to create integrated circuits with a minimum feature size of 90 nanometers. It was an advancement over the previous 130 nm process. Eventually, it was succeeded by smaller process nodes, such as the 65 nm, 45 nm, and 32 nm processes.
A mixed-signal integrated circuit is any integrated circuit that has both analog circuits and digital circuits on a single semiconductor die. Their usage has grown dramatically with the increased use of cell phones, telecommunications, portable electronics, and automobiles with electronics and digital sensors.
In electronics, a latch-up is a type of short circuit which can occur in an integrated circuit (IC). More specifically, it is the inadvertent creation of a low-impedance path between the power supply rails of a MOSFET circuit, triggering a parasitic structure which disrupts proper functioning of the part, possibly even leading to its destruction due to overcurrent. A power cycle is required to correct this situation.
In integrated circuits, depletion-load NMOS is a form of digital logic family that uses only a single power supply voltage, unlike earlier NMOS logic families that needed more than one different power supply voltage. Although manufacturing these integrated circuits required additional processing steps, improved switching speed and the elimination of the extra power supply made this logic family the preferred choice for many microprocessors and other logic elements.
The "32 nm" node is the step following the "45 nm" process in CMOS (MOSFET) semiconductor device fabrication. "32-nanometre" refers to the average half-pitch of a memory cell at this technology level.
PMOS or pMOS logic is a family of digital circuits based on p-channel, enhancement mode metal–oxide–semiconductor field-effect transistors (MOSFETs). In the late 1960s and early 1970s, PMOS logic was the dominant semiconductor technology for large-scale integrated circuits before being superseded by NMOS and CMOS devices.
Polysilicon depletion effect is the phenomenon in which unwanted variation of threshold voltage of the MOSFET devices using polysilicon as gate material is observed, leading to unpredicted behavior of the electronic circuit. Because of this variation High-k Dielectric Metal Gates (HKMG) were introduced to solve the issue.
RF Micropower is a fabless semiconductor company based in Phoenix, Arizona that sells and licenses the RFuP technology that was initially developed by SJT Micropower, Inc. The company's proprietary technology enables high voltage Si-MESFET transistors to be fabricated on commercial SOI CMOS processes without altering the native process or adding additional fabrication steps which allows high levels of monolithic integration. These power transistors can operate at voltages that are 20 times higher than the baseline CMOS transistors and at several Watts of power. The technology has been implemented in various integrated circuit solutions including RF power amplifiers and power regulation circuits. According to their website, they have demonstrated Si-MESFETs at the 350 nm, 250 nm, 150 nm, 45 nm and 32 nm process nodes. The smallest process node for MESFETs on any type of substrate is currently 32 nm.
Bijan Davari is an Iranian-American electrical engineer. He is an IBM Fellow and Vice President at IBM Thomas J Watson Research Center, Yorktown Hts, NY. His pioneering work in the miniaturization of semiconductor devices changed the world of computing. His research led to the first generation of voltage-scaled deep-submicron CMOS with sufficient performance to totally replace bipolar technology in IBM mainframes and enable new high-performance UNIX servers. As head of IBM’s Semiconductor Research Center (SRDC), he led IBM into the use of Copper interconnect, silicon on insulator (SOI), and Embedded DRAM before its rivals. He is a member of the U.S. National Academy of Engineering and is known for his seminal contributions to the field of CMOS technology. He is an IEEE Fellow, recipient of the J J Ebers Award in 2005 and IEEE Andrew S. Grove Award in 2010. At the present time, he leads the Next Generation Systems Area of research.
Dr. Gary Patton is an American technologist and business executive. He is currently the Corporate Vice President and General Manager of Design Enablement and Components Research in the Technology Development Group at Intel. He has spent most of his career in IBM, starting in IBM's Research Division and holding management and executive positions in IBM's Microelectronics Division in Technology Development, Design Enablement, Manufacturing, and Business Line Management.
Bruno Murari is an Italian inventor. During his career he has patented about 200 inventions in the field of circuit design, power technologies and MEMS devices. He is the only Italian to have received the Elmer A. Sperry Award, which is awarded to those who have distinguished themselves with proven engineering contributions to advance the field of transport. He was defined "legendary analog engineer" and "father" of the BCD technology.
