Dave Jaggar

Last updated

Dave Jaggar
Born
David Vivian Jaggar

(1967-02-04) 4 February 1967 (age 57)
Christchurch, New Zealand
CitizenshipNew Zealand
Alma mater University of Canterbury (BSc MSc Hons.)
Known for ARM Thumb architecture
Children3
Awards
Scientific career
Institutions
Thesis A Performance Study of the Acorn RISC Machine  (1990)

David Jaggar (born 4 February 1967) [1] is a computer scientist who was responsible for the development of the ARM architecture between 1992 and 2000, redefining it from a low-cost workstation processor to the dominant embedded system processor.

Contents

Early life and education

Jaggar was born in 1967 in Christchurch, New Zealand and was educated at Shirley Boys' High School. [1] He attended the University of Canterbury, where he gained a Bachelor of Science degree in Computer Science in 1987 and a Master of Science degree in Computer Science in 1991. His Master's thesis was titled A Performance Study of the Acorn RISC Machine, in which he exposed shortcomings of the early ARM designs. [2]

Career

Jaggar joined Cambridge-based ARM in June 1991, as a programmer and initially developed the ARMulator instruction set simulator. [1] He is the designer of the ARM7 microprocessor and architect of the ARM7D, ARM7DM and ARM7TDMI processors. He is also the architect of the ARM9TDMI processor, having derived that family from the Digital StrongARM. He is the author of the ARM Architecture Reference Manual. [3] In 1996 he founded the ARM Austin design center where he designed the ARM10 family, the VFP Vector Floating Point unit and ARMv5 System and Debug architectures. [4]

Jaggar is best known for creating the Thumb architecture to re-position ARM as an embedded processor. The original ARM architecture, inherited from Acorn, had both commercial and technical flaws which made it unsuitable for ARM's Intellectual Property licensing business model. Firstly it had no patent coverage and was therefore fully vulnerable to being copied and licensed for free (e.g. Amber). Secondly it suffered from poor code density, typical of a RISC instruction set, and therefore to reach its maximum performance required an expensive memory system, in terms of both cost and power consumption. [5] In response to these problems, Jaggar invented a new instruction set architecture, incorporating the concept of a CPU with two instruction sets each sharing a common datapath, the first encoded in 16 bits designed for maximum code density, and the second encoded in 32 bits for maximum performance (based largely on the original ARM instruction set for backwards compatibility). This "imaginative leap" [6] solved the code density problem and resulted in two key patents for ARM, [7] [8] and enabled ARM to defend its intellectual property. [9] The Thumb compressed instruction set was first implemented in the ubiquitous ARM7TDMI which underpinned the successful ARM licensing business model for many years. [10] [11] Subsequently, in the ARM Cortex-M family (ARM's most prolific processor cores) the legacy 32-bit ARM instruction set was dropped altogether in favour of just the Thumb instruction set, and Thumb continues as the basis of the ARMv8-M architecture [12] at the center of ARM's expectation of one trillion ARM-based Internet of Things (IoT) devices. [13]

Honours and awards

Jaggar received the 2019 James Clerk Maxwell Medal from the IEEE and RSE with fellow ARM engineer David Flynn for "contributions to the development of novel Reduced Instruction Set Computer (RISC) architectures adopted in 100 billion+ microprocessor cores worldwide". [14]

Personal life

Jaggar has two daughters and a son. [1]

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References

  1. 1 2 3 4 Computer History Museum. "Oral History of David "Dave" Jaggar" (PDF). Retrieved 29 January 2019.
  2. ↑ Jaggar, David (1990). A performance study of the Acorn RISC machine (Masters thesis). UC Research Repository, University of Canterbury. doi:10.26021/2065. hdl:10092/9405.
  3. ↑ Jaggar, Dave (1996). ARM Architecture Reference Manual. Prentice Hall. pp. 6–1. ISBN   978-0-13-736299-8.
  4. ↑ Clarke, Peter (15 October 1998). "ARM10 positioned for the consumer challenge". IEEE Times.
  5. ↑ Segars, Simon; Clarke, Keith; Goudge, Liam (October 1995). "Embedded Control Problems, Thumb, and the ARM7TDMI". IEEE Micro. 15 (5). IEEE: 22–30. doi:10.1109/40.464580. ISSN   0272-1732.
  6. ↑ Furber, Steve (15 March 2017). "Microprocessors: the engines of the digital age". Proceedings of the Royal Society of London. Series A: Mathematical, Physical and Engineering Sciences. 473 (2199). The Royal Society Publishing: 20160893. Bibcode:2017RSPSA.47360893F. doi:10.1098/rspa.2016.0893. ISSN   1364-5021. PMC   5378251 . PMID   28413353.
  7. ↑ US 5740461,Jaggar, David,"Data processing with multiple instruction sets",issued 14 April 1998
  8. ↑ US 5568646,Jaggar, David,"Multiple instruction set mapping",issued 22 October 1996
  9. ↑ Gain, Bruce (22 March 2000). "ARM files patent infringement suit against picoTurbo". EE Times.
  10. ↑ Jaggar, Dave (July–August 1997). "ARM Architecture And Systems". IEEE Micro. 17 (4). IEEE: 9–11. doi:10.1109/MM.1997.612174. ISSN   0272-1732. S2CID   5295482.
  11. ↑ Jennings, Mike (19 October 2011). "The Rise and Rise of ARM". IT Pro.
  12. ↑ ARM. "Introduction to the ARMv8-M architecture" . Retrieved 28 January 2019.
  13. ↑ Softbank. "ARM Segment" . Retrieved 28 January 2019.
  14. ↑ IEEE. "2019 IEEE/RSE James Clerk Maxwell medal" (PDF). Institute of Electrical and Electronics Engineers (IEEE). Archived from the original (PDF) on 22 February 2019. Retrieved 19 December 2018.
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