Ferranti Argus

Last updated

Ferranti's Argus computers were a line of industrial control computers offered from the 1960s into the 1980s. Originally designed for a military role, a re-packaged Argus was the first digital computer to be used to directly control an entire factory. They were widely used in a variety of roles in Europe, particularly in the UK, [1] where a small number continue to serve as monitoring and control systems for nuclear reactors.

Contents

Original series

Blue Envoy, hearing aid computer

The original concept for the computer was developed as part of the Blue Envoy missile project. This was a very long-range surface-to-air missile system with a range on the order of 200 miles (320 km). To reach these ranges, the missile was "lofted" in a nearly vertical trajectory at launch, flying as quickly as possible to high altitude where it suffered less drag during the subsequent long cruise toward the target. During the vertical climb, the missile's radar would not be able to see the target, so during this period it was command guided from the ground. [2]

Argus began as a system to read the radar data, compute the required trajectory, and send that to the missile in-flight. The system not only had to develop the trajectory, but also directly controlled the control surfaces of the missile and thus had a complete control feedback system. Development was carried out by Maurice Gribble at Ferranti's Automation Division in Wythenshawe starting in 1956. The system used OC71 transistors from Mullard, originally designed for use in hearing aids. They could only be run at the low speed of 25 kHz, but this was enough for the task. [3]

Blue Envoy was cancelled in 1957 as part of the sweeping 1957 Defence White Paper. Ferranti decided to continue the development of the computer for other uses. During a visit by Prince Philip, Duke of Edinburgh in November 1957, they set up a system with an automotive headlamp connected to a handle that could be moved by hand to shine at any point on a wall, while the computer attempted to move a second headlamp to lay on the same spot on the wall. [4]

Prototype Argus

Ferranti continued development of the system, and during 1958 they completed a prototype of a commercial product which they showed publicly for the first time at the Olympia in November. [4] This machine used new circuitry that ran at the much faster rate of 500 kHz. [5] The name "Argus" (from the Greek God of that name) was assigned the next year, keeping with the Ferranti tradition of using Greek names for their computers. They selected Argus as this was the all-seeing god, appropriate for a machine that would be tasked with controlling complex systems. [6]

The new system had a number of differences from the hearing aid machine. Among these was the introduction of interrupts to better handle timing of various events. The earlier machine was so slow that these sorts of issues were dealt with simply by checking every physical input in a loop, but with the much faster performance of the new design this was no longer appropriate as most of the tests would reveal no changes and thus be wasted. These sorts of tasks were now controlled by interrupts, so the device could indicate when its data was ready to be processed. The system added core memory for temporary storage, replacing the flip-flops from the earlier system, and a plugboard for programming. [7] [8]

The first delivery [9] [10] [11] [12] [8] would be to Imperial Chemical Industries (ICI) to go into use as the control system for ICI's soda ash/ammonia plant at Fleetwood. [13] An agreement was reached in March 1960 [14] and the machine was installed April/May 1962. [15] [16] This was the first large factory to be controlled directly by a digital computer. [17] [18] Other European sales followed. [19]

The Argus circuitry was based on germanium transistors with 0 and -6 volts representing binary 1 and 0, respectively. The computer was based on a 12-bit word length with 24-bit instructions. The arithmetic was handled in two parallel 6-bit ALUs operating at 500 kHz. Additions in the ALU took 12 μs, but adding in the memory access time meant simple instructions took about 20 μs. Double-length (24-bit) arithmetic operations were also provided. Data memory was supplied in a 12-bit, 4096 word, core memory store, while up to 64 instruction words were stored in a separate plugboard tray then 8 trays to a box and 4 boxes in a rack giving 2048 lines of program, using ferrite pegs dropped into holes to create a "1". Opcodes were 6 bits, registers 3 bits, index register (modifier) 2 bits and data address 13 bits. [20]

Bloodhound Mark II

Shortly after the cancellation of the Blue Envoy in 1957, an emergency meeting between the primary contractors, Ferranti and Bristol Aerospace, led to the idea of combining components of the Blue Envoy with the existing Bristol Bloodhound to produce a much more capable design. This produced the Bloodhound Mark II, roughly doubling the range to about 75 miles (121 km) and using the new radar systems from the Envoy which allowed the missile to track targets much closer to the ground whilst also much more resistant to radar jamming. [21]

Unlike Blue Envoy, Bloodhound was expected to be able to see the target through the entire attack. Guidance was semi-active radar homing, with an illuminator radar lighting up the targets, and a receiver in the missile using the reflected signal to track. For this to work, the illuminator had to be pointed at the target using information from a separate tactical control radar, and the receiver in the nose of the missile had to be pointed at the target. The illuminator and missiles would not necessarily be close together, complicating the calculations. [22] Further, the receiver had to filter out signals that were not of the expected Doppler shifted frequency range, so the computer also had to calculate the expected frequency shift to set the receiver's filters. [23]

The accuracy required of the calculations was beyond the capability of small military computers used to that point. [24] An experimental system by Derek Whitehead using a digital computer was easily able to accomplish the calculations. He suggested placing the computers at the Orange Yeoman radar sites as calculation centers that would feed this information to the missile batteries. [25]

Whitehead was a friend of Gribble's and was aware of his work on a small computer, and first raised the issue sometime in autumn 1959. Once the decision had been made to move to a digital computer, all sorts of secondary tasks were handed off to the machine. This included everything from maintenance testing to missile launch control to the calculation of Doppler "zero points" where the signal would be expected to drop to zero as the target crossed at right angles to the radar. [23]

Argus 200 and 100

The original design was followed in 1963 by the single-ALU Argus 100, which cost around £20,000 [26] (equivalent to approximately £430,000 in 2020). [lower-alpha 1] Unlike the original, the Argus 100 used a flat 24-bit addressing scheme with both data and code stored in a single memory. A smaller 5-bit opcode was used in order to simplify the basic logic and gain an address bit. The single ALU and other changes resulted in a basic operation time of 72 μs. One notable use of the Argus 100 was to control the Jodrell Bank Mark II telescope in 1964. With the 100's release, the original design was retroactively renamed Argus 200. [6]

The Argus 200 model would eventually sell 63 machines, and the 100 14. [27]

Argus 300

The design of the Argus 300 was started in 1963, with the first delivery in 1965. [16] This was a much faster machine featuring a fully parallel-architecture arithmetic logic unit, as opposed to the earlier and much slower serial units. Its instruction set was nevertheless fully compatible with the Argus 100. The 300 was very successful and used throughout the 1960s in various industrial roles.

A variant of the 300 was the Argus 350, which allowed external access to its core to allow direct memory access. This improved performance of input/output, avoiding having to move data via code running on the processor. The 350 was used in various military simulators, including the Royal Navy for frigate, submarine and helicopter-based anti-submarine training, and the Royal Air Force for a Bloodhound Mk.II simulator and the Vickers VC10 flight simulator built at Redifon and delivered to RAF Brize Norton in 1967. The model used on the VC10 Simulator was a 3520B, this meant that it had (20)kWords of memory and a (B)acking Store. Redifon also used the 350 on the Air Canada DC9 flight simulator that was installed in Montreal in the Spring of 1966. The 350's were delivered in the 1967 to 1969 timeframe.

Silicon replacements

The design of the Argus 400 [28] [29] started at the same time as the Argus 300. In logical terms the 400 was similar to the earlier 100, using serial ALUs. However, it featured an entirely new electrical system. Previous machines used germanium transistors to form the logic gates. The Argus 400 used silicon transistors in a NOR-logic designed by Ferranti Wythenshawe called MicroNOR II, [30] with more "conventional" logic where 0 and +4.5 represented binary 1 and 0, respectively. The rest of the world however used 0 volts to represent 0 and + 2.4 (to 5) volts to represent 1. This was called NAND logic. They are in fact both the same circuitry. When Texas Instruments brought out their “74” series of integrated circuits the specification of MicroNOR II was changed from 4.5 volts to 5 volts so the two families could work together. The machine was packaged to fit into a standard Air Transport Rack. Multilayer PCBs were not routine in 1963 and Ferranti developed processes for bonding the boards and plating through the circuit boards. The drawing office had to learn how to design multilayer boards, which was first laid out on tape then transferred to film. It took around two years for the Argus 400 to go into production, with the first delivery in 1966, [16] [31] weighing more than 13 kilograms (29 lb). [32]

Argus 500 Argus 500 1.JPG
Argus 500

The Argus 500, designed about 3 years later, used parallel arithmetic and was much faster. It was designed to be plugged into a larger 19 inch rack mounted frame, together with up to four core store (memory) units. The Argus 400 was repackaged to be the same as the Argus 500 and the two machines were plug compatible. The Argus 400 used 18 small PCBs for its CPU each of which was wire-wrapped to the backplane using 70 miniature wire wraps. Removing a card was tedious. The Argus 500 initially used the same packages, and also wire-wrap, on larger boards, but later versions employed dual-in-line ICs which were soldered flat onto the PCB and were much easier to remove.

Like the earlier designs, the 400 and 500 used the same 14-bit address space and 24-bit instruction set and were compatible. The 500 added new instructions that used three-bits of the accumulator for offset indexing as well. Both machines ran at a 4 MHz basic clock cycle, much faster than the earlier machines' 500 kHz. Both used core memory which was available in two cycle times. The Argus 400 used a 2 μs core whereas the Argus 500 had 2 μs in earlier machines and 1 μs for later ones, doubling performance. The difference between the 400 and 500 was similar to the split between the 100 and 300, in that the 500 had a parallel ALU and the 400 was serial. The Argus 400 had an add time (two 24 bit numbers) of 12 μs. The Argus 500 (with 1 μs store) took 3 μs. Divide (the longest instruction) took 156 μs on the Argus 400 and the Argus 500 took 9 μs. The Argus 500 was of course much more expensive.

A CORAL 66 high-level programming language compiler for the Argus 500 was developed by the Royal Signals and Radar Establishment under contract to Ferranti for use in industrial control and automation projects. [33]

Typical Argus 500 installations were chemical plants (process control) and nuclear power stations (process monitoring). [34] [35] A later application was for Police Command and Control installations, one of the more famous ones being for Strathclyde Police in Glasgow. This system provided the first visual display of resource locations using maps provided by 35mm slide projectors projecting through a port-hole in the tube of the VDU screen.

An Argus 400 replaced the 100 at Jodrell Bank in 1971. [36] There was a special version of the Argus 400 made for the Boadicea seat booking network for BOAC. This removed the multiply and divide functions as these used a significant number of expensive JK flip-flops and it was cost effective at the time to save these 24 and a few other components. Overall, the 500 proved to be one of Ferranti's best-selling products, and found especially wide use on oil platforms during the opening of the North Sea oil fields during the 1970s. [37]

Argus 600 and 700

Breaking with the past, the next series of Argus machines were completely new designs and not backward compatible. The Argus 600 was an 8-bit machine, intended for use by manufacturers of electrical and electronic equipment who required a relatively simple computer or programmable control device. It possessed a basic core memory of 1,024 words, expandable in blocks of the same size up to a maximum of 8,192 words. A simple mnemonic programming language called ASSIST, comprising 17 single-address instructions, was developed for the new machine. Costing around £1,700 when introduced in 1970, at the time the Argus 600 was cheapest digital computer available in the United Kingdom. It could be linked directly or via telephone lines to larger computers and its hardware interface allowed modules from the Argus range of peripheral and plant connection equipment to be added as required. [26]

The Argus 600 was followed by the Argus 700, which used 16-bit architecture. Design of the 700 started around 1968/9 and the range was still in production in the mid 1980s achieving international success for industrial and military applications. [38] The 700 is still operational at several British nuclear power stations in 2020 in control and data processing applications. [35] [39] It was also used as a production control platform for companies such as Kodak.

Argus 700G model MIPS ratings [40]
Model
(single processor)		Approximate
Million instructions per second
Argus 700 GDL0.7
Argus 700 GL0.8
Argus 700 GX2
Argus 700 GZ4

The Argus 700 could be configured in shared memory multi-processor configurations. [40] The Argus 700E was a low-end model. The Argus 700F used 500 ns cycle time MOS memory of up to 64k 16-bit words. The Argus 700G supported a virtual address space with up to 256k words of memory. The Argus 700S had the option of faster 150 ns bipolar memory with independent access for input-output processors. [41]

The Argus 700 also played an important historical role in the development of packet switching networks in the UK. These machines were used by Ferranti during early experiments at the General Post Office as the basis for early routers. [42] In this respect they are similar to the Interface Message Processors built in the US to serve a similar role during the development of the Internet. [43]

Over 70 Argus 700G processors were used in the control and instrumentation systems of the Torness nuclear power station, which had a far more sophisticated control system than earlier members of the advanced gas-cooled reactor fleet, including Digital Direct Control (DDC) of the reactors. When first installed it was probably the most sophisticated and complex computerised control system for a nuclear power station worldwide; the system was implemented using the CORAL high-level programming language. Each reactor in the dual reactor station had 10 input multiplexing computers, 11 control dual-processor computers, and a supervisory triple-processor computer with a standby backup. [40] [44]

M700

The M700 series of computers was based on the architecture and instruction set of the Ferranti Argus 700 computer series. Both M700 computers and Argus 700 computers have a common overall instruction set. However, particular models do not necessarily implement the complete instruction set. M700 included a range of computers which were all based on the same architectural features and instruction set ensuring a high level of compatibility and interchangeability in hardware and software terms. Within these limits there existed different implementations from more than one manufacturer to reflect specific commercial and application requirements. [45] [46]

Notes

Related Research Articles

<span class="mw-page-title-main">Data General Nova</span> 16-bit minicomputer series

The Data General Nova is a series of 16-bit minicomputers released by the American company Data General. The Nova family was very popular in the 1970s and ultimately sold tens of thousands of units.

In processor design, microcode serves as an intermediary layer situated between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer, also known as its machine code. It consists of a set of hardware-level instructions that implement the higher-level machine code instructions or control internal finite-state machine sequencing in many digital processing components. While microcode is utilized in general-purpose CPUs in contemporary desktops, it also functions as a fallback path for scenarios that the faster hardwired control unit is unable to manage.

<span class="mw-page-title-main">Minicomputer</span> Mid-1960s–late-1980s class of smaller computers

A minicomputer, or colloquially mini, is a type of smaller general-purpose computer developed in the mid-1960s and sold at a much lower price than mainframe and mid-size computers from IBM and its direct competitors. In a 1970 survey, The New York Times suggested a consensus definition of a minicomputer as a machine costing less than US$25,000, with an input-output device such as a teleprinter and at least four thousand words of memory, that is capable of running programs in a higher level language, such as Fortran or BASIC.

<span class="mw-page-title-main">PDP-11</span> Series of 16-bit minicomputers

The PDP–11 is a series of 16-bit minicomputers sold by Digital Equipment Corporation (DEC) from 1970 into the late 1990s, one of a set of products in the Programmed Data Processor (PDP) series. In total, around 600,000 PDP-11s of all models were sold, making it one of DEC's most successful product lines. The PDP-11 is considered by some experts to be the most popular minicomputer.

<span class="mw-page-title-main">IBM 701</span> Vacuum-tube computer system

The IBM 701 Electronic Data Processing Machine, known as the Defense Calculator while in development, was IBM’s first commercial scientific computer and its first series production mainframe computer, which was announced to the public on May 21, 1952. It was designed and developed by Jerrier Haddad and Nathaniel Rochester and was based on the IAS machine at Princeton.

<span class="mw-page-title-main">Bloodhound (missile)</span> Surface-to-air missile system

The Bristol Bloodhound is a British ramjet powered surface-to-air missile developed during the 1950s. It served as the UK's main air defence weapon into the 1990s and was in large-scale service with the Royal Air Force (RAF) and the forces of four other countries.

The TMS9900 was one of the first commercially available, single-chip 16-bit microprocessors. Introduced in June 1976, it implemented Texas Instruments' TI-990 minicomputer architecture in a single-chip format, and was initially used for low-end models of that lineup.

<span class="mw-page-title-main">CAP computer</span>

The Cambridge CAP computer was the first successful experimental computer that demonstrated the use of security capabilities, both in hardware and software. It was developed at the University of Cambridge Computer Laboratory in the 1970s. Unlike most research machines of the time, it was also a useful service machine.

<span class="mw-page-title-main">AMD Am2900</span>

Am2900 is a family of integrated circuits (ICs) created in 1975 by Advanced Micro Devices (AMD). They were constructed with bipolar devices, in a bit-slice topology, and were designed to be used as modular components each representing a different aspect of a computer control unit (CCU). By using the bit slicing technique, the Am2900 family was able to implement a CCU with data, addresses, and instructions to be any multiple of 4 bits by multiplying the number of ICs. One major problem with this modular technique was that it required a larger number of ICs to implement what could be done on a single CPU IC. The Am2901 chip included an arithmetic logic unit (ALU) and 16 4-bit processor register slices, and was the "core" of the series. It could count using 4 bits and implement binary operations as well as various bit-shifting operations. The Am2909 was a 4-bit-slice address sequencer that could generate 4-bit addresses on a single chip, and by using n of them, it was able to generate 4n-bit addresses. It had a stack that could store a microprogram counter up to 4 nest levels, as well as a stack pointer.

<span class="mw-page-title-main">History of general-purpose CPUs</span>

The history of general-purpose CPUs is a continuation of the earlier history of computing hardware.

In computer architecture, 12-bit integers, memory addresses, or other data units are those that are 12 bits wide. Also, 12-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on registers, address buses, or data buses of that size.

The Orion was a mid-range mainframe computer introduced by Ferranti in 1959 and installed for the first time in 1961. Ferranti positioned Orion to be their primary offering during the early 1960s, complementing their high-end Atlas and smaller systems like the Sirius and Argus. The Orion was based on a new type of logic circuit known as "Neuron" and included built-in multitasking support, one of the earliest commercial machines to do so.

<span class="mw-page-title-main">74181</span> First arithmetic logic unit (ALU) on a single chip

The 74181 is a 4-bit slice arithmetic logic unit (ALU), implemented as a 7400 series TTL integrated circuit. Introduced by Texas Instruments in February 1970, it was the first complete ALU on a single chip. It was used as the arithmetic/logic core in the CPUs of many historically significant minicomputers and other devices.

In computer architecture, 16-bit integers, memory addresses, or other data units are those that are 16 bits wide. Also, 16-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on registers, address buses, or data buses of that size. 16-bit microcomputers are microcomputers that use 16-bit microprocessors.

Ferranti's Sirius was a minicomputer released in 1961. Designed to be used in smaller offices without a dedicated programming staff, the Sirius used decimal arithmetic instead of binary, supported Autocode to ease programming, was designed to fit behind a standard office desk, and ran on UK standard mains electricity with no need for cooling. It was also fairly slow, with instruction speeds around 4,000 operations per second, and had limited main memory based on delay lines, but as Ferranti pointed out, its price/performance ratio was difficult to beat.

ICT 1900 was a family of mainframe computers released by International Computers and Tabulators (ICT) and later International Computers Limited (ICL) during the 1960s and 1970s. The 1900 series was notable for being one of the few non-American competitors to the IBM System/360, enjoying significant success in the European and British Commonwealth markets.

Blue Envoy was a British project to develop a ramjet-powered surface-to-air missile. It was tasked with countering supersonic bomber aircraft launching stand-off missiles, and thus had to have very long range and high-speed capabilities. The final design was expected to fly at Mach 3 with a maximum range of over 200 miles (320 km).

<span class="mw-page-title-main">Violet Friend</span> British anti-ballistic missile system

Violet Friend was the Ministry of Supply rainbow code for an anti-ballistic missile (ABM) system developed in the United Kingdom. The project began in 1954 with study contracts for an early warning radar system, which was followed by the February 1955 release of Air Staff Target 1135 (AST.1135) calling for a system to counter intermediate range ballistic missiles (IRBMs) being fired at the UK from eastern Europe. AST.1135 required the system to be able to attack six targets at once and be ready for initial deployment in 1963.

The Ferranti F100-L was a 16-bit microprocessor family announced by Ferranti in 1976 which entered production in 1977. It was the first microprocessor designed in Europe, and among the first 16-bit single-chip CPUs. It was designed with military use in mind, able to work in a very wide temperature range and radiation hardened. To deliver these capabilities, the F100 was implemented using bipolar junction transistors, as opposed to the metal oxide semiconductor (MOS) process used by most other processors of the era. The family included a variety of support chips including a multiply/divide unit, various memory support chips, timers and serial bus controllers.

<span class="mw-page-title-main">Raytheon 704</span> Minicomputer

The Raytheon 704 is a 16-bit minicomputer introduced by Raytheon in 1970. The basic machine contained 4 kwords (8 kB) of memory and a simple arithmetic logic unit (ALU) running at 1 MHz. It was normally operated with a Teletype Model 33 acting as a computer terminal. It sold for "less than $10,000".

References

Citations

  1. ↑ "Delivery List for the Ferranti Poseidon, Hermes, Apollo and Argus computers" (PDF). Computer Conservation Society. October 2011. CCS-F6X1. Retrieved 28 November 2020.
  2. ↑ Aylen 2012, p. 7.
  3. ↑ Aylen 2012, p. 8.
  4. 1 2 Aylen 2012, p. 9.
  5. ↑ Aylen 2012, p. 12.
  6. 1 2 Aylen 2012, p. 10.
  7. ↑ Aylen 2012, p. 11.
  8. 1 2 "A SURVEY OF NEW WEST-EUROPEAN DIGITAL COMPUTERS (Part 3 - Conclusion): ARGUS" (PDF). Computers and Automation. XII (1): 38–39. Nov 1963. Retrieved 2020-09-05.
  9. ↑ The Engineer. Vol. 214. Morgan-Grampian (Publishers). 1962. p. 559.
  10. ↑ Industrial Electronics. First part: add word argus to search phrase. Iliffe Electrical Publications. 1966. p. 445.{{cite book}}: CS1 maint: others (link)
  11. ↑ "COMPUTERS AND CENTERS, OVERSEAS: 1. Ferranti, Ltd., Argus, London, England". Digital Computer Newsletter. 13 (3): 14–16. Jul 1961. Archived from the original on June 2, 2018.
  12. ↑ "COMPUTERS AND CENTERS, OVERSEAS: 3. Ferranti, Ltd., Process Control Computer, London, England". Digital Computer Newsletter. 11 (2). Digital_Computer_Newsletter_V11N02_Apr59.pdf: 10–12. Apr 1959.{{cite journal}}: CS1 maint: others (link)
  13. ↑ Aylen 2012, pp. 14–15.
  14. ↑ Aylen 2012, p. 16.
  15. ↑ Aylen 2012, p. 17.
  16. 1 2 3 "Ferranti Apollo, Posiedon and Argus: 1961 onwards - Delivery list". Computer Conservation Society. October 2011. Retrieved 2018-04-27.
  17. ↑ "Process-control computers make a hit with chemical manufacturers", New Scientist, 15 October 1964, p. 165
  18. ↑ "Process Control: Concepts Dynamics And Applications", PHI Learning, 2010, p. 490
  19. ↑ "Ferranti Argus Computer for Belgian Power Station will Monitor Boiler and Turbo-generator Set". Journal of Electronics and Control. 14 (3): 345. 1963. doi:10.1080/00207216308937499.
  20. ↑ "Ferranti Argus: Process-Control Computer System", Ferranti, 1961
  21. ↑ Aylen 2012, p. 20.
  22. ↑ Aylen 2012, pp. 20–21.
  23. 1 2 Aylen 2012, p. 23.
  24. ↑ Aylen 2012, p. 21.
  25. ↑ Aylen 2012, p. 22.
  26. 1 2 "Ferranti Announce Mini-Argus". The Computer Bulletin. 14 (2). London: British Computer Society: 55. February 1970.
  27. ↑ Aylen 2012, p. 14.
  28. ↑ Dummer, G. W. A.; Thomson, F. P.; Robertson, J. Mackenzie (2014). Banking Automation: Data Processing Systems and Associated Equipment. Elsevier. pp. 390–393. ISBN   9781483160238.
  29. ↑ Stuart, Sam (2014). British Commercial Computer Digest: Pergamon Computer Data Series. Elsevier. pp. 3/19–3/20. ISBN   9781483148588.
  30. ↑ "across the editor's desk: FERRANTI MICRONOR II". Computers and Automation. 15 (3): 38. Mar 1966.
  31. ↑ "FCL History & Minicomputers". Computer Conservation Society. Ferranti Ltd. and minicomputers - technical information. March 2016. Retrieved 2018-04-26.{{cite web}}: CS1 maint: others (link)
  32. ↑ Weight of central unit 7 kg and power unit 6 kg
    • "Maszyna cyfrowa ARGUS 400" [ARGUS 400 digital machine]. Maszyny Matematyczne (in Polish) (4). Article source: Electronic Design 5/1966. Wydawnictwa Czasopism Technicznych NOT: 37. 1966.{{cite journal}}: CS1 maint: others (link)
  33. ↑ Gorman, B (June 1978). The Coral 66 Compiler for Ferranti ARGUS 500 Computer (Report). Royal Signals and Radar Establishment. Technical Note 799. Archived from the original on March 17, 2021. Retrieved 17 January 2018.
  34. ↑ "One of the worlds largest nuclear power stations, Dungeness B, will be supervised by Ferranti ARGUS 500 computers. By L.H.Fielder". National Archives. 1996.10/6/12/28/76. Retrieved 30 November 2020.
  35. 1 2 Clarke, R. (1996). "C and I refits on AGR's" (PDF). Modernization of instrumentation and control systems in nuclear power plants (PDF). Nuclear Electric (Report). IAEA. p. 61. IAEA-IWG-NPPCI-96/3. Retrieved 2 December 2020.
  36. ↑ The MKII Radio Telescope
  37. ↑ Clare Smyth, "Flourishing jungle of minicomputers", New Scientist, 6 June 1974, p. 602
  38. ↑ "Ferranti Argus 700". The Centre for Computing History. Retrieved 28 November 2020.
  39. ↑ "Software Support Engineer (job)". Wizbii. Archived from the original on 30 November 2020. Thales have secured a 10 year Long Term Support (LTS) contract to provide on going support to a number of Data Processing and Control Systems (DPCS) to ensure continued operation through to the end of life of the associated power generation facilities. ... Familiarity with Argus 700 systems, including Inline code, OSC245, FNET Argus 700 Hardware Knowledge and Terminal User Facilities. Nuclear Power Generation knowledge and experience
  40. 1 2 3 W.J.Hill, N.M.Mitson (8 May 1990). Building of the Auto Control Software for Torness NPS (PDF) (Report). The Institution of Nuclear Engineers. p. 25. Retrieved 8 October 2016.
  41. ↑ "Ferranti expands Argus range". Electronics & Power. IEEE: 194. March 1977. doi:10.1049/ep.1977.0094 . Retrieved 29 November 2020.
  42. ↑ "Some Design Aspects of a Public Packet Switched Network" Archived 2013-10-20 at the Wayback Machine , Second International Conference on Computer Communication, Stockholm, August 1974, pp. 199-213
  43. ↑ "A Technical History of the ARPANET - A Technical Tour" Archived 2012-09-10 at the Wayback Machine , THINK Protocols team, Accessed 19 October 2012.
  44. ↑ Computerization of Operation and Maintenance for Nuclear Power Plants (PDF) (Report). IAEA. July 1995. pp. 159–168. ISSN   1011-4289. IAEA-TECDOC-808. Retrieved 8 October 2016.
  45. ↑ Defence Standard 00-21 (Part 1)/Issue 2 - M700 Computers Part 1: Basic Specification (PDF) (Report). UK Ministry of Defence. 9 December 1983. Retrieved 28 November 2020.
  46. ↑ Defence Standard 00-21 (Part 2)/Issue 2 - M700 Computers Part 2: Class 1 (PDF). DStan: UK Defence Standardization (Report). UK Ministry of Defence. 9 Dec 1983. Archived from the original (PDF) on 13 May 2005.

Bibliography

This page is based on this Wikipedia article
Text is available under the CC BY-SA 4.0 license; additional terms may apply.
Images, videos and audio are available under their respective licenses.