IBM System/360 Model 44

Last updated
IBM System/360 Model 44
IBM Logo 1956 1972.svg
IBM 360-44.5.jpg
System/360 Model 44 front panel
ManufacturerInternational Business Machines Corporation (IBM)
Product family System/360
Release dateAugust 16, 1965 (1965-08-16)
DiscontinuedSeptember 23, 1973 (1973-09-23)
Memory32–256 KB Core

The IBM System/360 Model 44 is a specialized member of the IBM System/360 family, with a variant of the System/360 computer architecture, designed for scientific computing, real-time computing, process control and numerical control (NC). [note 1]

Contents

The Model 44 was announced August 16, 1965 and withdrawn September 24, 1973. [1]

Architecture

The base Model 44 lacks the storage-to-storage character and decimal instruction sets of a standard System/360, [2] however an "extended instruction set" feature was available to provide the missing instructions. [1] The machine features four unique instructions: Change Priority Mask (CHPM), Load PSW Special (LPSX), Read Direct Word (RDDW), and Write Direct Word (WRDW). [2] :p.73

The system comes with four memory sizes: E (32 KiB), F (64 KiB), G (128 KiB), and H (256 KiB), with an access time of 1 μs, which puts it closer to the Model 65 (.75 μs) than the Model 50 (2.0 μs). [3] :pp.6-11,6–12 [1] Storage protection is an optional feature. [4] :p.9

General purpose registers are normally located in a non-addressable portion of 1 μs core storage termed "bump storage". For added speed, the general purpose registers can be implemented in Solid Logic Technology (SLT) circuitry with an access time of .25 μs. [4] :p.8

A unique feature of the Model 44 is "variable-length precision floating point arithmetic". It has the same short floating-point instructions and long floating-point instructions as the other models in the System/360 line, but it also has a rotary switch on the front panel which can be used to set the precision of long floating-point numbers. The mantissa portion of long floating-point numbers can be chosen as 32, 40, 48, or 56 bits, with 56 bits being the standard value. Whatever the setting, long floating-point numbers still occupy 64 bits in memory (the first eight bits are the sign and the exponent); the setting only leads, when it was less than 56 bits, to long floating-point operations ignoring some of the least significant bits of these numbers. This provides an improvement in speed when greater precision is not needed. [4] :p.13

An optional feature provides six external interrupt lines. [4] :p.9

The direct word feature allows the transfer of a full 32-bit word of information between an external device and main storage. This differs from the standard System/360 direct control feature which transfers a single byte. The Write Direct Word instruction places the contents of a word in memory as static signals on the 32 direct-out lines and uses the I2 field of the instruction as up to eight timing pulses. The Read Direct Word reads the 32 direct-in lines into memory and sends the I2 field as timing pulses. [5] :p.5

Write Direct Word ('B4'x): WRDW D1(B1),I2

Read Direct Word  ('B5'x): RDDW D1(B1),I2

The direct data channel feature provides a fast, simple data transfer capability. Controlled by standard System/360 I/O instructions and commands, it allows the connection of external devices that perform word-by-word data transfers with the Model 44 CPU at transfer rates up to 4 MiB/s. [5] :pp.12–16

The priority interrupt feature adds thirty-two interrupt levels to the standard five. This uses locations '800'x to '9FF'x for the old and new program status word locations. An eight bit interrupt description from the interrupting device is stored in bit positions 24 to 31 of the corresponding old PSW. Bits 16-23 of the new PSW are used as a mask which is XORed with the interrupt description to modify the address from the new PSW, effectively allowing indexing into a jump table for the interrupt according to data sent by the device. The interrupts are numbered from 0 (highest priority) to 31 (lowest); a higher priority interrupt can interrupt processing of a lower priority. A 32 bit Priority Mask Register, set by the Change Priority Mask instruction, can be used to selectively mask interrupts to keep them in pending status until the mask is reset. The instruction can enable levels tagged by 1 bits, disable levels tagged by 0 bits cancel levels tagged by 1 bits, or cancel and enable levels tagged by 1 bits depending on the value of the I2 field. The Load PSW Special instruction is used to exit an interrupt routine resume the next highest priority routine or non-interrupt code. [5] :pp.17–21

Load PSW Special ('B2'x): LPSX D1(B1),I2
I2 is reserved and should be zero.

Change Priority Mask ('B3'x): CHPM D1(B1),I2
The high order two bits of the I2 field are called the mask bit and the cancel bit.
The remainder of the I2 field is reserved and should be zero.

 (mask bit) (cancel bit) Function     1            0       Enable levels tagged by 1 bits     0            0       Disable levels tagged by 0 bits     0            1       Cancel levels tagged by 1 bits     1            1       Cancel and enable levels tagged by 1 bits 

Peripherals

The Model 44 can support up to one standard and two high-speed System/360 multiplexer channels in addition to integrated adapters for the single disk storage and the console 1052 printer/keyboard. [1]

IBM 2315 disk cartridge IBM 2315 disk cartridge.agr.jpg
IBM 2315 disk cartridge
2315 compatible cartridge, top view Disk Cartridge 2315 type.jb.jpg
2315 compatible cartridge, top view

A unique feature of the Model 44 is its integrated single disk storage drive which uses the IBM 2315 cartridge and provides 1,171,200 bytes [4] :pp.5,11 of removable disk storage built right into the CPU. A second integrated drive is available as an option. [4] :p.12 The Model 44 Programming System (M44PS) uses this drive as a systems residence device. [6] :p.7

Software

The Model 44 Programming System software includes a supervisor, utility programs, assembler, FORTRAN IV compiler, and a library of scientific subroutines. [1]

Notes

  1. An example of using a 360/44 for numerical control (NC) can be found at http://www.gao.gov/assets/400/393980.pdf.

Related Research Articles

Data General Nova 16-bit minicomputer series

The Data General Nova is a series of 16-bit minicomputers released by the American company Data General. The Nova family was very popular in the 1970s and ultimately sold tens of thousands of units.

Interrupt

In digital computers, an interrupt is a response by the processor to an event that needs attention from the software. An interrupt condition alerts the processor and serves as a request for the processor to interrupt the currently executing code when permitted, so that the event can be processed in a timely manner. If the request is accepted, the processor responds by suspending its current activities, saving its state, and executing a function called an interrupt handler to deal with the event. This interruption is temporary, and, unless the interrupt indicates a fatal error, the processor resumes normal activities after the interrupt handler finishes.

IBM System/360 IBM mainframe computer family (1964–1978)

The IBM System/360 (S/360) is a family of mainframe computer systems that was announced by IBM on April 7, 1964, and delivered between 1965 and 1978. It was the first family of computers designed to cover the complete range of applications, from small to large, both commercial and scientific. The design made a clear distinction between architecture and implementation, allowing IBM to release a suite of compatible designs at different prices. All but the only partially compatible Model 44 and the most expensive systems use microcode to implement the instruction set, which features 8-bit byte addressing and binary, decimal and hexadecimal floating-point calculations.

The Honeywell 6000 series computers were rebadged versions of General Electric's 600-series mainframes manufactured by Honeywell International, Inc. from 1970 to 1989. Honeywell acquired the line when it purchased GE's computer division in 1970 and continued to develop them under a variety of names for many years.

IBM System/370 Family of mainframe computers 1970-1990

The IBM System/370 (S/370) is a model range of IBM mainframe computers announced on June 30, 1970 as the successors to the System/360 family. The series mostly maintains backward compatibility with the S/360, allowing an easy migration path for customers; this, plus improved performance, were the dominant themes of the product announcement. In September 1990, the System/370 line was replaced with the System/390.

IBM 1620 IBM scientific computer released in 1959

The IBM 1620 was announced by IBM on October 21, 1959, and marketed as an inexpensive "scientific computer". After a total production of about two thousand machines, it was withdrawn on November 19, 1970. Modified versions of the 1620 were used as the CPU of the IBM 1710 and IBM 1720 Industrial Process Control Systems.

IBM 7090 Second generation (c. 1959) scientific mainframe

The IBM 7090 is a second-generation transistorized version of the earlier IBM 709 vacuum tube mainframe computer that was designed for "large-scale scientific and technological applications". The 7090 is the fourth member of the IBM 700/7000 series scientific computers. The first 7090 installation was in December 1959. In 1960, a typical system sold for $2.9 million or could be rented for $63,500 a month.

IBM 700/7000 series Mainframe computer systems made by IBM through the 1950s and early 1960s

The IBM 700/7000 series is a series of large-scale (mainframe) computer systems that were made by IBM through the 1950s and early 1960s. The series includes several different, incompatible processor architectures. The 700s use vacuum-tube logic and were made obsolete by the introduction of the transistorized 7000s. The 7000s, in turn, were eventually replaced with System/360, which was announced in 1964. However the 360/65, the first 360 powerful enough to replace 7000s, did not become available until November 1965. Early problems with OS/360 and the high cost of converting software kept many 7000s in service for years afterward.

IBM 1130 16-bit IBM minicomputer introduced in 1965

The IBM 1130 Computing System, introduced in 1965, was IBM's least expensive computer at that time. A binary 16-bit machine, it was marketed to price-sensitive, computing-intensive technical markets, like education and engineering, succeeding the decimal IBM 1620 in that market segment. Typical installations included a 1 megabyte disk drive that stored the operating system, compilers and object programs, with program source generated and maintained on punched cards. Fortran was the most common programming language used, but several others, including APL, were available.

In computing, channel I/O is a high-performance input/output (I/O) architecture that is implemented in various forms on a number of computer architectures, especially on mainframe computers. In the past, channels were generally implemented with custom devices, variously named channel, I/O processor, I/O controller, I/O synchronizer, or DMA controller.

The program status word (PSW) is a register that performs the function of a status register and program counter, and sometimes more. The term is also applied to a copy of the PSW in storage. This article only discusses the PSW in the IBM System/360 and its successors, and follows the IBM convention of numbering bits starting with 0 as the leftmost bit.

Basic Assembly Language (BAL) is the commonly used term for a low-level programming language used on IBM System/360 and successor mainframes. Originally, "Basic Assembly Language" applied only to an extremely restricted dialect designed to run under control of IBM Basic Programming Support (BPS/360) on systems with only 8 KB of main memory, and only a card reader, a card punch, and a printer for input/output — thus the word "Basic". However, the full name and the initialism "BAL" almost immediately attached themselves in popular use to all assembly-language dialects on the System/360 and its descendants. BAL for BPS/360 was introduced with the System/360 in 1964.

IBM System/360 Model 67 1967 IBM mainframe model with virtual memory and 32-bit addressing

The IBM System/360 Model 67 (S/360-67) was an important IBM mainframe model in the late 1960s. Unlike the rest of the S/360 series, it included features to facilitate time-sharing applications, notably a Dynamic Address Translation unit, the "DAT box", to support virtual memory, 32-bit addressing and the 2846 Channel Controller to allow sharing channels between processors. The S/360-67 was otherwise compatible with the rest of the S/360 series.

IBM 8000

The IBM 8000 series was a proposed transistor-based successor to the IBM 7000 series. Important engineers on the project included Fred Brooks and Gerry Blaauw. The project plan for the 8000 series was presented by Fred Brooks in January, 1961. Despite some technical successes, the project became a political football, amid IBM's search for a unified product line. The project was canceled in 1961 by Bob Evans, supplanted by the successful System/360 series.

IBM System/7

The IBM System/7 was a computer system designed for industrial control, announced on October 28, 1970 and first shipped in 1971. It was a 16-bit machine and one of the first made by IBM to use novel semiconductor memory, instead of magnetic core memory conventional at that date.

The PDP-11 architecture is a CISC instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC). It is implemented by central processing units (CPUs) and microprocessors used in PDP-11 minicomputers. It was in wide use during the 1970s, but was eventually overshadowed by the more powerful VAX-11 architecture in the 1980s.

The IBM System/360 architecture is the model independent architecture for the entire S/360 line of mainframe computers, including but not limited to the instruction set architecture. The elements of the architecture are documented in the IBM System/360 Principles of Operation and the IBM System/360 I/O Interface Channel to Control Unit Original Equipment Manufacturers' Information manuals.

ICT 1900 was a family of mainframe computers released by International Computers and Tabulators (ICT) and later International Computers Limited (ICL) during the 1960s and 1970s. The 1900 series was notable for being one of the few non-American competitors to the IBM System/360, enjoying significant success in the European and British Commonwealth markets.

IBM System/360 Model 20 Low-end IBM computer model from 1960s

The IBM System/360 Model 20 is the smallest member of the IBM System/360 family announced in November 1964. The Model 20 supports only a subset of the System/360 instruction set, with binary numbers limited to 16 bits and no floating point. In later years it would have been classified as a 16-bit minicomputer rather than a mainframe, but the term "minicomputer" was not current, and in any case IBM wanted to emphasize the compatibility of the Model 20 rather than its differences from the rest of the System/360 line. It does, however, have the full System/360 decimal instruction set, that allows for addition, subtraction, product, and dividend of up to 31 decimal digits.

SDS 9 Series

The SDS 9 Series computers are a backward compatible line of transistorized computers produced by Scientific Data Systems in the 1960s and 1970s. This line includes the SDS 910, SDS 920, SDS 925, SDS 930, SDS 940, and the SDS 945. The SDS 9300 is an extension of the 9xx architecture. The 1965 SDS 92 is an incompatible 12-bit system built using monolithic integrated circuits.

References

  1. 1 2 3 4 5 IBM Corporation. "IBM Archives: System/360 Model 44" . Retrieved October 18, 2012.
  2. 1 2 IBM Corporation (1966). IBM System/360 Model 44 Programming System Assembler Language (PDF).
  3. IBM Corporation (1974). IBM System/360 System Summary (PDF).
  4. 1 2 3 4 5 6 IBM Corporation. IBM System/360 Model 44 Functional Characteristics (PDF).
  5. 1 2 3 IBM Corporation. Data Acquisition Special Features for the IBM System/360 Model 44 (PDF).
  6. IBM Corporation (1966). IBM System/360 Model 44 Programming System Concepts and Facilities (PDF).