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The Oberon System is a modular, single-user, single-process, multitasking operating system written in the programming language Oberon. It was originally developed in the late 1980s at ETH Zurich. The Oberon System has an unconventional visual text user interface (TUI) instead of a conventional command-line interface (CLI) or graphical user interface (GUI). This TUI was very innovative in its time and influenced the design of the Acme text editor for the Plan 9 from Bell Labs operating system.
Stephen Byram Furber is a British computer scientist, mathematician and hardware engineer, and Emeritus ICL Professor of Computer Engineering in the Department of Computer Science at the University of Manchester, UK. After completing his education at the University of Cambridge, he spent the 1980s at Acorn Computers, where he was a principal designer of the BBC Micro and the ARM 32-bit RISC microprocessor. As of 2023, over 250 billion ARM chips have been manufactured, powering much of the world's mobile computing and embedded systems, everything from sensors to smartphones to servers.
Placement is an essential step in electronic design automation — the portion of the physical design flow that assigns exact locations for various circuit components within the chip's core area. An inferior placement assignment will not only affect the chip's performance but might also make it non-manufacturable by producing excessive wire-length, which is beyond available routing resources. Consequently, a placer must perform the assignment while optimizing a number of objectives to ensure that a circuit meets its performance demands. Together, the placement and routing steps of IC design are known as place and route.
A network on a chip or network-on-chip is a network-based communications subsystem on an integrated circuit ("microchip"), most typically between modules in a system on a chip (SoC). The modules on the IC are typically semiconductor IP cores schematizing various functions of the computer system, and are designed to be modular in the sense of network science. The network on chip is a router-based packet switching network between SoC modules.
Giovanni De Micheli is a research scientist in electronics and computer science. He is credited for the invention of the Network on a Chip design automation paradigm and for the creation of algorithms and design tools for Electronic Design Automation (EDA). He is Professor and Director of the Integrated Systems laboratory at École Polytechnique Fédérale de Lausanne (EPFL), Switzerland. Previously, he was Professor of Electrical Engineering at Stanford University. He was Director of the Electrical Engineering Institute at EPFL from 2008 to 2019 and program leader of the Swiss Federal Nano-Tera.ch program. He holds a Nuclear Engineer degree, a M.S. and a Ph.D. degree in Electrical Engineering and Computer Science under Alberto Sangiovanni-Vincentelli.
High-level synthesis (HLS), sometimes referred to as C synthesis, electronic system-level (ESL) synthesis, algorithmic synthesis, or behavioral synthesis, is an automated design process that takes an abstract behavioral specification of a digital system and finds a register-transfer level structure that realizes the given behavior.
Massoud Pedram is an Iranian American computer engineer noted for his research in green computing, energy storage systems, low-power electronics and design, electronic design automation and quantum computing. In the early 1990s, Pedram pioneered an approach to designing VLSI circuits that considered physical effects during logic synthesis. He named this approach layout-driven logic synthesis, which was subsequently called physical synthesis and incorporated into the standard EDA design flows. Pedram's early work on this subject became a significant prior art reference in a litigation between Synopsys Inc. and Magma Design Automation.
Saraju Mohanty is an Indian-American professor of the Department of Computer Science and Engineering, and the director of the Smart Electronic Systems Laboratory, at the University of North Texas in Denton, Texas. Mohanty received a Glorious India Award – Rich and Famous NRIs of America in 2017 for his contributions to the discipline. Mohanty is a researcher in the areas of "smart electronics for smart cities/villages", "smart healthcare", "application-Specific things for efficient edge computing", and "methodologies for digital and mixed-signal hardware". He has made significant research contributions to security by design (SbD) for electronic systems, hardware-assisted security (HAS) and protection, high-level synthesis of digital signal processing (DSP) hardware, and mixed-signal integrated circuit computer-aided design and electronic design automation. Mohanty has been the editor-in-chief (EiC) of the IEEE Consumer Electronics Magazine during 2016-2021. He has held the Chair of the IEEE Computer Society's Technical Committee on Very Large Scale Integration during 2014-2018. He holds 4 US patents in the areas of his research, and has published 500 research articles and 5 books. He is ranked among top 2% faculty around the world in Computer Science and Engineering discipline as per the standardized citation metric adopted by the Public Library of Science Biology journal.
Bashir Mohammed Ali Al-Hashimi, CBE, FRS, FREng, FIEEE, FIET, FBCS is an Iraqui computer engineering researcher, academic, and higher education leader. He is Vice President and ARM Professor of Computer Engineering at King's College London in the United Kingdom. He was the co-founder and co-director of the ARM-ECS Research Centre, an industry-university collaboration partnership involving the University of Southampton and ARM. He is actively involved in promoting science and engineering for young people and regularly contributes to engineering higher education and skills national debates. He is the chair of the Engineers 2030 working group, a national campaign overseen by the National Engineering Policy Centre and led by the UK Royal Academy of Engineering. The campaign centres around accelerating change and the future workforce of engineering.
Rajiv V. Joshi is an Indian-American prolific inventor and research staff member at IBM's Thomas J. Watson Research Center. His work focuses on the development of integrated circuits and memory chips. He is an IEEE Fellow and received the Industrial Pioneer Award from the IEEE Circuits and Systems Society in 2013 and the IEEE Daniel E. Noble Award in 2018. He holds 271 U.S. patents.
Bus encoding refers to converting/encoding a piece of data to another form before launching on the bus. While bus encoding can be used to serve various purposes like reducing the number of pins, compressing the data to be transmitted, reducing cross-talk between bit lines, etc., it is one of the popular techniques used in system design to reduce dynamic power consumed by the system bus. Bus encoding aims to reduce the Hamming distance between 2 consecutive values on the bus. Since the activity is directly proportional to the Hamming distance, bus encoding proves to be effective in reducing the overall activity factor thereby reducing the dynamic power consumption in the system.
Finite state machines (FSMs) are widely used to implement control logic in various applications such as microprocessors, digital transmission, digital filters and digital signal processing. Even for designs containing a good number of datapath elements, the controller occupies a sizeable portion. As the devices are mostly portable and hand-held, reducing power dissipation has emerged as the primary concern of today's VLSI designers. While the datapath elements can be shut down when they are not being used, controllers are always active. As a result, the controller consumes a good amount of system power. Thus, power-efficient synthesis of FSM has come up as a very important problem domain, attracting a lot of research. The synthesis method must be able to reduce both dynamic power and leakage power consumed by the circuit.
Bradley James Nelson is an American roboticist and entrepreneur. He has been the Professor of Robotics and Intelligent Systems at ETH Zurich since 2002 and is known for his research in microrobotics, nanorobotics, and medical robotics.
ESP32 is a series of low-cost, low-power system on a chip microcontrollers with integrated Wi-Fi and dual-mode Bluetooth. The ESP32 series employs either a Tensilica Xtensa LX6 microprocessor in both dual-core and single-core variations, Xtensa LX7 dual-core microprocessor or a single-core RISC-V microprocessor and includes built-in antenna switches, RF balun, power amplifier, low-noise receive amplifier, filters, and power-management modules. ESP32 is created and developed by Espressif Systems, a Chinese company based in Shanghai, and is manufactured by TSMC using their 40 nm process. It is a successor to the ESP8266 microcontroller.
Rajesh K. Gupta is a computer scientist and engineer, currently the Qualcomm Professor in Embedded Microsystems at University of California, San Diego. His research concerns design and optimization of cyber-physical systems (CPS). He is a Principal Investigator in the NSF MetroInsight project and serves as Associate Director of the Qualcomm Institute. His research contributions include SystemC and SPARK Parallelizing High-level Synthesis. Earlier he led NSF Expeditions on Variability in Microelectronic circuits.
lowRISC C.I.C. is a not-for-profit company headquartered in Cambridge, UK. It uses collaborative engineering to develop and maintain open source silicon designs and tools. lowRISC is active in RISC-V-related open source hardware and software development and stewards the OpenTitan project.
David Atienza Alonso is a Spanish/Swiss scientist in the disciplines of computer and electrical engineering. His research focuses on hardware‐software co‐design and management for energy‐efficient and thermal-aware computing systems, always starting from a system‐level perspective to the actual electronic design. He is a full professor of electrical and computer engineering at the Swiss Federal Institute of Technology in Lausanne (EPFL) and the head of the Embedded Systems Laboratory (ESL). He is an IEEE Fellow (2016), and an ACM Fellow (2022).
Chisel is an open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level.
Carlotta Guiducci is an Italian bio-engineer. Her research is invested in bio-molecular analysis based on lab-on-a-chip devices. She is an Associate Professor at EPFL and head of the Laboratory of Life Sciences Electronics located at EPFL's Lausanne campus.
Luca P. Carloni is a professor and chair of the Department of Computer Science at Columbia University in the City of New York.. He has been on the faculty at Columbia since 2004. He is an international expert on electronic computer-aided design.
References
- ↑ Switzerl, Address ETH Zürich Dep of Inform Technol Electrical Eng Prof Dr Luca Benini Institut für Integrierte Systeme ETZ J. 84 Gloriastrasse 35 8092 Zürich. "Benini, Luca, Prof. Dr. | ETH Zurich". ETH Zurich . Retrieved 7 March 2022.
{{cite web}}: CS1 maint: numeric names: authors list (link) - ↑ Comment, Sebastian Moss. "E4, Università di Bologna, and CINECA deploy RISC-V HPC system, with open source software". www.datacenterdynamics.com. Retrieved 7 March 2022.
- ↑ "New Computing Architectures Needed to Achieve European Green Deal". EE Times Asia . 22 January 2020. Retrieved 7 March 2022.
- 1 2 "Luca Benini on LinkedIn". LinkedIn . 7 March 2022. Retrieved 7 March 2022.
- ↑ "Automatic synthesis of sequential circuits for low power dissipation". ProQuest. Retrieved 2 May 2022.
- ↑ "Academy of Europe: Benini Luca". www.ae-info.org. Retrieved 14 March 2022.
- ↑ "Luca Benini - Home". ACM Digital Library. doi:10.1145/contrib-81100043886 (inactive 31 January 2024).
{{cite web}}: CS1 maint: DOI inactive as of January 2024 (link) - 1 2 "Luca Benini: H-index & Awards - Academic Profile". Research.com. Retrieved 7 March 2022.
- ↑ "Luca Benini on IEEEXplore". ieeexplore.ieee.org. 7 March 2022. Retrieved 7 March 2022.
- ↑ "Luca Benini". HiPEAC. Retrieved 14 March 2022.
- ↑ Nene, Vidi (30 May 2019). "A Deep Learning Autonomous Nano-Drone". dronebelow.com. Retrieved 7 March 2022.
- ↑ "About lowRISC · lowRISC: Collaborative open silicon engineering". lowrisc.org. Retrieved 14 March 2022.
- ↑ "Google invests in Cambridge open source venture | Business Weekly | Technology News | Business news | Cambridge and the East of England". Business Weekly. Retrieved 7 March 2022.
