MIX (abstract machine)

Last updated
MIX
Designer Donald Knuth
Bits 31-bit
Introduced1968
Design accumulator machine
Typehypothetical
Encoding Fixed
Branching Condition code and register test
Endianness Big
OpenYes, and royalty free
Registers
9 in total

MIX is a hypothetical computer used in Donald Knuth's monograph, The Art of Computer Programming (TAOCP). MIX's model number is 1009, which was derived by combining the model numbers and names of several contemporaneous, commercial machines deemed significant by the author. Also, "MIX" read as a Roman numeral is 1009.

Contents

The 1960s-era MIX has since been superseded by a new (also hypothetical) computer architecture, MMIX, to be incorporated in forthcoming editions of TAOCP.

Software implementations for both the MIX and MMIX architectures have been developed by Knuth and made freely available (named "MIXware" and "MMIXware", respectively). Several derivatives of Knuth's MIX/MMIX emulators also exist. GNU MDK is one such software package; it is free and runs on a wide variety of platforms.

Their purpose for education is quite similar to John L. Hennessy's and David A. Patterson's DLX architecture, from Computer Organization and Design - The Hardware Software Interface.

Architecture

MIX is a hybrid binary decimal computer. When programmed in binary, each byte has 6 bits (values range from 0 to 63). In decimal, each byte has 2 decimal digits (values range from 0 to 99). The two interpretions of a MIX byte (binary vs. decimal) represent different machine types and are not intended to be directly interchangeable:

"MIX has a peculiar property in that it is both binary and decimal at the same time. MIX programmers don't actually know whether they are programming a machine with base 2 or base 10 arithmetic. Therefore algorithms written in MIX can be used on either type of machine with little change, and MIX can be simulated easily on either type of machine. Programmers who are accustomed to a binary machine can think of MIX as binary; those accustomed to decimal may regard MIX as decimal. Programmers from another planet might choose to think of MIX as a ternary computer." [1]

Bytes are grouped into words of five bytes plus a sign. Most programs written for MIX will work in either binary or decimal, so long as they do not try to store a value greater than 63 in a single byte when interpreted a binary, and 99 when interpreted as decimal.

A word has the range 1,073,741,823 to 1,073,741,823 (inclusive) in binary mode, and 9,999,999,999 to 9,999,999,999 (inclusive) in decimal mode. The sign-and-magnitude representation of integers in the MIX architecture distinguishes between “0” and “+0.” This contrasts with modern computers, whose two's-complement representation of integer quantities includes a single representation for zero, but whose range for a given number of bits includes one more negative integer than the number of representable positive integers.

MIX registers
30292827262524232221201918171615141312111009080706050403020100(bit position)
Registers
±A1A2A3A4A5rA, Accumulator
±X1X2X3X4X5rX, Extension
Index registers
 ±I1.4I1.5rI1, Index 1
 ±I2.4I2.5rI2, Index 2
 ±I3.4I3.5rI3, Index 3
 ±I4.4I4.5rI4, Index 4
 ±I5.4I5.5rI5, Index 5
 ±I6.4I6.5rI6, Index 6
Program counter
 J4J5rJ, Jump
Condition code flags
 OOverflow flag
 <=>Comparison flag

Registers

There are 9 registers in MIX:

A byte is assumed to be at least 6 bits. Most instructions can specify which of the "fields" (bytes) of a register are to be altered, using a suffix of the form (first:last). The zeroth field is the one-bit sign.

MIX also records whether the previous operation overflowed, and has a one-trit comparison indicator (less than, equal to, or greater than).

Memory and input/output

The MIX machine has 4000 words of memory (each with 5 bytes and a sign), addressed from 0 to 3999. A variety of input and output devices are also included:

Instructions

Each machine instruction in memory occupies one word, and consists of 4 parts: the address (2 bytes and the sign of the word) in memory to read or write; an index specification (1 byte, describing which rI index register to use) to add to the address; a modification (1 byte) that specifies which parts of the register or memory location will be read or altered; and the operation code (1 byte). All operation codes have an associated mnemonic.

30292827262524232221201918171615141312111009080706050403020100
±AddressIndexModificationOperation

MIX programs frequently use self-modifying code, in particular to return from a subroutine, as MIX lacks an automatic subroutine return stack. Self-modifying code is facilitated by the modification byte, allowing the program to store data to, for example, the address part of the target instruction, leaving the rest of the instruction unmodified.

MIX programs are typically constructed using the MIXAL assembly language; for an example, see the list hello world programs page.

LDAADDR,i(0:5)rA:=memory[ADDR+rIi];
LDXADDR,i(0:5)rX:=memory[ADDR+rIi];
LD? ADDR,i(0:5)rI? := memory[ADDR + rIi];
LDANADDR,i(0:5)rA:=-memory[ADDR+rIi];
LDXNADDR,i(0:5)rX:=-memory[ADDR+rIi];
LD?N ADDR,i(0:5)rI? := - memory[ADDR + rIi];
STAADDR,i(0:5)memory[ADDR+rIi]:=rA;
STXADDR,i(0:5)memory[ADDR+rIi]:=rX;
ST? ADDR,i(0:5)memory[ADDR + rIi] := rI?;
STJADDR,i(0:5)memory[ADDR+rIi]:=rJ;
STZADDR,i(0:5)memory[ADDR+rIi]:=0;
ADDADDR,i(0:5)rA:=rA+memory[ADDR+rIi];
SUBADDR,i(0:5)rA:=rA-memory[ADDR+rIi];
MULADDR,i(0:5)(rA,rX):=rA*memory[ADDR+rIi];
DIVADDR,i(0:5)
rA:=int((rA,rX)/memory[ADDR+rIi]);rX:=(rA,rX)%memory[ADDR+rIi];
ENTAADDR,irA:=ADDR+rIi;
ENTXADDR,irX:=ADDR+rIi;
ENT? ADDR,irI? := ADDR + rIi;
ENNAADDR,irA:=-ADDR-rIi;
ENNXADDR,irX:=-ADDR-rIi;
ENN? ADDR,irI? := - ADDR - rIi;
INCAADDR,irA:=rA+ADDR+rIi;
INCXADDR,irX:=rX+ADDR+rIi;
INC? ADDR,irI? := rI? + ADDR + rIi;
DECAADDR,irA:=rA-ADDR-rIi;
DECXADDR,irX:=rX-ADDR-rIi;
DEC? ADDR,irI? := rI? - ADDR - rIi;
CMPAADDR,i(0:5)compare rA with memory[ADDR + rIi] and set comparison flag;
CMPXADDR,i(0:5)compare rX with memory[ADDR + rIi] and set comparison flag;
CMP? ADDR,i(0:5)compare rI? with memory[ADDR + rIi] and set comparison flag;
JMPADDR,i
rJ:=addressofnextinstruction;gotoADDR+rIi;
JSJADDR,igotoADDR+rIi;
JOVADDR,i
if(overflow)thenoverflow:=false;gotoADDR+rIi;
JNOVADDR,i
if(nooverflow)thengotoADDR+rIi;elseoverflow:=false;
JL, JE, JG ADDR,i
JGE, JNE, JLE ADDR,i
if(less,equal,greater)thengotoADDR+rIi;if(noless,unequal,nogreater)thengotoADDR+rIi;
JAN/JAZ/JAP ADDR,i
JANN/JANZ/JANP ADDR,i
if(rA<0orrA==0orrA>0)thengotoADDR+rIi;if(rA>=0orrA!=0orrA<=0)thengotoADDR+rIi;
JXN/JXZ/JXP ADDR,i
JXNN/JXNZ/JXNP ADDR,i
if (rX<0 or rX==0 or rX>0) then goto ADDR + rIi; if (rX>=0 or rX!=0 or rX<=0) then goto ADDR + rIi; 
J?N/J?Z/J?P ADDR,i
J?NN/J?NZ/J?NP ADDR,i
if (rI?<0 or rI?==0 or rI?>0) then goto ADDR + rIi; if (rI?>=0 or rI?!=0 or rI?<=0) then goto ADDR + rIi;
MOVEADDR,i(F)
for(n=0;n<F;n++,rI1++)memory[rI1]:=memory[ADDR+rIi+n];
SLA/SRA ADDR,i
SLAX/SRAX ADDR,i
SLC/SRC ADDR,i
shift rA to the left/right by ADDR+rIi bytes
shift (rA,rX) to the left/right by ADDR+rIi bytes
rotate (rA,rX) to the left/right by ADDR+rIi bytes
NOPdo nothing;
HLThalt execution;
INADDR,i(F)read in one block from input unit F
into memory[ADDR + rIi] onwards;
OUTADDR,i(F)output one block to unit F
from memory[ADDR + rIi] onwards;
IOCADDR,i(F)send control instruction to i/o unit F;
JREDADDR,i(F)if(i/ounitFisready)thengotoADDR+rIi;
JBUSADDR,i(F)if(i/ounitFisbusy)thengotoADDR+rIi;
NUMrA := numerical value of characters in (rA,rX);
CHAR(rA,rX) := character codes representing value of rA;

Implementations

MIX has been implemented in software by:

An implementation of MIX was created for the iCE40HX8K FPGA board in 2021. [4]

See also

References

  1. Knuth, Donald (May 1997). The Art of Computer Programming, Volume 1: Fundamental Algorithms (3 ed.). Addison Wesley Longman. p. 124. ISBN   0-201-89683-4.
  2. mix(1)   9front manual page
  3. Hardware::Simulator::MIX Perl module from CPAN
  4. "Michael Schröder / mix-fgpa". GitLab.