Mark M. Tehranipoor | |
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Born | |
Nationality | Iranian-American |
Education | University of Texas at Dallas |
Awards | ACM Fellow IEEE Fellow NAI Fellow HOST Hall of Fame Inductee [1] NSF CAREER Award MURI Award on Nanoscale Security SRC Aristotle |
Scientific career | |
Fields | Hardware security Design for testing Electrical and Computer Engineering |
Institutions | University of Florida (f.m.r) University of Connecticut (f.m.r) University of Maryland |
Website | tehranipoor |
Mark M. Tehranipoor is an Iranian American academic researcher specializing in hardware security and trust, electronics supply chain security, IoT security, and reliable and testable VLSI design. He is the Intel Charles E. Young Preeminence Endowed Professor in Cybersecurity at the University of Florida and serves as the Director of the Florida Institute for Cybersecurity Research. [2] Since June 2022, he has served as the chair of the Department of Electrical and Computer Engineering at the University of Florida. [3] He is a fellow of IEEE, ACM, and NAI as well as a Golden Core member of the IEEE. He is a co-founder of the International Symposium on Hardware Oriented Security and Trust (HOST). [1] He is the recipient of the 2023 SRC Aristotle award. Tehranipoor also serves as a co-director of the Air Force Office of Scientific Research CYAN and MEST Centers of Excellence. [4] [5]
Tehranipoor earned a Bachelor of Science (B.S.) in Electrical Engineering from Tehran Polytechnic in 1997. After completing his Masters of Science (M.S.) in Electrical Engineering from the University of Tehran in 2000, he received the Texas Public Educational Grant and moved to the United States to pursue his Ph.D. in Electrical and Computer Engineering at the University of Texas at Dallas, completing the doctorate in two years and eight months.
He spent two years at the University of Maryland Baltimore as an assistant professor before moving to the University of Connecticut.
At UConn, he started to publish a series of books on Hardware Security, with the first being the Introduction to Hardware Security and Trust.
He initiated and established three centers of excellence in the area of hardware and cyber security; the Center for Hardware Assurance and Engineering (CHASE), [6] Comcast Center of Excellence on Security Innovation (CSI), [7] and the Connecticut Cybersecurity Center (C3). [8]
He received the National Science Foundation (NSF) CAREER Award in 2008 and AFOSR MURI Award in 2014.
Later in 2015, Tehranipoor moved to the University of Florida, acquiring the title of Intel Charles E. Young Preeminence Endowed Professor in Cybersecurity. He serves as the Director of the Florida Institute for Cybersecurity Research. [2] He is an IEEE fellow, ACM fellow and a co-founder of the International Symposium on Hardware Oriented Security and Trust. [1] Tehranipoor also serves as a co-director of the Air Force Office of Scientific Research CYAN and MEST Centers of Excellence. [4] In June 2022, Tehranipoor became the chair of the Department of Electrical and Computer Engineering at the University of Florida. [3]
Tehranipoor has published over 600 conference and journal papers, 19 books, and holds 22 patents, with at least 24 more pending. [2] [9]
Logic simulation is the use of simulation software to predict the behavior of digital circuits and hardware description languages. Simulation can be performed at varying degrees of physical abstraction, such as at the transistor level, gate level, register-transfer level (RTL), electronic system-level (ESL), or behavioral level.
Mark A. Horowitz is an American electrical engineer, computer scientist, inventor, and entrepreneur who is the Yahoo! Founders Professor in the School of Engineering and the Fortinet Founders Chair of the Department of Electrical Engineering at Stanford University. He holds a joint appointment in the Electrical Engineering and Computer Science departments and previously served as the Chair of the Electrical Engineering department from 2008 to 2012. He is a co-founder, the former chairman, and the former chief scientist of Rambus Inc.. Horowitz has authored over 700 published conference and research papers and is among the most highly-cited computer architects of all time. He is a prolific inventor and holds 374 patents as of 2023.
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A physical unclonable function, or PUF, is a physical object whose operation cannot be reproduced ("cloned") in physical way, that for a given input and conditions (challenge), provides a physically defined "digital fingerprint" output (response). that serves as a unique identifier, most often for a semiconductor device such as a microprocessor. PUFs are often based on unique physical variations occurring naturally during semiconductor manufacturing. A PUF is a physical entity embodied in a physical structure. PUFs are implemented in integrated circuits, including FPGAs, and can be used in applications with high-security requirements, more specifically cryptography, Internet of Things (IOT) devices and privacy protection.
Virgil Dorin Gligor is a Romanian-American professor of electrical and computer engineering who specializes in the research of network security and applied cryptography.
A Hardware Trojan (HT) is a malicious modification of the circuitry of an integrated circuit. A hardware Trojan is completely characterized by its physical representation and its behavior. The payload of an HT is the entire activity that the Trojan executes when it is triggered. In general, Trojans try to bypass or disable the security fence of a system: for example, leaking confidential information by radio emission. HTs also could disable, damage or destroy the entire chip or components of it.
Hardware obfuscation is a technique by which the description or the structure of electronic hardware is modified to intentionally conceal its functionality, which makes it significantly more difficult to reverse-engineer. In other words, hardware obfuscation modifies the design in such a away that the resulting architecture becomes un-obvious to an adversary. Hardware Obfuscation can be of two types depending on the hardware platform targeted: (a) DSP Core Hardware Obfuscation - this type of obfuscation performs certain high level transformation on the data flow graph representation of DSP core to convert it into an unknown form that reflects an un-obvious architecture at RTL or gate level. This type of obfuscation is also called 'Structural Obfuscation'. Another type of DSP Core Obfuscation method is called 'Functional Obfuscation' - It uses a combination of AES and IP core locking blocks (ILBs) to lock the functionality of the DSP core using key-bits. Without application of correct key sequence, the DSP core produces either wrong output or no output at all (b) Combinational/Sequential Hardware Obfuscation - this type of obfuscation performs changes to the gate level structure of the circuit itself.
Farinaz Koushanfar is an Iranian-American computer scientist whose research concerns embedded systems, ad-hoc networks, and computer security. She is a professor and Henry Booker Faculty Scholar of Electrical and Computer Engineering at the University of California, San Diego.
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Salvatore J. Stolfo is an academic and professor of computer science at Columbia University, specializing in computer security.
Ramesh Karri is a researcher specializing in trustworthy hardware, high assurance nanoscale integrated circuits, architectures and systems. He is a Professor of Electrical and Computer Engineering at New York University Polytechnic School of Engineering. Additionally, Karri is the co-founder of Trust-Hub, Embedded Security Challenge and NYU CRISSP center, the IEEE/ACM Symposium on Nanoscale Architectures and the IEEE Computer Society Technical Committee on Nanoscale Architectures. He is a member of NYU WIRELESS. He was awarded the Humboldt Fellowship and the National Science Foundation CAREER Award.
Surendra Prasad is an Indian communications engineer, a former director and an Usha chair professor of the Indian Institute of Technology, Delhi. He is also an emeritus professor of Bharti School of Telecommunication Technology And Management, a joint venture of IIT Delhi and is known for developing new techniques, algorithms and hardware in signal processing. He is an elected fellow of all the three major Indian science academies viz. Indian Academy of Sciences, Indian National Science Academy and the National Academy of Sciences, India. as well as the Indian National Academy of Engineering. The Council of Scientific and Industrial Research, the apex agency of the Government of India for scientific research, awarded him the Shanti Swarup Bhatnagar Prize for Science and Technology, one of the highest Indian science awards for his contributions to Engineering Sciences in 1988.
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Venkata Narayana Padmanabhan is a computer scientist and principal researcher at Microsoft Research India. He is known for his research in networked and mobile systems. He is an elected fellow of the Indian National Academy of Engineering, Institute of Electrical and Electronics Engineers and the Association for Computing Machinery. The Council of Scientific and Industrial Research, the apex agency of the Government of India for scientific research, awarded him the Shanti Swarup Bhatnagar Prize for Science and Technology, one of the highest Indian science awards for his contributions to Engineering Sciences in 2016.
Birendra Nath Mallick is an Indian neurobiologist and a professor of neurobiology at the School of Life Sciences of Jawaharlal Nehru University. Known for his research on the Neuroscience of sleep, Mallick has authored and edited articles and in the first monograph on REM Sleep. He is a J. C. Bose National Fellow of the Department of Biotechnology and an elected fellow of all the three major Indian science academies viz. National Academy of Sciences, India, Indian Academy of Sciences, and Indian National Science Academy.
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Yashwant Gupta is an Indian astrophysicist and a professor at the National Centre for Radio Astrophysics (NCRA) of the Tata Institute of Fundamental Research. He is currently a Distinguished Professor and also the Centre Director at NCRA.
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Prabhat Mishra is a Professor in the Department of Computer and Information Science and Engineering and a UF Research Foundation Professor at the University of Florida. Prof. Mishra's research interests are in hardware security, quantum computing, embedded systems, system-on-chip validation, formal verification, and machine learning.
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