This section contains content that is written like an advertisement .(August 2015) |
Company type | Subsidiary |
---|---|
Industry | Semiconductor intellectual property core |
Founded | 1997 |
Fate | Acquired by Cadence Design Systems in 2013 |
Headquarters | San Jose, California |
Key people | Chris Rowen, Jack Guedj |
Products | Microprocessors, HiFi audio, DSP cores |
Website | ip |
Tensilica Inc. was a company based in Silicon Valley in the semiconductor intellectual property core business. It is now a part of Cadence Design Systems.
Tensilica is known for its customizable Xtensa microprocessor core. Other products included: HiFi audio/voice DSPs (digital signal processors) with a software library of over 225 codecs from Cadence and over 100 software partners, Vision DSPs that handle complex algorithms in imaging, video, computer vision, and neural networks, and the ConnX family of baseband DSPs ranging from the dual-MAC ConnX D2 to the 64-MAC ConnX BBE64EP.
Tensilica was founded in 1997 by Chris Rowen (one of the founders of MIPS Technologies). It employed Earl Killian, who contributed to the MIPS architecture, as director of architecture. [1] On March 11, 2013, Cadence Design Systems announced its intent to buy Tensilica for approximately $380 million in cash. [2] Cadence completed the acquisition in April 2013, with a cash outlay at closing of approximately $326 million. [3]
Cadence Tensilica develops SIP blocks to be included on the chip (IC) designs of products of their licensees, such as system on a chip for embedded systems. Tensilica processors are delivered as synthesizable RTL for easy integration into chip designs.
Xtensa processors range from small, low-power cache-less microcontroller to high-performance 16-way SIMD processors, 3-issue VLIW DSP cores, or 1 TMAC/sec neural network processors.[ citation needed ] All Cadence standard DSPs are based on the Xtensa architecture.[ citation needed ] The Xtensa architecture offers a user-customizable instruction set through automated customization tools that can extend the Xtensa base instruction set, including SIMD instructions, new register files. [4]
The Xtensa instruction set is a 32-bit architecture with a compact 16- and 24-bit instruction set. The base instruction set has 82 RISC instructions and includes a 32-bit ALU, 16 general-purpose 32-bit registers, and one special-purpose register. [5]
The brand name Tensilica is a combination of the word Tensile , meaning capable of being extended, and the word Silica from silicon , the element of which integrated circuits are primarily made.[ citation needed ]
Very long instruction word (VLIW) refers to instruction set architectures that are designed to exploit instruction level parallelism (ILP). A VLIW processor allows programs to explicitly specify instructions to execute in parallel, whereas conventional central processing units (CPUs) mostly allow programs to specify instructions to execute in sequence only. VLIW is intended to allow higher performance without the complexity inherent in some other designs.
A digital signal processor (DSP) is a specialized microprocessor chip, with its architecture optimized for the operational needs of digital signal processing. DSPs are fabricated on metal–oxide–semiconductor (MOS) integrated circuit chips. They are widely used in audio signal processing, telecommunications, digital image processing, radar, sonar and speech recognition systems, and in common consumer electronic devices such as mobile phones, disk drives and high-definition television (HDTV) products.
Conexant Systems, Inc. was an American-based software developer and fabless semiconductor company that developed technology for voice and audio processing, imaging and modems. The company began as a division of Rockwell International, before being spun off as a public company. Conexant itself then spun off several business units, creating independent public companies which included Skyworks Solutions and Mindspeed Technologies.
In electronic design, a semiconductor intellectual property core, IP core or IP block is a reusable unit of logic, cell, or integrated circuit layout design that is the intellectual property of one party. IP cores can be licensed to another party or owned and used by a single party. The term comes from the licensing of the patent or source code copyright that exists in the design. Designers of system on chip (SoC), application-specific integrated circuits (ASIC) and systems of field-programmable gate array (FPGA) logic can use IP cores as building blocks.
A multi-core processor is a microprocessor on a single integrated circuit with two or more separate processing units, called cores, each of which reads and executes program instructions. The instructions are ordinary CPU instructions but the single processor can run instructions on separate cores at the same time, increasing overall speed for programs that support multithreading or other parallel computing techniques. Manufacturers typically integrate the cores onto a single integrated circuit die or onto multiple dies in a single chip package. The microprocessors currently used in almost all personal computers are multi-core.
The Nvidia GoForce was a line of chipsets that was used mainly in handheld devices such as PDAs and mobile phones. Nvidia acquired graphics display processor firm MediaQ in 2003, and rebranded the division as GoForce. It has since been replaced by the Nvidia Tegra series of SoCs.
Ceva Inc. is a publicly listed semiconductor intellectual property (IP) company, headquartered in Rockville, Maryland and specializes in digital signal processor (DSP) technology. The company's main development facility is located in Herzliya, Israel and Sophia Antipolis, France.
Unified Video Decoder is the name given to AMD's dedicated video decoding ASIC. There are multiple versions implementing a multitude of video codecs, such as H.264 and VC-1.
Xilleon is a brand for a family of SoCs combining a low-power CPU with ASICs for accelerated video decompression and further functions for major worldwide broadcast networks targeting digital television.
Cadence Design Systems, Inc., headquartered in San Jose, California, is an American multinational computational software company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. The company produces software, hardware, and silicon structures for designing integrated circuits, systems on chips (SoCs), and printed circuit boards.
An AES instruction set is a set of instructions that are specifically designed to perform AES encryption and decryption operations efficiently. These instructions are typically found in modern processors and can greatly accelerate AES operations compared to software implementations. An AES instruction set includes instructions for key expansion, encryption, and decryption using various key sizes.
The ARM Cortex-A5 is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture announced in 2009.
Hexagon is the brand name for a family of digital signal processor (DSP) products by Qualcomm. Hexagon is also known as QDSP6, standing for “sixth generation digital signal processor.” According to Qualcomm, the Hexagon architecture is designed to deliver performance with low power over a variety of applications.
HiSilicon is a Chinese fabless semiconductor company based in Shenzhen, Guangdong province and wholly owned by Huawei. HiSilicon purchases licenses for CPU designs from ARM Holdings, including the ARM Cortex-A9 MPCore, ARM Cortex-M3, ARM Cortex-A7 MPCore, ARM Cortex-A15 MPCore, ARM Cortex-A53, ARM Cortex-A57 and also for their Mali graphics cores. HiSilicon has also purchased licenses from Vivante Corporation for their GC4000 graphics core.
The ARM Cortex-A57 is a central processing unit implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings. The Cortex-A57 is an out-of-order superscalar pipeline. It is available as SIP core to licensees, and its design makes it suitable for integration with other SIP cores into one die constituting a system on a chip (SoC).
Heterogeneous computing refers to systems that use more than one kind of processor or core. These systems gain performance or energy efficiency not just by adding the same type of processors, but by adding dissimilar coprocessors, usually incorporating specialized processing capabilities to handle particular tasks.
TrueAudio is the name given to AMD's ASIC intended to serve as dedicated co-processor for the calculations of computationally expensive advanced audio signal processing, such as convolution reverberation effects and 3D audio effects. TrueAudio is integrated into some of the AMD GPUs and APUs available since 2013.
Since 1985, many processors implementing some version of the MIPS architecture have been designed and used widely.
Most recently he was chief architect at Tensilica working on configurable/extensible processors.