Tensilica

Last updated
Tensilica Inc.
Company typeSubsidiary
Industry Semiconductor intellectual property core
Founded1997
FateAcquired by Cadence Design Systems in 2013
HeadquartersSan Jose, California
Key people
Chris Rowen, Jack Guedj
ProductsMicroprocessors, HiFi audio, DSP cores
Website ip.cadence.com

Tensilica Inc. was a company based in Silicon Valley in the semiconductor intellectual property core business. It is now a part of Cadence Design Systems.

Contents

Tensilica is known for its customizable Xtensa microprocessor core. Other products included: HiFi audio/voice DSPs (digital signal processors) with a software library of over 225 codecs from Cadence and over 100 software partners, Vision DSPs that handle complex algorithms in imaging, video, computer vision, and neural networks, and the ConnX family of baseband DSPs ranging from the dual-MAC ConnX D2 to the 64-MAC ConnX BBE64EP.

Tensilica was founded in 1997 by Chris Rowen (one of the founders of MIPS Technologies). It employed Earl Killian, who contributed to the MIPS architecture, as director of architecture. [1] On March 11, 2013, Cadence Design Systems announced its intent to buy Tensilica for approximately $380 million in cash. [2] Cadence completed the acquisition in April 2013, with a cash outlay at closing of approximately $326 million. [3]

Cadence Tensilica products

Cadence Tensilica develops SIP blocks to be included on the chip (IC) designs of products of their licensees, such as system on a chip for embedded systems. Tensilica processors are delivered as synthesizable RTL for easy integration into chip designs.

Xtensa configurable cores

Xtensa processors range from small, low-power cache-less microcontroller to high-performance 16-way SIMD processors, 3-issue VLIW DSP cores, or 1 TMAC/sec neural network processors.[ citation needed ] All Cadence standard DSPs are based on the Xtensa architecture.[ citation needed ] The Xtensa architecture offers a user-customizable instruction set through automated customization tools that can extend the Xtensa base instruction set, including SIMD instructions, new register files. [4]

Xtensa instruction set

The Xtensa instruction set is a 32-bit architecture with a compact 16- and 24-bit instruction set. The base instruction set has 82 RISC instructions and includes a 32-bit ALU, 16 general-purpose 32-bit registers, and one special-purpose register. [5]

  • Xtensa LX — sixth-generation architecture, announced in May 2004 [6]
  • Xtensa V — fifth-generation architecture, announced in August 2002; [6] up to 350 MHz in a 130 nm process [7]
  • Xtensa IV — fourth-generation product, announced in June 2001; with more tooling support [8]
  • Xtensa III — third-generation architecture, announced in June 2000; not less than 180 MHz in a 180 nm process [9]

HiFi audio and voice DSP IP

Simplified block diagrams of HiFi audio engine and Xtensa LX Cadence Tensilica HiFi 2.svg
Simplified block diagrams of HiFi audio engine and Xtensa LX

Vision DSPs

Adoption

History

Company name

The brand name Tensilica is a combination of the word Tensile , meaning capable of being extended, and the word Silica from silicon , the element of which integrated circuits are primarily made.[ citation needed ]

Related Research Articles

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References

  1. "S-1 Supercomputer Alumni" . Retrieved 2019-02-22. Most recently he was chief architect at Tensilica working on configurable/extensible processors.
  2. "Cadence to Acquire Tensilica."
  3. Source: http://ip.cadence.com/news/432/330/Cadence-Reports-First-Quarter-2013-Financial-Results-and-Completes-Acquisition-of-Tensilica
  4. https://0x04.net/~mwk/doc/xtensa.pdf §1.2.2
  5. https://0x04.net/~mwk/doc/xtensa.pdf Chapter 3 "Core Architecture"
  6. 1 2 "Tensilica Xtensa LX Processor with Vectra LX" (PDF). bdti.com. Berkeley Design Technology, Inc. 2005. Retrieved 3 September 2020.
  7. "Xtensa V gets extended for networking and wireless". eetimes.com. EE Times. 3 September 2002. Retrieved 3 September 2020.
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  9. "Tensilica Unveils Feature-Rich Third Generation Xtensa Configurable Processor Technology". cadence.com. Cadence. 14 June 2000. Retrieved 3 September 2020.
  10. "Tensilica Introduces the Smallest, Lowest Power DSP IP Core For Always-Listening Voice Trigger and Voice Recognition". design-reuse.com. Retrieved 2024-03-05.
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  18. "Cadence Announces New Tensilica Vision P6 DSP Targeting Embedded Neural Network Applications".
  19. "Cadence Unveils Industry's First Neural Network DSP IP for Automotive, Surveillance, Drone and Mobile Markets".
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  25. "Customer Spotlight: VIA Technologies Licenses Cadence Tensilica HiFi Audio/Voice DSP".
  26. "Realtek Licenses Cadence's Tensilica HiFi Audio/Voice DSP IP Core".