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Company type | Subsidiary |
---|---|
Industry | Semiconductor intellectual property core |
Founded | 1997 |
Fate | Acquired by Cadence Design Systems in 2013 |
Headquarters | San Jose, California |
Key people | Chris Rowen, Jack Guedj |
Products | Microprocessors, HiFi audio, DSP cores |
Website | ip |
Tensilica Inc. was a company based in Silicon Valley that developed semiconductor intellectual property (SIP) cores. Tensilica was founded in 1997 by Chris Rowen. [1] In April 2013, the company was acquired by Cadence Design Systems for approximately $326 million. [2]
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Cadence Tensilica develops SIP blocks to be included on the chip (IC) designs of products of their licensees, such as system on a chip for embedded systems. Tensilica processors are delivered as synthesizable RTL to aid integration with other chips.
Xtensa processors range from small, low-power cache-less microcontroller to more performance-oriented SIMD processors, multiple-issue VLIW DSP cores, and neural network processors. [3] Cadence standard DSPs are based on the Xtensa architecture. [4] The architecture offers a user-customizable instruction set through automated customization tools that can extend the base instruction set, including and not limited to, addition of new SIMD instructions and register files. [5] [6]
The Xtensa instruction set is a 32-bit architecture with a compact 16- and 24-bit instruction set. The base instruction set has 82 RISC instructions and includes a 32-bit ALU, 16 general-purpose 32-bit registers, and one special-purpose register. [7]
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The brand name Tensilica is a combination of the word Tensile and Silica, with the latter referring to silicon, the building blocks of modern integrated circuits.[ citation needed ]
Very long instruction word (VLIW) refers to instruction set architectures that are designed to exploit instruction-level parallelism (ILP). A VLIW processor allows programs to explicitly specify instructions to execute in parallel, whereas conventional central processing units (CPUs) mostly allow programs to specify instructions to execute in sequence only. VLIW is intended to allow higher performance without the complexity inherent in some other designs.
A digital signal processor (DSP) is a specialized microprocessor chip, with its architecture optimized for the operational needs of digital signal processing. DSPs are fabricated on metal–oxide–semiconductor (MOS) integrated circuit chips. They are widely used in audio signal processing, telecommunications, digital image processing, radar, sonar and speech recognition systems, and in common consumer electronic devices such as mobile phones, disk drives and high-definition television (HDTV) products.
In electronic design, a semiconductor intellectual property core, IP core or IP block is a reusable unit of logic, cell, or integrated circuit layout design that is the intellectual property of one party. IP cores can be licensed to another party or owned and used by a single party. The term comes from the licensing of the patent or source code copyright that exists in the design. Designers of system on chip (SoC), application-specific integrated circuits (ASIC) and systems of field-programmable gate array (FPGA) logic can use IP cores as building blocks.
A multi-core processor (MCP) is a microprocessor on a single integrated circuit (IC) with two or more separate central processing units (CPUs), called cores to emphasize their multiplicity. Each core reads and executes program instructions, specifically ordinary CPU instructions. However, the MCP can run instructions on separate cores at the same time, increasing overall speed for programs that support multithreading or other parallel computing techniques. Manufacturers typically integrate the cores onto a single IC die, known as a chip multiprocessor (CMP), or onto multiple dies in a single chip package. As of 2024, the microprocessors used in almost all new personal computers are multi-core.
The Nvidia GoForce was a line of chipsets that was used mainly in handheld devices such as PDAs and mobile phones. Nvidia acquired graphics display processor firm MediaQ in 2003, and rebranded the division as GoForce. It has since been replaced by the Nvidia Tegra series of SoCs.
Unified Video Decoder is the name given to AMD's dedicated video decoding ASIC. There are multiple versions implementing a multitude of video codecs, such as H.264 and VC-1.
Xilleon is a brand for a family of SoCs combining a low-power CPU with ASICs for accelerated video decompression and further functions for major worldwide broadcast networks targeting digital television.
Cadence Design Systems, Inc. is an American multinational technology and computational software company. Headquartered in San Jose, California, Cadence was formed in 1988 through the merger of SDA Systems and ECAD. Initially specialized in electronic design automation (EDA) software for the semiconductor industry, currently the company makes software and hardware for designing products such as integrated circuits, systems on chips (SoCs), printed circuit boards, and pharmaceutical drugs, also licensing intellectual property for the electronics, aerospace, defense and automotive industries, among others.
An AES instruction set is a set of instructions that are specifically designed to perform AES encryption and decryption operations efficiently. These instructions are typically found in modern processors and can greatly accelerate AES operations compared to software implementations. An AES instruction set includes instructions for key expansion, encryption, and decryption using various key sizes.
The ARM Cortex-A5 is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture announced in 2009.
Hexagon is the brand name for a family of digital signal processor (DSP) and later neural processing unit (NPU) products by Qualcomm. Hexagon is also known as QDSP6, standing for “sixth generation digital signal processor.” According to Qualcomm, the Hexagon architecture is designed to deliver performance with low power over a variety of applications.
Heterogeneous computing refers to systems that use more than one kind of processor or core. These systems gain performance or energy efficiency not just by adding the same type of processors, but by adding dissimilar coprocessors, usually incorporating specialized processing capabilities to handle particular tasks.
Amlogic Inc. is a fabless semiconductor company that was founded on March 14, 1995, in Santa Clara, California and is predominantly focused on designing and selling system on a chip integrated circuits. Like most fabless companies in the industry, the company outsources the actual manufacturing of its chips to third-party independent chip manufacturers such as TSMC. Its main target applications as of 2021 are entertainment devices such as Android TV-based devices and IPTV/OTT set-top boxes, media dongles, smart TVs and tablets. It has offices in Shanghai, Shenzhen, Beijing, Xi'an, Chengdu, Hefei, Nanjing, Qingdao, Taipei, Hong Kong, Seoul, Mumbai, London, Munich, Indianapolis, Milan, Novi Sad and Santa Clara, California.
TrueAudio is AMD's application-specific integrated circuit (ASIC) intended to serve as dedicated co-processor for the calculations of computationally expensive advanced audio signal processing, such as convolution reverberation effects and 3D audio effects. TrueAudio is integrated into some of the AMD GPUs and APUs available since 2013.
NodeMCU is a low-cost open source IoT platform. It initially included firmware which runs on the ESP8266 Wi-Fi SoC from Espressif Systems, and hardware which was based on the ESP-12 module. Later, support for the ESP32 32-bit MCU was added.
The ESP8266 is a low-cost Wi-Fi microcontroller, with built-in TCP/IP networking software, and microcontroller capability, produced by Espressif Systems in Shanghai, China.
ESP32 is a series of low-cost, low-power system-on-chip microcontrollers with integrated Wi-Fi and dual-mode Bluetooth. The ESP32 series employs either a Tensilica Xtensa LX6 microprocessor in both dual-core and single-core variations, an Xtensa LX7 dual-core microprocessor, or a single-core RISC-V microprocessor and includes built-in antenna switches, RF balun, power amplifier, low-noise receive amplifier, filters, and power-management modules. It is commonly found either on device-specific PCBs or on a range of development boards with GPIO pins and various connectors depending on the model and manufacturer of the board.
The BPI Bit is an ESP32 with Xtensa 32bit LX6 single/dual-core processor based embedded system
Most recently he was chief architect at Tensilica working on configurable/extensible processors.