28 nm process

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The "28 nm" lithography process is a half-node semiconductor manufacturing process based on a die shrink of the "32 nm" lithography process. [1] It appeared in production in 2010. [2]

Contents

Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no direct relation to the dimensions on the integrated circuit; [3] neither gate length, metal pitch or gate pitch on a "28nm" device is twenty-eight nanometers. [4] [5] [6] [7]

Taiwan Semiconductor Manufacturing Company has offered "28 nm" production using high-K metal gate process technology. [8]

GlobalFoundries offers a "28nm" foundry process called the "28SLPe" ("28nm Super Low Power") foundry process, which uses high-K metal gate technology. [9]

According to a 2016 presentation by Sophie Wilson, 28nm has the lowest cost per logic gate. Cost per gate had decreased as processes shrunk until reaching 28nm, and has slowly risen since then. [10]

Design

"28nm" requires twice the number of design rules for ensuring reliability in manufacturing as "80nm". [11]

Shipped devices

AMD's Radeon HD 7970 uses a graphics processing unit manufactured using a "28nm" process. [12]

Some models of the PS3 use a RSX 'Reality Synthesizer' chip manufactured using a "28nm" process. [13]

FPGAs produced with "28 nm" process technology include models of the Xilinx Artix 7 FPGAs and Altera Cyclone V FPGAs. [14]

Related Research Articles

<span class="mw-page-title-main">Semiconductor device fabrication</span> Manufacturing process used to create integrated circuits

Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as microprocessors, microcontrollers, and memories. It is a multiple-step photolithographic and physico-chemical process during which electronic circuits are gradually created on a wafer, typically made of pure single-crystal semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications.

<span class="mw-page-title-main">TSMC</span> Taiwanese semiconductor foundry company

Taiwan Semiconductor Manufacturing Company Limited is a Taiwanese multinational semiconductor contract manufacturing and design company. It is the world's most valuable semiconductor company, the world's largest dedicated independent ("pure-play") semiconductor foundry, and Taiwan's largest company, with headquarters and main operations located in the Hsinchu Science Park in Hsinchu, Taiwan. Although the central government of Taiwan is the largest individual shareholder, the majority of TSMC is owned by foreign investors. In 2023, the company was ranked 44th in the Forbes Global 2000. Taiwan's exports of integrated circuits amounted to $184 billion in 2022, accounted for nearly 25 percent of Taiwan's GDP. TSMC constitutes about 30 percent of the Taiwan Stock Exchange's main index.

<span class="mw-page-title-main">Altera</span> U.S. semiconductor company that produces Field-Programmable Gate Arrays (FPGA)

Altera Corporation is a manufacturer of programmable logic devices (PLDs) headquartered in San Jose, California. It was founded in 1983 and acquired by Intel in 2015 before becoming independent once again in 2024 as a company focused on development of Field-Programmable Gate Array (FPGA) technology and system on a chip FPGAs.

<span class="mw-page-title-main">Xilinx</span> American technology company

Xilinx, Inc. was an American technology and semiconductor company that primarily supplied programmable logic devices. The company is renowned for inventing the first commercially viable field-programmable gate array (FPGA). It also pioneered the first fabless manufacturing model.

The 90 nm process refers to the technology used in semiconductor manufacturing to create integrated circuits with a minimum feature size of 90 nanometers. It was an advancement over the previous 130 nm process. Eventually, it was succeeded by smaller process nodes, such as the 65 nm, 45 nm, and 32 nm processes.

The "32 nm" node is the step following the "45 nm" process in CMOS (MOSFET) semiconductor device fabrication. "32-nanometre" refers to the average half-pitch of a memory cell at this technology level.

The transistor count is the number of transistors in an electronic device. It is the most common measure of integrated circuit complexity. The rate at which MOS transistor counts have increased generally follows Moore's law, which observes that transistor count doubles approximately every two years. However, being directly proportional to the area of a die, transistor count does not represent how advanced the corresponding manufacturing technology is. A better indication of this is transistor density which is the ratio of a semiconductor's transistor count to its die area.

The "22 nm" node is the process step following 32 nm in CMOS MOSFET semiconductor device fabrication. The typical half-pitch for a memory cell using the process is around 22 nm. It was first demonstrated by semiconductor companies for use in RAM in 2008. In 2010, Toshiba began shipping 24 nm flash memory chips, and Samsung Electronics began mass-producing 20 nm flash memory chips. The first consumer-level CPU deliveries using a 22 nm process started in April 2012 with the Intel Ivy Bridge processors.

The 180 nm process is a MOSFET (CMOS) semiconductor process technology that was commercialized around the 1998–2000 timeframe by leading semiconductor companies, starting with TSMC and Fujitsu, then followed by Sony, Toshiba, Intel, AMD, Texas Instruments and IBM.

The "14 nanometer process" refers to a marketing term for the MOSFET technology node that is the successor to the "22 nm" node. The "14 nm" was so named by the International Technology Roadmap for Semiconductors (ITRS). Until about 2011, the node following "22 nm" was expected to be "16 nm". All "14 nm" nodes use FinFET technology, a type of multi-gate MOSFET technology that is a non-planar evolution of planar silicon CMOS technology.

<span class="mw-page-title-main">Multigate device</span> MOS field-effect transistor with more than one gate

A multigate device, multi-gate MOSFET or multi-gate field-effect transistor (MuGFET) refers to a metal–oxide–semiconductor field-effect transistor (MOSFET) that has more than one gate on a single transistor. The multiple gates may be controlled by a single gate electrode, wherein the multiple gate surfaces act electrically as a single gate, or by independent gate electrodes. A multigate device employing independent gate electrodes is sometimes called a multiple-independent-gate field-effect transistor (MIGFET). The most widely used multi-gate devices are the FinFET and the GAAFET, which are non-planar transistors, or 3D transistors.

The term die shrink refers to the scaling of metal–oxide–semiconductor (MOS) devices. The act of shrinking a die creates a somewhat identical circuit using a more advanced fabrication process, usually involving an advance of lithographic nodes. This reduces overall costs for a chip company, as the absence of major architectural changes to the processor lowers research and development costs while at the same time allowing more processor dies to be manufactured on the same piece of silicon wafer, resulting in less cost per product sold.

In semiconductor fabrication, the International Technology Roadmap for Semiconductors (ITRS) defines the "10 nanometer process" as the MOSFET technology node following the "14 nm" node.

GlobalFoundries Inc. is a multinational semiconductor contract manufacturing and design company incorporated in the Cayman Islands and headquartered in Malta, New York. Created by the divestiture of the manufacturing arm of AMD, the company was privately owned by Mubadala Investment Company, a sovereign wealth fund of the United Arab Emirates, until an initial public offering (IPO) in October 2021.

Per the International Technology Roadmap for Semiconductors, the 45 nm process is a MOSFET technology node referring to the average half-pitch of a memory cell manufactured at around the 2007–2008 time frame.

In semiconductor manufacturing, the International Roadmap for Devices and Systems defines the "5 nm" process as the MOSFET technology node following the "7 nm" node. In 2020, Samsung and TSMC entered volume production of "5 nm" chips, manufactured for companies including Apple, Huawei, Mediatek, Qualcomm and Marvell.

In semiconductor manufacturing, the "7 nm" process is a term for the MOSFET technology node following the "10 nm" node, defined by the International Roadmap for Devices and Systems (IRDS), which was preceded by the International Technology Roadmap for Semiconductors (ITRS). It is based on FinFET technology, a type of multi-gate MOSFET technology.

Achronix Semiconductor Corporation is an American fabless semiconductor company based in Santa Clara, California with an additional R&D facility in Bangalore, India, and an additional sales office in Shenzhen, China. Achronix is a diversified fabless semiconductor company that sells FPGA products, embedded FPGA (eFPGA) products, system-level products and supporting design tools. Achronix was founded in 2004 in Ithaca, New York based on technology licensed from Cornell University. In 2006, Achronix moved its headquarters to Silicon Valley.

In semiconductor manufacturing, the 3nm process is the next die shrink after the 5 nm MOSFET technology node. South Korean chipmaker Samsung started shipping its 3 nm gate all around (GAA) process, named 3GAA, in mid-2022. On 29 December 2022, Taiwanese chip manufacturer TSMC announced that volume production using its 3 nm semiconductor node (N3) was underway with good yields. An enhanced 3 nm chip process called "N3E" may have started production in 2023. American manufacturer Intel planned to start 3 nm production in 2023.

In semiconductor manufacturing, the 2 nm process is the next MOSFET die shrink after the 3 nm process node.

References

  1. ↑ Torres, J. Andres; Otto, Oberdan; Pikus, Fedor G. (2009-10-01). Zurbrick, Larry S.; Montgomery, M. Warren (eds.). Challenges for the 28nm half node: Is the optical shrink dead?. Society of Photographic Instrumentation Engineers. pp. 74882A. doi:10.1117/12.831047.
  2. ↑ "A Review of TSMC 28 nm Process Technology | TechInsights". www.techinsights.com. Retrieved 2024-03-01.
  3. ↑ "No More Nanometers – EEJournal". July 23, 2020.
  4. ↑ Shukla, Priyank. "A Brief History of Process Node Evolution". design-reuse.com. Retrieved 2019-07-09.
  5. ↑ Hruska, Joel. "14nm, 7nm, 5nm: How low can CMOS go? It depends if you ask the engineers or the economists..." ExtremeTech .
  6. ↑ "Exclusive: Is Intel Really Starting To Lose Its Process Lead? 7nm Node Slated For Release in 2022". wccftech.com. 2016-09-10.
  7. ↑ "Life at 10nm. (Or is it 7nm?) And 3nm - Views on Advanced Silicon Platforms". eejournal.com. 2018-03-12.
  8. ↑ Clarke, Peter (2009-08-24). "TSMC splits 28-nm high-k metal gate process into two versions". EE Times.
  9. ↑ "GlobalFoundries 130, 55, 45, 40, 28, 22, 12nm Prototyping and Volume Production" (PDF).
  10. ↑ Wilson, Sophie. "The Future of Microprocessors". Code Mesh 2016. Code Mesh.
  11. ↑ Balasinski, Artur (2014). Design for manufacturability: from 1D to 4D for 90-22nm technology nodes. New York, New York: Springer. p. 124. ISBN   978-1-4614-1761-3.
  12. ↑ Smith, Ryan. "AMD Radeon HD 7970 Review: 28nm And Graphics Core Next, Together As One". www.anandtech.com. Retrieved 2024-03-01.
  13. ↑ "NVIDIA RSX-28nm".
  14. ↑ Homulle, Harald; Charbon, Edoardo (2017-12-13). "Performance characterization of Altera and Xilinx 28 nm FPGAs at cryogenic temperatures". 2017 International Conference on Field Programmable Technology (ICFPT). IEEE. pp. 25–31. doi:10.1109/FPT.2017.8280117. ISBN   978-1-5386-2656-6.


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